Hi I want to know the master of the memory request at the cache and main memory level. The "packet" is the one which is being send from the upper layers to lower layers i.e. cache -> memory. I can see that packet (pkt) has a field requestPtr (req) which has functions masterId, threadId, and taskId. Thread Id is always coming 0 and Task Id is always coming 1024. MasterId is consistent with master during a simulation, but the number assigned gets generated dynamically, so can't be used.
Can anyone provide any pointers about in-built functions to know the master? -- Have a great day! Thanks and Warm Regards Davesh Shingari Master's in Computer Engineering [EE] Arizona State University davesh.shing...@asu.edu ᐧ
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