Hi all,

Instead of starting a new thread, I’d suggest to go ahead with the original 
suggestion from this thread. The steps outlined should be enough to get you 
going. Regarding the SW side of things it is not gem5 specific, as you would 
have to get the OS to understand the implications.

Andreas

From: gem5-users 
<gem5-users-boun...@gem5.org<mailto:gem5-users-boun...@gem5.org>> on behalf of 
Star_Duster <silver_ea...@sina.com<mailto:silver_ea...@sina.com>>
Reply-To: "silver_ea...@sina.com<mailto:silver_ea...@sina.com>" 
<silver_ea...@sina.com<mailto:silver_ea...@sina.com>>, gem5 users mailing list 
<gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
Date: Friday, 10 February 2017 at 15:27
To: gem5 users mailing list <gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
Subject: [gem5-users] 回复:Re: ScratchPad Memory(SPM) Simulation

Hi Marcos, Andreas,

Sorry for my late reply. Because I was just back to my lab today. First of all, 
thanks a lot for your help. I am new to the Gem5, so I still got some questions:

1.The reason why I want to simulate a ScratchPad Memory in gem5 is that I want 
to study some algorithm performance on the same data in the different position. 
My plan is replacing the L1 DCache/ICache with the SPM ( as on-chip memory ), 
so I can put the data in different place (on the SPM) as I wish. Also I need to 
output the trace of the memory access ( the SPM) to statistical analysis.  I 
don't know if my plan is all right, or you have some better idea?

2. If my plan works, should I use Marcos or Andreas' way to realize it? And 
what exactly should I do to realize it ( may be some specific steps)? how can I 
 place the data and tell the system (Gem5) where it is?


Thanks again for your help, and looking forward to your reply.

Best wishes,
Simon

----- 原始邮件 -----
发件人:Marcos Horro Varela <marcos.ho...@udc.es<mailto:marcos.ho...@udc.es>>
收件人:gem5 users mailing list <gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
主题:Re: [gem5-users] ScratchPad Memory(SPM) Simulation
日期:2017年01月13日 18点03分

Hello Andreas,

Your solution seems more elegant and less intrusive than mine. Nonetheless, I 
have been working of a lower level implementation in order to isolate the 
traffic from main memories and scratchpad memories and, therefore, increase the 
. The same way, my version provides pseudo instructions to allocate memory 
explicitly on a concrete SPM. Therefore you can also instantiate many SPM.

[Simon]
But, the version I have developed was based on an old version of gem5, so maybe 
it is not as stable and accurate as it is now. Then I would try first what 
Andreas says and if it works as you expect, it will be easier to maintain.

Kind regards,

________________________________
From: "Andreas Hansson" 
<andreas.hans...@arm.com<mailto:andreas.hans...@arm.com>>
To: "gem5 users mailing list" <gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
Sent: Friday, January 13, 2017 10:37:48 AM
Subject: Re: [gem5-users] ScratchPad Memory(SPM) Simulation

Hi Simon, Marcos,

In general you should not need anything beyond “vanilla” gem5 (Marcos, correct 
me if I am wrong).

If you connect a NonCoherentXBar to the data or instruction port of the CPU, 
and then use this xbar to connect both to the cache and a SimpleMemory instance 
of your choice you can create a topology where you have an “ITCM” and “DTCM” as 
part of the CPU. It is really mostly an exercise in using the existing building 
blocks, and configuring the memory ranges as you want them to appear to the OS.

You will also have to sort out the SW side of things, and that is probably the 
more painful part. Again, Marcos can probably give you more insight here.

In short, I do not think you need anything beyond the existing gem5, but I 
stand to be corrected.

Andreas

From: gem5-users 
<gem5-users-boun...@gem5.org<mailto:gem5-users-boun...@gem5.org>> on behalf of 
Marcos Horro Varela <marcos.ho...@udc.es<mailto:marcos.ho...@udc.es>>
Reply-To: gem5 users mailing list 
<gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
Date: Friday, 13 January 2017 at 09:32
To: gem5 users mailing list <gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
Subject: Re: [gem5-users] ScratchPad Memory(SPM) Simulation

Hello Simon,

I have been working on a custom version of gem5 which integrates these memories.
You can find it on [1]. If you have any issues using it, I will try to help you.

Kind regards,

[1] https://github.com/markoshorro/gem5-spm

________________________________
From: "silver eagle" <silver_ea...@sina.com<mailto:silver_ea...@sina.com>>
To: "gem5-users" <gem5-users@gem5.org<mailto:gem5-users@gem5.org>>
Sent: Friday, January 13, 2017 9:47:27 AM
Subject: [gem5-users] ScratchPad Memory(SPM) Simulation

Hello everyone,

    This time I want to simulate a ScratchPad Memory in gem5. Is there any 
specific patch or turorial could help me to do that?

    Any of your help will be appreciated!

    Thanks,
    Simon
________________________________
silver_ea...@sina.com<mailto:silver_ea...@sina.com>

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+34 618 62 67 37
http://marcoshorro.com
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