Dear all, I'm trying to make my own cache object, which is finally used to simulate the DRAM Cache using DRAMSim2.
This is my first time to modify gem5 code, so I have tried to make a simple cache block to satisfy essential functions for a cache. And I saw the tutorials and the sample code of Jason Lowe-Power. http://learning.gem5.org/book/part2/simplecache.html So I plan to extend this sample code for my purpose. However, when I use this simple cache with existed gem5 cache block, gem5 makes a error. I tested this simple cache in 3 case using se.py. I replaced the below part in CacheConfig.py to simple cache which is L1_DSimple, L1_ISimple, L2_Simple. [image: 본문 이미지 1] and run it in 2 different ISA. ( cmd was hello in test-progs ) ISA L1_DSimple L1_ISimple (1-level cache hierarchy) L1_DSimple L1_ISimple L2_Simple L1_DCache L1_ICache L2_Simple X86 Working well Working well gem5.opt: build/X86/mem/packet.hh:847: void Packet::makeResponse(): Assertion `needsResponse()' failed. ARM gem5.opt: build/ARM/mem/request.hh:674: uint64_t Request::getExtraData() const: Assertion `privateFlags.isSet(VALID_EXTRA_DATA)' failed. gem5.opt: build/ARM/mem/request.hh:674: uint64_t Request::getExtraData() const: Assertion `privateFlags.isSet(VALID_EXTRA_DATA)' failed. gem5.opt: build/ARM/mem/packet.hh:847: void Packet::makeResponse(): Assertion `needsResponse()' failed. When I read the sample code of Jason Lowe-Power, I think this cache has essential functions for cache. But it doesn't work well with exited gem5 cache block. What is the problem? Best regards. HaeYoon Cho
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