I am using FS mode. On Thu, May 24, 2018 at 12:00 PM, Jason Lowe-Power <ja...@lowepower.com> wrote:
> Hi Da, > > Are you using SE mode or FS mode? IIRC, the TLB size does nothing in SE > mode (it doesn't use a TLB). The TLB is only used in FS mode. > > Jason > > On Thu, May 24, 2018 at 8:45 AM Da Zhang <d...@vt.edu> wrote: > >> Hey guys, >> >> I tried to increase the dtb size (i.e., number of tlb entries) for our >> research. However, the stats.txt for the different dtb size >> (64,128,256,512,1024,2048,1048576) is practical identical or identical. >> For size < 512, the system.switch_cpus.dtb.rdAccesses difference is only >> several hundred. For size > 512, the whole stats.txt is identical. I am >> working for the X86 architecture. I change the size in X86TLB.py to >> increase the dtb size. By checking the config.ini file, I see the size is >> set as expected (under system.cpu.dtb). Any clue? >> >> Thanks in advance. >> >> Best, >> Da >> >> >> _______________________________________________ >> gem5-users mailing list >> gem5-users@gem5.org >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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