Hi
I am reading the latest code of gem5 and try to make the cache model more
flexible (e.g., allowing non-constant access latency). So I will change the
timing behavior of the Cache class.
Currently, I am reading the code in /mem/cache. I found that two major classes
have their timing model: the Cache/NoncoherentCache/BaseCache family and the
Tag family.
So what I need to do is to change related codes with a device timing model,
right? Or there may be other points I missed? Thanks for your advice.
BTW, what are the FALRU tags for? It seems all configurations use SetAssoc
Tags. I found a paper from UC.Berkeley. It is related to Sector Cache. Maybe
someone will use that model in the future. But why should Fully-associative LRU
cache be considered separately?
Regards
Zheng Liang
EECS, Peking University
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