Dear gem5 users,
I want to simulate 32bit RISC-V binary with SE mode, but there are several
problems with it.
Simply, it generates wrong output when I use printf with numbers (%d), while it
crashes the simulation for previous gem5 version.
1) I used very simple c code.
#include<stdio.h>
int main() {
printf("Hello, world!\n");
printf("Print number:%d\n", 1234567890);
return 0;
}
And I used riscv32-unknown-elf-gcc from rocket tools.
https://github.com/chipsalliance/rocket-tools
I built it with ./build-rv32ima.sh , based on the documentation of
https://github.com/chipsalliance/rocket-chip .
(In my cases, binaries with other RISC-V gccs induces crashes during the gem5
simulation.)
The compilation command for the c code is
/home/sohwisoo/riscv-rocket-tools/bin/riscv32-unknown-elf-gcc -march=rv32imaf
-mabi=ilp32 main.c -o hello_RISCV32 -O3 -static -lm
2) I executed it with latest stable gem5 (0d70304 (HEAD -> stable, tag:
v20.1.0.2). the command line is
./build/RISCV/gem5.opt -re -d riscv32_hello --debug-file=debug
--stdout-file=simout --stderr-file=simerr --stats-file=stats
./configs/example/se.py --caches -n 1 --cpu-type=DerivO3CPU --output=output -c
/home/sohwisoo/git/gem5_latest_210105/gem5/ctest/hello_RISCV32
I can simulate the binary without error. However, the output is
Hello, world!
Print number:110354H79T
While the alphabet characters are printed well, the numeric outputs are
corrupted.
The same problem appears at the latest develop version of gem5 (3c0769b, Wed
Jan 6 16:00:42 2021 +0000).
3) If I use the older version of gem5 (v20.0.0.2, 96fce47),
simply the simulation crashes with error. The stderr log is
warn: No dot file generated. Please install pydot to generate the dot file and
pdf.
warn: DRAM device capacity (8192 Mbytes) does not match the address range
assigned (512 Mbytes)
warn: Unknown operating system; assuming Linux.
0: system.remote_gdb: listening for remote gdb on port 7000
info: Entering event queue @ 0. Starting simulation...
panic: Page table fault when accessing virtual address 0
Memory Usage: 665488 KBytes
Program aborted at tick 2477500
--- BEGIN LIBC BACKTRACE ---
./build/RISCV/gem5.opt(_Z15print_backtracev+0x28)[0x16bbdd8]
./build/RISCV/gem5.opt(_Z12abortHandleri+0x46)[0x16ccd36]
...(skip for the error logs)
I found the question on stack overflow with similar case (no crash, but
corrupted output).
https://stackoverflow.com/questions/65181691/riscv-32-bit-architecture-on-gem5-simulator
Ayaz Akram (thank him for the answer) answered that gem5 supports RV64.
So, can I check that currently gem5 only supports RV64 and RV32 is in progress?
Or supports for RV32 is not planned yet?
Or just my compilation for RV32 binary is wrong?
I apologize if my question is not appropriate.
If you need more information, please let me know and I'll check your response.
Best regards,
Hwisoo.
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