Out of curiosity, which DTB are you using? IMO the kernel shouldn't write 8000000 to the PCI Bar, knowing there is DRAM there and this is notified via the DTB
Kind Regards Giacomo > -----Original Message----- > From: Bohren, Jonathan via gem5-users <gem5-users@gem5.org> > Sent: 22 January 2021 12:51 > To: gem5 users mailing list <gem5-users@gem5.org> > Cc: Gabe Black <gabe.bl...@gmail.com>; Bohren, Jonathan > <jrboh...@honeybeerobotics.com> > Subject: [gem5-users] Re: VExpress_GEM5_V1, Ethernet, and BARs > > Gabe, > > > > Yeah, this is a very recent version of `develop`. This is after rebasing a > recent > proposed change `38796` [1] (which disables the HDLcd) onto `develop` HEAD > from 2020-01-20: > > > > ``` > > c6e3fd79f (develop-rebase-38796) dev-arm, system-arm: Remove HDLcd from > VExpress_GEM5_VX platforms > > b9ce8848e system-arm: Move display node into a shared DTS file > > 71932a360 (upstream/develop, develop) dev: Fixing EtherDevice stats > initialization order > > ``` > > > > The two changesets in CL `38796` [1] were based on `3059c6d` which was the > HEAD of `develop` on 2020-01-05, and it didn’t appear that CL `38796` reverted > any changes made in the interim. > > > > I came across a similar discussion in the archives [2], which did seem > similar, > but didn’t address the problem described below. Is the bug you’re referring to > the one addressed by CL `35516` [3]? > > > > Thanks for taking a look at this! > > > > [1] https://gem5-review.googlesource.com/c/public/gem5/+/38796 > <https://gem5-review.googlesource.com/c/public/gem5/+/38796> > > [2] https://www.mail-archive.com/gem5-users@gem5.org/msg18647.html > <https://www.mail-archive.com/gem5-users@gem5.org/msg18647.html> > > [3] https://gem5-review.googlesource.com/c/public/gem5/+/35516 > <https://gem5-review.googlesource.com/c/public/gem5/+/35516> > > > > -jrb > > > > From: Gabe Black via gem5-users <gem5-users@gem5.org> > Sent: Thursday, January 21, 2021 11:59 PM > To: gem5 users mailing list <gem5-users@gem5.org> > Cc: Gabe Black <gabe.bl...@gmail.com> > Subject: [gem5-users] Re: VExpress_GEM5_V1, Ethernet, and BARs > > > > Are you using up to date develop? There was a bug like this a while ago, but > it's > been fixed on develop for a while as well. > > > > Gabe > > > > On Thu, Jan 21, 2021 at 6:35 PM Bohren, Jonathan via gem5-users <gem5- > us...@gem5.org <mailto:gem5-users@gem5.org> > wrote: > > We've been using the `VExpress_GEM5_V1` platform but it was failing > on both `stable` and `develop` when adding an `IGbE_e1000` PCI device to the > `makeArmSystem()` function in `FSConfig.py`. We've worked around it, but > looking for the "right way" to add such a device. > > For reference, the change is shown here: > ``` > diff --git a/configs/common/FSConfig.py > b/configs/common/FSConfig.py > index 6fd39a5aa..837d95982 100644 > --- a/configs/common/FSConfig.py > +++ b/configs/common/FSConfig.py > @@ -226,6 +226,8 @@ def makeArmSystem(mem_mode, > machine_type, num_cpus=1, mdesc=None, > else: > self.pci_ide = IdeController(disks=disks) > pci_devices.append(self.pci_ide) > + self.realview.ethernet = IGbE_e1000() > + pci_devices.append(self.realview.ethernet) > > self.mem_ranges = [] > size_remain = long(Addr(mdesc.mem())) > ``` > > Specifically, the error that results during boot is regarding an address > range collision once the device loads: > ``` > fatal: system.iobus has two ports responding within range > [0x80000000:0x80020000]: > system.realview.ethernet.pio > system.iobridge.cpu_side_port > ``` > > That `0x80000000:0x80020000` range corresponds exactly to the 128kB > BAR0 of the `IGbE` device. > > The recent change [1] makes it clear that this is an issue because the > `IGbE_e1000` device uses a `PciMemBar`, which overlaps with the Realview's > DRAM address range, while the pre-existing `IdeController` device only uses > `PciIoBar` BARs, which don't. It's possible to avoid the range collision by > changing the Ethernet device's `PciMemBar` to a `PciIoBar` to keep it out of > the > DRAM range, but it's not yet clear if that workaround will cause other issues. > > What's the proper way to avoid this collision? > > [1] https://gem5-review.googlesource.com/c/public/gem5/+/35516 > <https://gem5-review.googlesource.com/c/public/gem5/+/35516> > > -jrb > > ________________________________ > > DISCLAIMER: > This e-mail may contain ITAR controlled technical data as defined by 22 > CFR 120.10 and may not be forwarded or disclosed to any Foreign Person, as > defined at 22 CFR 120.16, without the prior written consent of Honeybee > Robotics and the United States Department of State. > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org <mailto:gem5- > us...@gem5.org> > To unsubscribe send an email to gem5-users-le...@gem5.org > <mailto:gem5-users-le...@gem5.org> > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s > > > ________________________________ > > > DISCLAIMER: > This e-mail may contain ITAR controlled technical data as defined by 22 CFR > 120.10 and may not be forwarded or disclosed to any Foreign Person, as > defined at 22 CFR 120.16, without the prior written consent of Honeybee > Robotics and the United States Department of State. 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