Hello, When using configuration files that define a walk cache (configs/common/cores/arm/O3_ARM_v7a.py and configs/common/cores/arm/HPI.py for example), I get the following error:
fatal: Port <orphan System>.cpu.itb_walker_cache.cpu_side is already connected to <orphan System>.cpu.mmu.itb_walker.port, cannot connect <orphan System>.cpu.mmu.stage2_itb_walker.port The command line I use: $ ./build/ARM/gem5.opt configs/example/se.py --cpu-type O3_ARM_v7a_3 -c tests/test-progs/hello/bin/arm/linux/hello --caches --l2cache It seems this problem is due to the connectWalkerPorts function defined in src/arch/arm/ArmMMU.py, in particular the following two lines (l.100-l.101): self.stage2_itb_walker.port = iport self.stage2_dtb_walker.port = dport Commenting them out seems to solve the problem, but I'm pretty sure this is not the correct way of solving it, but I'm not familiar enough with this code to find a better one. Anyone has a better solution? Thanks, Nathanael Premillieu
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