Hi Yifan, The feature is unfortunately only supported in gem5 by the GICv3 implementation. Could you try to run your software stack with GICv3 instead?
Kind Regards Giacomo From: Yifan Tan <tanyi...@sjtu.edu.cn> Date: Saturday, 16 July 2022 at 12:17 To: gem5-users@gem5.org <gem5-users@gem5.org> Subject: [gem5-users] GEM5 Arm VGIC does not support 'HW' List Register feature Hi all, I tried running a KVM guest on Arm GEM5 Linux, but GEM5 panicked at https://gem5.googlesource.com/public/gem5/+/refs/heads/stable/src/dev/arm/vgic.cc#126. The comment above this `panic` said KVM does not use auto-EOI of HW interrupts via real GIC. However, in later Linux version, function `kvm_vgic_map_phys_irq` would set the HW bit to 1, as in https://gem5.googlesource.com/arm/linux/+/refs/heads/gem5/v4.14/virt/kvm/arm/vgic/vgic.c#406. I've tested gem5/v4.3, which is the oldest version branch of repo arm/linux in gem5 source. In https://gem5.googlesource.com/arm/linux/+/refs/heads/gem5/v4.3/virt/kvm/arm/vgic.c#1778, the code does not explicitly set HW to 1, but the virtual irq is also mapped to physical irq, and the GEM5 would panic at the same place. Does this mean I could only boot host Linux of very old version without `kvm_vgic_map_phys_irq`? I wonder that, without the support of `kvm_vgic_map_phys_irq`, the performance would suffer. The EOI of virtual irq would bring about an additional VM exit. Thanks! Yifan Tan _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
_______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org
