Hi Abdlerhman, I think your understanding of different requestor IDs for a single core is correct i.e., these specify instruction and data requests. "dataRequestorId()" and "instRequestorId()" functions in src/cpu/base.hh verify this. I think prefetchers should also have their own requestor ids as any object that can issue memory requests is assigned an id at the start of the simulation.
-Ayaz On Wed, Feb 15, 2023 at 8:51 PM Abdlerhman Abotaleb via gem5-users < gem5-users@gem5.org> wrote: > I want to identify the source CPU# of a packet. > I found a field called "pkt->requestorId()" > """""""""""" > This field originally can have the following options: "*Source: > gem5/src/mem/request.hh*" > *wbRequestorId *= 0, /* writeback requests by the caches */ > *funcRequestorId *= 1, /* functional requests that don't come from a > particular device*/ > *intRequestorId *= 2, /* message signaled interrupts */ > *invldRequestorId *= std::numeric_limits<RequestorID>::max() /* Invalid > requestor id for assertion checking only*/ > """"""""""" > Then inside the processor, when create a request this ID is assigned > either _instRequestorId or _dataRequestorId. > > Now when run experiments with 4 cores , single thread : > I have the following requestor ID values: > Core 0 (IDs = 0x5,0x6) > Core 1 (IDs = 0x9,0xA) > Core 2 (IDs = 0xE,0xD) > Core 3 (IDs = 0x11,0x12) > *When have hardware prefetcher enabled*, the IDs get increased. > """""" > Now my questions: > How to associate the IDs found with the source core? How they IDs are > being assigned? > Why the same core can generate different requests with different IDs (May > be one is data and other is instruction) ? > In case of HWP enabled , is it considered as an additional source ? > > Thank you so much for the help. > > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org >
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