On 4/20/2023 10:58 AM, 中国石油大学张天 via gem5-users wrote:
Hello everyone, I would like to ask, when executing non memory access instructions in Gem5, shouldn't it be executed in ALU? But ALU has not been specifically designed and implemented, how is this instruction executed?
gem5 does not model at the circuit level. A piece of C++ code, defined with the instruction, will perform the operation. It charges an indicated amount of time, according to the functional unit. gem5 deals with all the queueing and timing, but does not model at the gate level. Best wishes - EM _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org
