Hi, I am working on the x86 page walker in gem5. I understand that the page walker accesses the page walker cache (PWC) first and, in case of a miss, it accesses the memory hierarchy (L1, then L2, then L3 caches and lastly the memory). This happens through the packetpointer *read*, which reads the physical address of the entry at each level (PML4, PDP.. etc.).
Now, what I would like to inquire about is how to identify where this read request for the PTE hits in the memory hierarchy. In other words, for each step, I would like to know whether this entry was a hit in L1, L2, or L3. So, is there any field or function/method in the packet that holds this information? If not, how can I get this information? Thanks, -- *Best,Abdelrahman Hussein*
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