Hello,

Lately I've had the problem that my benchmark will simply stall (MSHRs waiting for request?) very near to completion of the executable. I am running the latest dev build, using FS mode and am running the stream benchmark in alpha linux. When I adjust the parameters of my DRAM simulator, esp. to a configuration that yields a lower latency for reads/writes that occur far apart, the problem goes away and the benchmark finishes. The simulator should use the same handling criteria for each type of request as physical.cc does, affecting only the timing of the requests.

I have attached a trace file showing the last hundred items printed by using --trace-flags=Cache,LLSC,MemoryAccess It shows that the last request sent was to 0x1f8e6a40, which my simulator does timing for and returns, using physmem to do the actual read from the memory array. After this point, the system stops executing instructions and making memory requests and I am unsure why this happens. There are no outstanding requests in the memory system at this point. Any help tracking down why this is happening would be appreciated. I can send my custom fs.py or other code if it's useful.

Joe
1888877383085: system.l2: Block for addr 1fa685c0 being updated in Cache
1888877383085: system.l2: replacement: replacing 1f6505c0 with 1fa685c0: clean
1888877383085: system.l2: Block addr 1fa685c0 moving from state 0 to 7
1888877387085: system.cpu.icache: Handling response to 1fa68600
1888877387085: system.cpu.icache: Block for addr 1fa68600 being updated in Cache
1888877387085: system.cpu.icache: replacement: replacing 8600 with 1fa68600: 
clean
1888877387085: system.cpu.icache: Block addr 1fa68600 moving from state 0 to 5
1888877390000: system.cpu.icache: Handling response to 1fa685c0
1888877390000: system.cpu.icache: Block for addr 1fa685c0 being updated in Cache
1888877390000: system.cpu.icache: replacement: replacing 1fb705c0 with 
1fa685c0: clean
1888877390000: system.cpu.icache: Block addr 1fa685c0 moving from state 0 to 5
1888877394000: system.l2: Handling response to 15880c0
1888877394000: system.l2: Block for addr 15880c0 being updated in Cache
1888877394000: system.l2: replacement: replacing 1f6700c0 with 15880c0: clean
1888877394000: system.l2: Block addr 15880c0 moving from state 0 to 7
1888877399020: system.cpu.dcache: Handling response to 15880c0
1888877399020: system.cpu.dcache: Block for addr 15880c0 being updated in Cache
1888877399020: system.cpu.dcache: replacement: replacing 12f80c0 with 15880c0: 
writeback
1888877399020: system.cpu.dcache: Block addr 15880c0 moving from state 0 to 5
1888877402000: system.l2: Writeback 12f80c0 miss
1888877402000: system.l2: replacement: replacing 1f6780c0 with 12f80c0: clean
1888877404000: system.l2: Handling response to 1f8e69c0
1888877404000: system.l2: Block for addr 1f8e69c0 being updated in Cache
1888877404000: system.l2: Block addr 1f8e69c0 moving from state 0 to 7
1888877409030: system.cpu.icache: Handling response to 1f8e69c0
1888877409030: system.cpu.icache: Block for addr 1f8e69c0 being updated in Cache
1888877409030: system.cpu.icache: replacement: replacing 34e9c0 with 1f8e69c0: 
clean
1888877409030: system.cpu.icache: Block addr 1f8e69c0 moving from state 0 to 5
1888877412897: system.cpu.icache: ReadReq (ifetch) 1f8e6a00 miss
1888877413397: system.l2: ReadReq (ifetch) 1f8e6a00 miss
1888877413565: system.cpu.dcache: ReadReq 1f9cf830 hit
1888877413732: system.cpu.dcache: ReadReq 15fb8f0 miss
1888877414233: system.cpu.dcache: WriteReq 1f9cf6d0 miss
1888877414233: system.cpu.dcache: WriteReq 1f9cf6d8 miss
1888877414400: system.cpu.dcache: WriteReq 1f9cf6e0 miss
1888877414400: system.cpu.dcache: WriteReq 1f9cf6e8 miss
1888877414901: system.cpu.dcache: WriteReq 1f9cf6f0 miss
1888877414901: system.cpu.dcache-cpu_side_port: Cache Blocking
1888877414901: system.cpu.dcache: Blocking for cause 2, mask=4
1888877415000: system.l2: ReadReq 15fb8c0 miss
1888877416000: system.l2: ReadExReq 1f9cf6c0 miss
1888877431000: system.physmem: IFetch of size 64 on address 0x1f8e6a00
1888877444000: system.physmem: Read of size 64 on address 0x15fb8c0
1888877452000: system.l2: Handling response to 1f8e6a00
1888877452000: system.l2: Block for addr 1f8e6a00 being updated in Cache
1888877452000: system.l2: Block addr 1f8e6a00 moving from state 0 to 7
1888877454000: system.physmem: Read of size 64 on address 0x1f9cf6c0
1888877456770: system.cpu.icache: Handling response to 1f8e6a00
1888877456770: system.cpu.icache: Block for addr 1f8e6a00 being updated in Cache
1888877456770: system.cpu.icache: replacement: replacing 34ea00 with 1f8e6a00: 
clean
1888877456770: system.cpu.icache: Block addr 1f8e6a00 moving from state 0 to 5
1888877459991: system.cpu.icache: ReadReq (ifetch) 1f8e6a40 miss
1888877460491: system.l2: ReadReq (ifetch) 1f8e6a40 miss
1888877460492: system.cpu.dcache-cpu_side_port: Scheduling a retry while blocked
1888877461160: system.cpu.icache: ReadReq (ifetch) 1f8e6a00 hit
1888877461995: system.cpu.icache: ReadReq (ifetch) 1f8e6a40 miss
1888877463164: system.cpu.icache: ReadReq (ifetch) 1f8e6a00 hit
1888877463999: system.cpu.icache: ReadReq (ifetch) 1f8e6a40 miss
1888877465090: system.l2: Handling response to 15fb8c0
1888877465090: system.l2: Block for addr 15fb8c0 being updated in Cache
1888877465090: system.l2: replacement: replacing 1f6938c0 with 15fb8c0: clean
1888877465090: system.l2: Block addr 15fb8c0 moving from state 0 to 7
1888877465168: system.cpu.icache: ReadReq (ifetch) 1f8e6a00 hit
1888877466003: system.cpu.icache: ReadReq (ifetch) 1f8e6a40 miss
1888877467172: system.cpu.icache: ReadReq (ifetch) 1f8e6a00 hit
1888877468007: system.cpu.icache: ReadReq (ifetch) 1f8e6a40 miss
1888877468007: system.cpu.icache-cpu_side_port: Cache Blocking
1888877468007: system.cpu.icache: Blocking for cause 2, mask=4
1888877469176: system.cpu.icache-cpu_side_port: Scheduling a retry while blocked
1888877469860: system.cpu.dcache: Handling response to 15fb8c0
1888877469860: system.cpu.dcache: Block for addr 15fb8c0 being updated in Cache
1888877469860: system.cpu.dcache: replacement: replacing 10738c0 with 15fb8c0: 
writeback
1888877469860: system.cpu.dcache: Block addr 15fb8c0 moving from state 0 to 5
1888877472000: system.l2: Writeback 10738c0 miss
1888877472000: system.l2: replacement: replacing 1f69b8c0 with 10738c0: clean
1888877475000: system.l2: Handling response to 1f9cf6c0
1888877475000: system.l2: Block for addr 1f9cf6c0 being updated in Cache
1888877475000: system.l2: replacement: replacing 32f6c0 with 1f9cf6c0: clean
1888877475000: system.l2: Block addr 1f9cf6c0 moving from state 0 to 7
1888877478000: system.physmem: IFetch of size 64 on address 0x1f8e6a40
1888877479870: system.cpu.dcache: Handling response to 1f9cf6c0
1888877479870: system.cpu.dcache: Unblocking for cause 2, mask=0
1888877479870: system.cpu.dcache-cpu_side_port: Cache Unblocking
1888877479870: system.cpu.dcache-cpu_side_port: Cache Sending Retry
1888877479870: system.cpu.dcache: Block for addr 1f9cf6c0 being updated in Cache
1888877479870: system.cpu.dcache: replacement: replacing c7f6c0 with 1f9cf6c0: 
writeback
1888877479870: system.cpu.dcache: Block addr 1f9cf6c0 moving from state 0 to 7
1888877482000: system.l2: Writeback c7f6c0 miss
1888877482000: system.l2: replacement: replacing 3776c0 with c7f6c0: clean
1888877499000: system.l2: Handling response to 1f8e6a40
1888877499000: system.l2: Block for addr 1f8e6a40 being updated in Cache
1888877499000: system.l2: Block addr 1f8e6a40 moving from state 0 to 7
1888877504125: system.cpu.icache: Handling response to 1f8e6a40
1888877504125: system.cpu.icache: Unblocking for cause 2, mask=0
1888877504125: system.cpu.icache-cpu_side_port: Cache Unblocking
1888877504125: system.cpu.icache-cpu_side_port: Cache Sending Retry
1888877504125: system.cpu.icache: Block for addr 1f8e6a40 being updated in Cache
1888877504125: system.cpu.icache: replacement: replacing 396a40 with 1f8e6a40: 
clean
1888877504125: system.cpu.icache: Block addr 1f8e6a40 moving from state 0 to 5
Exiting @ cycle 133065002265000 because user interrupt received
_______________________________________________
m5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/m5-users

Reply via email to