Hello,
I'm having a problem to use the InOrderCPU core with an L2 cache when
adjusting the I-L1-latency.
Is there anyone else who countered the same problem?
I use ALPHA_SE and the latest stable M5-version.
Description:
-----------------
I configured my CPU to run at 2GHz. The default value of the Instruction
L1-latency is 1 ns. This means that it would take 2 clock-cycles of the
CPU to get something from the instruction L1 cache, which is unrealistic.
Therefore I can either adjust the CPU's clock frequency to 1GHz or
adjust the latency of the L1 cache to 0.5ns. When using the second
option I get the following error when I also add an L2-cache:
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
m5.opt: build/ALPHA_SE/cpu/inorder/resources/cache_unit.cc:722: void
CacheUnit::recvRetry(): Assertion `cacheBlocked' failed.
Program aborted at cycle 39145001
./run-max.sh: line 48: 1406 Aborted ./${binary} -d
"${outputdir}" --trace-flags="Exec" --trace-file="tracedmp" "${script}"
--output "${benchout}" --bench "${1}" ${cpumodel} --caches --l2cache
When I only use an L1 cache no error occurs. Also for other L1-latencies
everything works fine when I do attach an L2 cache.
Example:
------------
Unfortunately I do not get this error for the hello-benchmark, but I do
get it for simple code-fragments like this one:
#include <iostream>
using namespace std;
int main(){
double result=1;
double x;
while(cin>>x){
result*=x;
}
cout<<"The result of the multiplication session is "<<result<<endl;
}
To run this program you need to provide an inputfile that contains
numbers seperated by spaces:
./a.out < inputfile
Thank you!
Max
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