yeap. I have the install disk of SPEC2006.

First, I run it on a 32 bit fedora core 10 system.
Here is what I did:

1. compile m5-beta 6, succeeded.
2. install SPEC2006, and modify the /config/linux32.....cfg file, and then
runspec --config=linux32.....cfg --action=build --tune=base bzip2

(the linux32...cfg file modification:
CC=crosstool/alphaev67-unknown-linux-gnu/bin/alphaev67-unknown-linux-gnu-gcc)
(something like that)

3, modify the process.cc and sys..hh and sys..cc file following the FAQ and
compile m5-beta5 again //I thought at this time the revised process.cc and
sys...hh etc. could be compiled.
4. add Mybench.py and cmp.py in configures/example dir.
5. modify cmp.py file:
    a.m5.AddToPath('./configs') --> m5.AddToPath('../common')
    b.execfile(os.path.join(config_root, "configs", "Options.py")) -->
exefile(os.path.join(config_root, "configs", "Options.py")), #to indicate
the path of Options.py
6. modify Mybench.py file:
    a. Add from m5.objects import LiveProcess # without this sentence, there
will be NameError: LiveProcess not defined.
    b. change binary_dir to
/spec2006/specbench/CPU2006/401.bzip2/exe/....gcc-nn #to indicate the
executable file.
    c. change data_dir to corresponding dir.

But there is errors:
mrem error (something like that)

Then, I installed a 64 bit fedora core 10 running on a new 64 bit machine.
there are some compile errors.

Since I am now crushed by the errors, I have came back home. What I said
something like is not sure.

Could you please have a look and if convenient for you, help me to find out
some errors or tell me your configuration?

Thank you very much!


在 2010年9月20日 下午9:21, <[email protected]>写道:

> I don't use those tools. Besides I am in the lab now, it is not convinient.
>
> Do you have SPECcpu2006 source code? M5 cannot provide them.
>
> And check the path of cmp.py&Mybench.py.
>
> Can you provide me your error imformation of M5?
>
> > Hey,
> >
> > I still could not get M5 to work.
> >
> > Can I talk with you for a second? using Skype or Gmail talk?
> >
> > My skype: chenlonghust
> >
> > It is highly appreciated!
> >
> > Regards,
> >
> > Long Chen
> >
> > =============================================
> > Electrical and Computer Engineering
> > Iowa State University
> > Ames, Iowa
> > US 50010
> > Office: 515-294-8936
> >
> >  2010-09-20
> >
> >
> >
> > 发件人: zhanglunkai
> > 发送时间: 2010-09-19  19:36:04
> > 收件人: m5-users
> > 抄送:
> > 主题: [m5-users] Is there any way to switch off coherence protocol?
> >
> > Hi, I am currently using M5 running uniprocessor workload. I find that
> > there is some unwanted coherence overhead in L2 cache (ReadExReq is
> > always
> > a miss). Because my current work does not require any coherence, is there
> > any way to bypass the coherence protocol?
> > _______________________________________________
> > m5-users mailing list
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> > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
> > _______________________________________________
> > m5-users mailing list
> > [email protected]
> > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
>
>
> _______________________________________________
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