hello; i am trying to use m5 to read data from main memory and evaluate the value of the data stored in a specific location in main memory compared to a value in l2 cache. however, iam having a trouble figuring out how can i read that data. i found the function "writebackBlk" in cache_impl.hh. however, your documentations indicate that a memSidePort in l2 cache can only send requests to lower memory without the ability to receive a response for that request. Can you guide to the correct way to fix that or there is no way to do that?
- Sorry if my question is not that cleaver - Thank you _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
