It looks like you're using an older version of M5. If you update to the head of the development tree this problem may go away. It looks like a problem I've fixed there.
Gabe On 04/28/11 07:45, Meredydd Luff wrote: > Hi, > > I'm trying to run a "hello world" x86_64 executable in syscall > emulation mode. This works fine with the TimingSimpleCPU, but fails > when I try to use O3. > > I don't think this is a problem with my configuration script, as the > same thing happens to me when using se.py from the examples directory > as well as adapting 'o3-timing.py' from the regression tests. > > Comparing the trace (see below) to the assembly, it looks as though M5 > is somehow decoding garbage instructions, which is causing the fault. > This appears to be x86-specific, as a "hello world" gets well past > that point in MIPS. > > I see from the archives that people have got O3 working with x86, so > it should be workable. Any help would be appreciated! > > > This is what I get with O3, using --trace-flags=Exec,MemoryAccess: > > info: Entering event queue @ 0. Starting simulation... > 3000: system.physmem: IFetch of size 64 on address 0x300 > 41500: system.physmem: IFetch of size 64 on address 0x340 > 39000: system.cpu T0 : @_start. 0 : XOR_R_R : xor ebp, ebp, ebp > : IntAlu : D=0x0000000000000044 > 39000: system.cpu T0 : @_start+8.0 : LOOP_I : rdip t1d, > %ctrl153, : IntAlu : D=0x0000000000400328 > 39000: system.cpu T0 : @_start+8.1 : LOOP_I : subi rcx, rcx, > 0x1 : IntAlu : D=0x0000000000000044 > 39000: system.cpu T0 : @_start+8.2 : LOOP_I : wripi , t1d, 0x48 > : IntAlu : > 81000: system.physmem: IFetch of size 64 on address 0x380 > 78500: system.cpu T0 : @__do_global_dtors_aux.0 : PUSH_R : stupd > rbp, SS:[rsp + 0xfffffffffffffff8] : MemWrite : D=0x0000000000000000 > A=0x7fffffffee68 > 85000: system.physmem: Read of size 64 on address 0xa6e40 > 121000: system.physmem: IFetch of size 64 on address 0x3c0 > 122000: system.physmem: Read of size 64 on address 0xa2cc0 > panic: Tried to read unmapped address 0x2a19403d. > @ cycle 122000 > > > This is (what I believe to be) the relevant disassembly of _start: > 0000000000400320 <_start>: > 400320: 31 ed xor %ebp,%ebp > 400322: 49 89 d1 mov %rdx,%r9 > 400325: 5e pop %rsi > 400326: 48 89 e2 mov %rsp,%rdx > 400329: 48 83 e4 f0 and $0xfffffffffffffff0,%rsp > > ...so there's not even an instruction beginning at _start+8. > > > For reference, this is the beginning of the trace I get with the > TimingSimpleCPU model, which runs fine: > info: Entering event queue @ 0. Starting simulation... > 0: system.physmem: IFetch of size 8 on address 0x320 data > 0x89485ed18949ed31 > 30000: system.cpu T0 : @_start. 0 : XOR_R_R : xor ebp, ebp, ebp > : IntAlu : D=0x0000000000000044 > 30000: system.physmem: IFetch of size 8 on address 0x320 data > 0x89485ed18949ed31 > 60000: system.cpu T0 : @_start+2.0 : MOV_R_R : mov r9, r9, rdx > : IntAlu : D=0x0000000000000000 > 60000: system.physmem: IFetch of size 8 on address 0x320 data > 0x89485ed18949ed31 > 90000: system.physmem: Read of size 8 on address 0xa6e70 data 0x1 > 90000: system.cpu T0 : @_start+5.0 : POP_R : ld t1, SS:[rsp] : > MemRead : D=0x0000000000000001 A=0x7fffffffee70 > 120000: system.cpu T0 : @_start+5.1 : POP_R : addi rsp, rsp, 0x8 > : IntAlu : D=0x00007fffffffee78 > 120000: system.cpu T0 : @_start+5.2 : POP_R : mov rsi, rsi, t1 : > IntAlu : D=0x0000000000000001 > 120000: system.physmem: IFetch of size 8 on address 0x320 data > 0x89485ed18949ed31 > 150000: system.physmem: IFetch of size 8 on address 0x328 data > 0x495450f0e48348e2 > 180000: system.cpu T0 : @_start+6.0 : MOV_R_R : mov rdx, rdx, > rsp : IntAlu : D=0x00007fffffffee78 > 180000: system.physmem: IFetch of size 8 on address 0x328 data > 0x495450f0e48348e2 > 210000: system.cpu T0 : @_start+9.0 : AND_R_I : limm t1, > 0xfffffffffffffff0 : IntAlu : D=0xfffffffffffffff0 > 210000: system.cpu T0 : @_start+9.1 : AND_R_I : and rsp, rsp, t1 > : IntAlu : D=0x0000000000000000 > 210000: system.physmem: IFetch of size 8 on address 0x328 data > 0x495450f0e48348e2 > 240000: system.physmem: Write of size 8 on address 0xa6e68 data 0x0 > [...] > > Meredydd > _______________________________________________ > m5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
