I think your patch got a little mangled in the email. Would you mind
resending it as an attachment, or even putting it on review board?
Gabe
Quoting Ali Saidi <[email protected]>:
Here is a fix. I'll be committing it at soon as I make sure it
doesn't effect any regressions. I ran, namd, libquantum, sphinx3 and
povray and they all completed the test input with the code sourcery tool
chain. You might want to switch to vfpv3 as it has a lot more
functionality and the vmov instructions end up being very useful.
Ali
diff --git a/src/arch/arm/isa/formats/fp.isa
b/src/arch/arm/isa/formats/fp.isa
---
a/src/arch/arm/isa/formats/fp.isa
+++
b/src/arch/arm/isa/formats/fp.isa
@@ -2349,8 +2349,8 @@
case 0x7:
if
(opc3 == 0x3) {
if (single) {
- vm = (IntRegIndex)(bits(machInst, 5)
|
- (bits(machInst, 3, 0)
LLVM and CodeSourcery:
444.namd (checksum
failure)
462.libquantum (free of invalid pointer)
482.sphinx3
(runtime error - illegal log base)
LLVM only:
447.dealII (llegal
page fault)
CodeSourcery only:
445.gobmk (assertion failure)
453.povray (version number mismatch)
On Sun, Apr 17, 2011 at 11:48
AM, Ali Saidi wrote:
Specifically, could you provide us with exactly
what you're running (SE vs. FS), spec benchmark, compiler, options, etc.
Thanks,
Ali
On Apr 17, 2011, at 4:10 AM, Gabe Black wrote:
Yes,
they are fully supported. What problems are you seeing?
Gabe
On
04/16/11 20:52, Marc de Kruijf wrote: Are ARM hardware floating point
instructions fully supported in M5? When I compile with hardware FP I
see problems running some SPEC2006 benchmarks whereas I don't see the
same problems when I compile using software FP.
Thank you!
Marc
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