I would like to know the benefits one can have by using Gem5 rather than m5. Everyone cannot afford to attend the tutorial as suggested in the mail.
I would like to coduct experiment on cache optimization techniques on multicore processors. would Gem5 be more suitable? Thanks in advance HK On Mon, May 16, 2011 at 1:52 AM, <[email protected]> wrote: > Send gem5-users mailing list submissions to > [email protected] > > To subscribe or unsubscribe via the World Wide Web, visit > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > or, via email, send a message with subject or body 'help' to > [email protected] > > You can reach the person managing the list at > [email protected] > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of gem5-users digest..." > > > Today's Topics: > > 1. Mailing List Changes (Ali Saidi) > 2. application seg faults with O3 (Gedare Bloom) > 3. Re: application seg faults with O3 (Ali Saidi) > 4. Are the Gem5 codes released? (huangyongbing) > 5. how could I tie the DMA_controller to Ruby (xuewen zhou) > 6. Re: Are the Gem5 codes released? (Meng Dong) > 7. Re: Are the Gem5 codes released? (Gabe Black) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Sun, 15 May 2011 17:00:29 -0500 > From: Ali Saidi <[email protected]> > To: [email protected], [email protected], [email protected] > Subject: [gem5-users] Mailing List Changes > Message-ID: <[email protected]> > Content-Type: text/plain; charset="us-ascii" > > Hi Everyone, > > Over the past two years code from the GEMS simulator has been integrated > into the M5 simulator as part of a long term effort to merge > the two simulators into one. The new simulator will be known as gem5, > pronounced gem-five. It is the combination of tens of man years worth of > effort from a combination of academic institutions and industry. As part of > the merging the simulators together their will be a variety of changes to > the simulator and m5 website in the coming months to reflect the new > branding. One of those changes is a renaming of the mailing lists from m5-* > to gem5-*, which has just taken place. Aliases from the old names have been > created to allow for a seamless transition. As a reminder there are three > mailing lists for the gem5 simulator: > > gem5-users: General discussion about gem5 and its use. (~3 messages/day) > gem5-dev: Discussions of gem5 development, commit messages, and code > reviews (~7 messages/day) > gem5-announce: Major announcements about the gem5 simulator (~2 > messages/year) > > We will be holding a tutorial about gem5 at ISCA 2011 and encourage you to > attend. For more information on the tutorial please see: > http://www.gem5.org/ISCA_2011_Tutorial > > Thank you, > > Ali > > -------------- next part -------------- > An HTML attachment was scrubbed... > URL: < > http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20110515/f5e0b8e2/attachment-0001.html > > > > ------------------------------ > > Message: 2 > Date: Sun, 15 May 2011 20:03:26 -0400 > From: Gedare Bloom <[email protected]> > To: M5 users mailing list <[email protected]> > Subject: [gem5-users] application seg faults with O3 > Message-ID: <[email protected]> > Content-Type: text/plain; charset=ISO-8859-1 > > Hi, > > I am trying to get some baseline runs to work in ARM_FS. I have > successfully built and run the ocean (contiguous) benchmark from > SPLASH-2 on ARM_FS with both simple and timing (-t with and without > --cache) CPU with default parameters using fs.py. However, during a > run with detailed CPU (-d --caches), the ocean binary (not M5) seg > faults and control returns to the simulated system's shell. Does > anyone know some reasons that a program would crash with O3CPU but not > Atomic or Timing? > > > ------------------------------ > > Message: 3 > Date: Sun, 15 May 2011 19:52:51 -0500 > From: Ali Saidi <[email protected]> > To: gem5 users mailing list <[email protected]> > Subject: Re: [gem5-users] application seg faults with O3 > Message-ID: <[email protected]> > Content-Type: text/plain; charset=us-ascii > > Hi Gedare, > > There are a few issues with the o3 cpu that will be fixed in the next week > or so. > > Thanks, > Ali > > On May 15, 2011, at 7:03 PM, Gedare Bloom wrote: > > > Hi, > > > > I am trying to get some baseline runs to work in ARM_FS. I have > > successfully built and run the ocean (contiguous) benchmark from > > SPLASH-2 on ARM_FS with both simple and timing (-t with and without > > --cache) CPU with default parameters using fs.py. However, during a > > run with detailed CPU (-d --caches), the ocean binary (not M5) seg > > faults and control returns to the simulated system's shell. Does > > anyone know some reasons that a program would crash with O3CPU but not > > Atomic or Timing? > > _______________________________________________ > > gem5-users mailing list > > [email protected] > > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > > ------------------------------ > > Message: 4 > Date: Mon, 16 May 2011 08:58:51 +0800 > From: "huangyongbing" <[email protected]> > To: "gem5 users mailing list" <[email protected]> > Subject: [gem5-users] Are the Gem5 codes released? > Message-ID: <[email protected]> > Content-Type: text/plain; charset="gb2312" > > Hi, all > > I am confused whether the codes in gem5's website belong to gem5 or m5. > > > > -Yongbing Huang > -------------- next part -------------- > An HTML attachment was scrubbed... > URL: < > http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20110516/6dbf3e3e/attachment-0001.html > > > > ------------------------------ > > Message: 5 > Date: Mon, 16 May 2011 15:56:29 +0800 > From: xuewen zhou <[email protected]> > To: M5 users mailing list <[email protected]> > Subject: [gem5-users] how could I tie the DMA_controller to Ruby > Message-ID: <[email protected]> > Content-Type: text/plain; charset="gb2312" > > hello? everyone ?could someone tell me how could I tie the DMA_controller > to > the Ruby system ?thank you very much? > > -- > Xuewen Zhou Master > Shanghai Jiaotong University > School of Microelectronics > National Engineering Laboratory For Automotive Electronic Control > Technology > 800 Dongchuan Road, Shanghai 200240, P. R. China > Phone : 13062728106 > -------------- next part -------------- > An HTML attachment was scrubbed... > URL: < > http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20110516/e6dbdc6b/attachment-0001.html > > > > ------------------------------ > > Message: 6 > Date: Mon, 16 May 2011 16:34:45 +0800 > From: Meng Dong <[email protected]> > To: gem5 users mailing list <[email protected]> > Subject: Re: [gem5-users] Are the Gem5 codes released? > Message-ID: <[email protected]> > Content-Type: text/plain; charset="gb2312" > > I think it's still M5 > > ? 2011?5?16? ??8:58?huangyongbing <[email protected]>??? > > > Hi, all > > > > I am confused whether the codes in gem5's website belong to gem5 or m5. > > > > > > > > -Yongbing Huang > > > > _______________________________________________ > > gem5-users mailing list > > [email protected] > > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > > -- > Yours,Dongmeng > -------------- next part -------------- > An HTML attachment was scrubbed... > URL: < > http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20110516/31b04777/attachment-0001.html > > > > ------------------------------ > > Message: 7 > Date: Mon, 16 May 2011 04:51:59 -0400 > From: Gabe Black <[email protected]> > To: [email protected] > Subject: Re: [gem5-users] Are the Gem5 codes released? > Message-ID: <[email protected]> > Content-Type: text/plain; charset="gb2312" > > M5 is now part of the gem5 simulator along with GEMS. The gem5 website > is for gem5 which contains m5 and GEMS. We've been combining into gem5 > for a long time, so the main difference from a few days ago is that the > name changed. You'll still be able to get all the same code from the > same repositories. We're calling ourselves something different now > because we're not just M5 any more, but everything else is the same. > > Gabe > > On 05/16/11 04:34, Meng Dong wrote: > > I think it's still M5 > > > > ? 2011?5?16? ??8:58?huangyongbing <[email protected] > > <mailto:[email protected]>>? ?? > > > > Hi, all > > I am confused whether the codes in gem5's website belong to gem5 > > or m5. > > -Yongbing Huang > > > > _______________________________________________ > > gem5-users mailing list > > [email protected] <mailto:[email protected]> > > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > > > > > > -- > > Yours,Dongmeng > > > > > > _______________________________________________ > > gem5-users mailing list > > [email protected] > > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > -------------- next part -------------- > An HTML attachment was scrubbed... > URL: < > http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20110516/581f074c/attachment.html > > > > ------------------------------ > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > End of gem5-users Digest, Vol 58, Issue 33 > ****************************************** > -- Department of Computer Science National University of Computer and Emerging Sciences (FAST-NU) Karachi Campus (Main)
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