Hi,
I want to create a separate port interface between the L1 DCache and the CPU
in the ALPHA SE, InOrder model. I am defining a new
resource(NewResourceUnit below) in the inorder unit that derives from the
CacheUnit class and will handle this new port. The following are the changes
I have made so far:-
1) InOrderCPU.py
newMemPort = Param.String("new_dcache_port", "Name of the New port")
new_dcache_port = Port("New Data Cache Port")
_cached_ports = ['icache_port', 'dcache_port', 'new_dcache_port']
2) cpu.cc , constructor
newPortIdx = resPool->getPortIdx(params->newMemPort);
if(newPortIdx == 0) {
fatal("Unable to find for new data port\n");
}
3) New_Resource.hh
class NewResourceUnit : public CacheUnit
{ }
4) Resource_Pool.cc
memObjects.push_back(NewResource);
resources.push_back(new NewResourceUnit("new_dcache_port", NewResource,
1, 0, _cpu, params));
It compiles correctly, but gives a runtime error of the following:
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
panic: default_port: Unconnected port!
@ cycle 0
[blowUp:build/ALPHA_SE/mem/port.cc, line 47]
Memory Usage: 2163428 KBytes
I am getting this error as I am not connecting this port to the appropriate
peer cache cpu side port. Can any body suggest where do I make modifications
for setting the peer port properly? Which files can I look into?
Thanks,
Reena
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