commit:     c0f4501dfe9627eba4c97dfa49e60cece23aa457
Author:     Michał Górny <mgorny <AT> gentoo <DOT> org>
AuthorDate: Mon Oct 13 02:21:54 2025 +0000
Commit:     Michał Górny <mgorny <AT> gentoo <DOT> org>
CommitDate: Mon Oct 13 02:55:23 2025 +0000
URL:        https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=c0f4501d

dev-python/crc32c: Bump to 2.7.1_p0

Signed-off-by: Michał Górny <mgorny <AT> gentoo.org>

 dev-python/crc32c/Manifest               |  1 +
 dev-python/crc32c/crc32c-2.7.1_p0.ebuild | 46 ++++++++++++++++++++++++++++++++
 2 files changed, 47 insertions(+)

diff --git a/dev-python/crc32c/Manifest b/dev-python/crc32c/Manifest
index 87bc513c1a4f..af0f7686fc5b 100644
--- a/dev-python/crc32c/Manifest
+++ b/dev-python/crc32c/Manifest
@@ -1 +1,2 @@
+DIST crc32c-2.7.1.post0.tar.gz 46574 BLAKE2B 
e4241f9ba5416323130b80510e5adff0f0adc3f29a3565ab62af32754d452eba90c934ead2468e0c3525fbbdb2e7742bf86130e9be86e9f08d70bc1232a8026f
 SHA512 
d89a9b34db7b9cf9b8255105c3054b1aa4de7c391630720f4df226e4efcc6a860c3eb5b18a9e1baee8dc9422c7ffa0c2067c5700aff53d3072b47a1c3b33d864
 DIST crc32c-2.7.1.tar.gz 45712 BLAKE2B 
1aec82c981aaa4ff1e0858fb60df437c9c54cec5642cf5726c202ed1a682e9cf27ee2eeb6858ef3832fcbddbe9ffc244ce9bb1c8ffeeb4135a00858db3066d2a
 SHA512 
2240339fa6b82ac16f5e4bf70d933a65dc2d32d4cbf62daaa1ba7d3dae0194de64a6e48c62a519dcdd261178b869abc0853634c45df14d23076f08dc2535225d

diff --git a/dev-python/crc32c/crc32c-2.7.1_p0.ebuild 
b/dev-python/crc32c/crc32c-2.7.1_p0.ebuild
new file mode 100644
index 000000000000..731192ee18ba
--- /dev/null
+++ b/dev-python/crc32c/crc32c-2.7.1_p0.ebuild
@@ -0,0 +1,46 @@
+# Copyright 2024-2025 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+DISTUTILS_EXT=1
+DISTUTILS_USE_PEP517=setuptools
+PYTHON_COMPAT=( pypy3_11 python3_{11..14} )
+
+inherit distutils-r1 pypi
+
+DESCRIPTION="CRC32c algorithm in hardware and software"
+HOMEPAGE="
+       https://github.com/ICRAR/crc32c/
+       https://pypi.org/project/crc32c/
+"
+
+LICENSE="LGPL-2.1+"
+SLOT="0"
+KEYWORDS="~amd64 ~arm ~arm64 ~riscv ~sparc ~x86"
+# NB: these don't affect the build, they are only used for tests
+IUSE="cpu_flags_arm_crc32 cpu_flags_x86_sse4_2"
+
+EPYTEST_PLUGINS=()
+distutils_enable_tests pytest
+
+python_test() {
+       local -x CRC32C_SW_MODE
+
+       # force = run "software" code (i.e. unoptimized)
+       # none = run "hardware" code (i.e. SSE4.2 / ARMv8 CRC32)
+       for CRC32C_SW_MODE in none force; do
+               if [[ ${CRC32C_SW_MODE} == none ]]; then
+                       if ! use cpu_flags_arm_crc32 && ! use 
cpu_flags_x86_sse4_2; then
+                               continue
+                       fi
+
+                       # the test suite just skips all tests, so double-check
+                       "${EPYTHON}" -c "import crc32c" ||
+                               die "Importing crc32c failed (accelerated code 
path broken?)"
+               fi
+
+               einfo "Testing with CRC32C_SW_MODE=${CRC32C_SW_MODE}"
+               epytest
+       done
+}

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