commit: 8f2b461875c44efdd4cc8d0f80537f69c8ccf5a3 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Mon Sep 14 15:20:19 2015 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Mon Sep 14 15:20:19 2015 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=8f2b4618
Linux patch 4.1.7 0000_README | 4 + 1006_linux-4.1.7.patch | 3075 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 3079 insertions(+) diff --git a/0000_README b/0000_README index 83ddebf..ad474e3 100644 --- a/0000_README +++ b/0000_README @@ -67,6 +67,10 @@ Patch: 1005_linux-4.1.6.patch From: http://www.kernel.org Desc: Linux 4.1.6 +Patch: 1006_linux-4.1.7.patch +From: http://www.kernel.org +Desc: Linux 4.1.7 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1006_linux-4.1.7.patch b/1006_linux-4.1.7.patch new file mode 100644 index 0000000..8d4a5d9 --- /dev/null +++ b/1006_linux-4.1.7.patch @@ -0,0 +1,3075 @@ +diff --git a/Makefile b/Makefile +index 838dabcb7f48..b8591e5f79b8 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,6 +1,6 @@ + VERSION = 4 + PATCHLEVEL = 1 +-SUBLEVEL = 6 ++SUBLEVEL = 7 + EXTRAVERSION = + NAME = Series 4800 + +diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi +index f03a091cd076..dfcc0dd637e5 100644 +--- a/arch/arm/boot/dts/dra7.dtsi ++++ b/arch/arm/boot/dts/dra7.dtsi +@@ -116,7 +116,7 @@ + ranges = <0 0x2000 0x2000>; + + scm_conf: scm_conf@0 { +- compatible = "syscon"; ++ compatible = "syscon", "simple-bus"; + reg = <0x0 0x1400>; + #address-cells = <1>; + #size-cells = <1>; +diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi +index f74a8ded515f..38c786018a09 100644 +--- a/arch/arm/boot/dts/imx6qdl.dtsi ++++ b/arch/arm/boot/dts/imx6qdl.dtsi +@@ -153,10 +153,10 @@ + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; +- interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, +- <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, +- <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, +- <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; ++ interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, ++ <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, ++ <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, ++ <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, + <&clks IMX6QDL_CLK_LVDS1_GATE>, + <&clks IMX6QDL_CLK_PCIE_REF_125M>; +diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi +index 11a7963be003..2390f387c271 100644 +--- a/arch/arm/boot/dts/omap2430.dtsi ++++ b/arch/arm/boot/dts/omap2430.dtsi +@@ -51,7 +51,8 @@ + }; + + scm_conf: scm_conf@270 { +- compatible = "syscon"; ++ compatible = "syscon", ++ "simple-bus"; + reg = <0x270 0x240>; + #address-cells = <1>; + #size-cells = <1>; +diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi +index f884d6adb71e..84be9da74c7e 100644 +--- a/arch/arm/boot/dts/omap4.dtsi ++++ b/arch/arm/boot/dts/omap4.dtsi +@@ -191,7 +191,8 @@ + }; + + omap4_padconf_global: omap4_padconf_global@5a0 { +- compatible = "syscon"; ++ compatible = "syscon", ++ "simple-bus"; + reg = <0x5a0 0x170>; + #address-cells = <1>; + #size-cells = <1>; +diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi +index 7d24ae0306b5..874a26f9dc0f 100644 +--- a/arch/arm/boot/dts/omap5.dtsi ++++ b/arch/arm/boot/dts/omap5.dtsi +@@ -180,7 +180,8 @@ + }; + + omap5_padconf_global: omap5_padconf_global@5a0 { +- compatible = "syscon"; ++ compatible = "syscon", ++ "simple-bus"; + reg = <0x5a0 0xec>; + #address-cells = <1>; + #size-cells = <1>; +diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile +index 4c38674c73ec..54d274da7ccb 100644 +--- a/arch/arm/mach-bcm/Makefile ++++ b/arch/arm/mach-bcm/Makefile +@@ -43,5 +43,5 @@ obj-$(CONFIG_ARCH_BCM_63XX) := bcm63xx.o + ifeq ($(CONFIG_ARCH_BRCMSTB),y) + CFLAGS_platsmp-brcmstb.o += -march=armv7-a + obj-y += brcmstb.o +-obj-$(CONFIG_SMP) += headsmp-brcmstb.o platsmp-brcmstb.o ++obj-$(CONFIG_SMP) += platsmp-brcmstb.o + endif +diff --git a/arch/arm/mach-bcm/brcmstb.h b/arch/arm/mach-bcm/brcmstb.h +deleted file mode 100644 +index ec0c3d112b36..000000000000 +--- a/arch/arm/mach-bcm/brcmstb.h ++++ /dev/null +@@ -1,19 +0,0 @@ +-/* +- * Copyright (C) 2013-2014 Broadcom Corporation +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation version 2. +- * +- * This program is distributed "as is" WITHOUT ANY WARRANTY of any +- * kind, whether express or implied; without even the implied warranty +- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- */ +- +-#ifndef __BRCMSTB_H__ +-#define __BRCMSTB_H__ +- +-void brcmstb_secondary_startup(void); +- +-#endif /* __BRCMSTB_H__ */ +diff --git a/arch/arm/mach-bcm/headsmp-brcmstb.S b/arch/arm/mach-bcm/headsmp-brcmstb.S +deleted file mode 100644 +index 199c1ea58248..000000000000 +--- a/arch/arm/mach-bcm/headsmp-brcmstb.S ++++ /dev/null +@@ -1,33 +0,0 @@ +-/* +- * SMP boot code for secondary CPUs +- * Based on arch/arm/mach-tegra/headsmp.S +- * +- * Copyright (C) 2010 NVIDIA, Inc. +- * Copyright (C) 2013-2014 Broadcom Corporation +- * +- * This program is free software; you can redistribute it and/or +- * modify it under the terms of the GNU General Public License as +- * published by the Free Software Foundation version 2. +- * +- * This program is distributed "as is" WITHOUT ANY WARRANTY of any +- * kind, whether express or implied; without even the implied warranty +- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- */ +- +-#include <asm/assembler.h> +-#include <linux/linkage.h> +-#include <linux/init.h> +- +- .section ".text.head", "ax" +- +-ENTRY(brcmstb_secondary_startup) +- /* +- * Ensure CPU is in a sane state by disabling all IRQs and switching +- * into SVC mode. +- */ +- setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r0 +- +- bl v7_invalidate_l1 +- b secondary_startup +-ENDPROC(brcmstb_secondary_startup) +diff --git a/arch/arm/mach-bcm/platsmp-brcmstb.c b/arch/arm/mach-bcm/platsmp-brcmstb.c +index e209e6fc7caf..44d6bddf7a4e 100644 +--- a/arch/arm/mach-bcm/platsmp-brcmstb.c ++++ b/arch/arm/mach-bcm/platsmp-brcmstb.c +@@ -30,8 +30,6 @@ + #include <asm/mach-types.h> + #include <asm/smp_plat.h> + +-#include "brcmstb.h" +- + enum { + ZONE_MAN_CLKEN_MASK = BIT(0), + ZONE_MAN_RESET_CNTL_MASK = BIT(1), +@@ -153,7 +151,7 @@ static void brcmstb_cpu_boot(u32 cpu) + * Set the reset vector to point to the secondary_startup + * routine + */ +- cpu_set_boot_addr(cpu, virt_to_phys(brcmstb_secondary_startup)); ++ cpu_set_boot_addr(cpu, virt_to_phys(secondary_startup)); + + /* Unhalt the cpu */ + cpu_rst_cfg_set(cpu, 0); +diff --git a/arch/arm/mach-berlin/headsmp.S b/arch/arm/mach-berlin/headsmp.S +index 4a4c56a58ad3..dc82a3486b05 100644 +--- a/arch/arm/mach-berlin/headsmp.S ++++ b/arch/arm/mach-berlin/headsmp.S +@@ -12,12 +12,6 @@ + #include <linux/init.h> + #include <asm/assembler.h> + +-ENTRY(berlin_secondary_startup) +- ARM_BE8(setend be) +- bl v7_invalidate_l1 +- b secondary_startup +-ENDPROC(berlin_secondary_startup) +- + /* + * If the following instruction is set in the reset exception vector, CPUs + * will fetch the value of the software reset address vector when being +diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c +index 702e7982015a..34a3753e7356 100644 +--- a/arch/arm/mach-berlin/platsmp.c ++++ b/arch/arm/mach-berlin/platsmp.c +@@ -22,7 +22,6 @@ + #define RESET_VECT 0x00 + #define SW_RESET_ADDR 0x94 + +-extern void berlin_secondary_startup(void); + extern u32 boot_inst; + + static void __iomem *cpu_ctrl; +@@ -85,7 +84,7 @@ static void __init berlin_smp_prepare_cpus(unsigned int max_cpus) + * Write the secondary startup address into the SW reset address + * vector. This is used by boot_inst. + */ +- writel(virt_to_phys(berlin_secondary_startup), vectors_base + SW_RESET_ADDR); ++ writel(virt_to_phys(secondary_startup), vectors_base + SW_RESET_ADDR); + + iounmap(vectors_base); + unmap_scu: +diff --git a/arch/arm/mach-hisi/Makefile b/arch/arm/mach-hisi/Makefile +index 6b7b3033de0b..659db1933ed3 100644 +--- a/arch/arm/mach-hisi/Makefile ++++ b/arch/arm/mach-hisi/Makefile +@@ -6,4 +6,4 @@ CFLAGS_platmcpm.o := -march=armv7-a + + obj-y += hisilicon.o + obj-$(CONFIG_MCPM) += platmcpm.o +-obj-$(CONFIG_SMP) += platsmp.o hotplug.o headsmp.o ++obj-$(CONFIG_SMP) += platsmp.o hotplug.o +diff --git a/arch/arm/mach-hisi/core.h b/arch/arm/mach-hisi/core.h +index 92a682d8e939..c7648ef1825c 100644 +--- a/arch/arm/mach-hisi/core.h ++++ b/arch/arm/mach-hisi/core.h +@@ -12,7 +12,6 @@ extern void hi3xxx_cpu_die(unsigned int cpu); + extern int hi3xxx_cpu_kill(unsigned int cpu); + extern void hi3xxx_set_cpu(int cpu, bool enable); + +-extern void hisi_secondary_startup(void); + extern struct smp_operations hix5hd2_smp_ops; + extern void hix5hd2_set_cpu(int cpu, bool enable); + extern void hix5hd2_cpu_die(unsigned int cpu); +diff --git a/arch/arm/mach-hisi/headsmp.S b/arch/arm/mach-hisi/headsmp.S +deleted file mode 100644 +index 81e35b159e75..000000000000 +--- a/arch/arm/mach-hisi/headsmp.S ++++ /dev/null +@@ -1,16 +0,0 @@ +-/* +- * Copyright (c) 2014 Hisilicon Limited. +- * Copyright (c) 2014 Linaro Ltd. +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- */ +-#include <linux/linkage.h> +-#include <linux/init.h> +- +- __CPUINIT +- +-ENTRY(hisi_secondary_startup) +- bl v7_invalidate_l1 +- b secondary_startup +diff --git a/arch/arm/mach-hisi/platsmp.c b/arch/arm/mach-hisi/platsmp.c +index 8880c8e8b296..51744127db66 100644 +--- a/arch/arm/mach-hisi/platsmp.c ++++ b/arch/arm/mach-hisi/platsmp.c +@@ -118,7 +118,7 @@ static int hix5hd2_boot_secondary(unsigned int cpu, struct task_struct *idle) + { + phys_addr_t jumpaddr; + +- jumpaddr = virt_to_phys(hisi_secondary_startup); ++ jumpaddr = virt_to_phys(secondary_startup); + hix5hd2_set_scu_boot_addr(HIX5HD2_BOOT_ADDRESS, jumpaddr); + hix5hd2_set_cpu(cpu, true); + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); +@@ -156,7 +156,7 @@ static int hip01_boot_secondary(unsigned int cpu, struct task_struct *idle) + struct device_node *node; + + +- jumpaddr = virt_to_phys(hisi_secondary_startup); ++ jumpaddr = virt_to_phys(secondary_startup); + hip01_set_boot_addr(HIP01_BOOT_ADDRESS, jumpaddr); + + node = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl"); +diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S +index de5047c8a6c8..b5e976816b63 100644 +--- a/arch/arm/mach-imx/headsmp.S ++++ b/arch/arm/mach-imx/headsmp.S +@@ -25,7 +25,6 @@ diag_reg_offset: + .endm + + ENTRY(v7_secondary_startup) +- bl v7_invalidate_l1 + set_diag_reg + b secondary_startup + ENDPROC(v7_secondary_startup) +diff --git a/arch/arm/mach-mvebu/headsmp-a9.S b/arch/arm/mach-mvebu/headsmp-a9.S +index 08d5ed46b996..48e4c4b3cd1c 100644 +--- a/arch/arm/mach-mvebu/headsmp-a9.S ++++ b/arch/arm/mach-mvebu/headsmp-a9.S +@@ -21,7 +21,6 @@ + + ENTRY(mvebu_cortex_a9_secondary_startup) + ARM_BE8(setend be) +- bl v7_invalidate_l1 + bl armada_38x_scu_power_up + b secondary_startup + ENDPROC(mvebu_cortex_a9_secondary_startup) +diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c +index 3b56722dfd8a..6833df45d7b1 100644 +--- a/arch/arm/mach-omap2/omap-wakeupgen.c ++++ b/arch/arm/mach-omap2/omap-wakeupgen.c +@@ -392,6 +392,7 @@ static struct irq_chip wakeupgen_chip = { + .irq_mask = wakeupgen_mask, + .irq_unmask = wakeupgen_unmask, + .irq_retrigger = irq_chip_retrigger_hierarchy, ++ .irq_set_type = irq_chip_set_type_parent, + .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, + #ifdef CONFIG_SMP + .irq_set_affinity = irq_chip_set_affinity_parent, +diff --git a/arch/arm/mach-prima2/headsmp.S b/arch/arm/mach-prima2/headsmp.S +index d86fe33c5f53..209d9fc5c16c 100644 +--- a/arch/arm/mach-prima2/headsmp.S ++++ b/arch/arm/mach-prima2/headsmp.S +@@ -15,7 +15,6 @@ + * ready for them to initialise. + */ + ENTRY(sirfsoc_secondary_startup) +- bl v7_invalidate_l1 + mrc p15, 0, r0, c0, c0, 5 + and r0, r0, #15 + adr r4, 1f +diff --git a/arch/arm/mach-rockchip/core.h b/arch/arm/mach-rockchip/core.h +index 39bca96b555a..492c048813da 100644 +--- a/arch/arm/mach-rockchip/core.h ++++ b/arch/arm/mach-rockchip/core.h +@@ -17,4 +17,3 @@ extern char rockchip_secondary_trampoline; + extern char rockchip_secondary_trampoline_end; + + extern unsigned long rockchip_boot_fn; +-extern void rockchip_secondary_startup(void); +diff --git a/arch/arm/mach-rockchip/headsmp.S b/arch/arm/mach-rockchip/headsmp.S +index 46c22dedf632..d69708b07282 100644 +--- a/arch/arm/mach-rockchip/headsmp.S ++++ b/arch/arm/mach-rockchip/headsmp.S +@@ -15,14 +15,6 @@ + #include <linux/linkage.h> + #include <linux/init.h> + +-ENTRY(rockchip_secondary_startup) +- mrc p15, 0, r0, c0, c0, 0 @ read main ID register +- ldr r1, =0x00000c09 @ Cortex-A9 primary part number +- teq r0, r1 +- beq v7_invalidate_l1 +- b secondary_startup +-ENDPROC(rockchip_secondary_startup) +- + ENTRY(rockchip_secondary_trampoline) + ldr pc, 1f + ENDPROC(rockchip_secondary_trampoline) +diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c +index 5b4ca3c3c879..2e6ab67e2284 100644 +--- a/arch/arm/mach-rockchip/platsmp.c ++++ b/arch/arm/mach-rockchip/platsmp.c +@@ -149,8 +149,7 @@ static int __cpuinit rockchip_boot_secondary(unsigned int cpu, + * sram_base_addr + 8: start address for pc + * */ + udelay(10); +- writel(virt_to_phys(rockchip_secondary_startup), +- sram_base_addr + 8); ++ writel(virt_to_phys(secondary_startup), sram_base_addr + 8); + writel(0xDEADBEAF, sram_base_addr + 4); + dsb_sev(); + } +@@ -189,7 +188,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node) + } + + /* set the boot function for the sram code */ +- rockchip_boot_fn = virt_to_phys(rockchip_secondary_startup); ++ rockchip_boot_fn = virt_to_phys(secondary_startup); + + /* copy the trampoline to sram, that runs during startup of the core */ + memcpy(sram_base_addr, &rockchip_secondary_trampoline, trampoline_sz); +diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h +index afc60bad6fd6..476092b86c6e 100644 +--- a/arch/arm/mach-shmobile/common.h ++++ b/arch/arm/mach-shmobile/common.h +@@ -14,7 +14,6 @@ extern void shmobile_smp_sleep(void); + extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn, + unsigned long arg); + extern int shmobile_smp_cpu_disable(unsigned int cpu); +-extern void shmobile_invalidate_start(void); + extern void shmobile_boot_scu(void); + extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus); + extern void shmobile_smp_scu_cpu_die(unsigned int cpu); +diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S +index 69df8bfac167..fa5248c52399 100644 +--- a/arch/arm/mach-shmobile/headsmp-scu.S ++++ b/arch/arm/mach-shmobile/headsmp-scu.S +@@ -22,7 +22,7 @@ + * Boot code for secondary CPUs. + * + * First we turn on L1 cache coherency for our CPU. Then we jump to +- * shmobile_invalidate_start that invalidates the cache and hands over control ++ * secondary_startup that invalidates the cache and hands over control + * to the common ARM startup code. + */ + ENTRY(shmobile_boot_scu) +@@ -36,7 +36,7 @@ ENTRY(shmobile_boot_scu) + bic r2, r2, r3 @ Clear bits of our CPU (Run Mode) + str r2, [r0, #8] @ write back + +- b shmobile_invalidate_start ++ b secondary_startup + ENDPROC(shmobile_boot_scu) + + .text +diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S +index 50c491567e11..330c1fc63197 100644 +--- a/arch/arm/mach-shmobile/headsmp.S ++++ b/arch/arm/mach-shmobile/headsmp.S +@@ -16,13 +16,6 @@ + #include <asm/assembler.h> + #include <asm/memory.h> + +-#ifdef CONFIG_SMP +-ENTRY(shmobile_invalidate_start) +- bl v7_invalidate_l1 +- b secondary_startup +-ENDPROC(shmobile_invalidate_start) +-#endif +- + /* + * Reset vector for secondary CPUs. + * This will be mapped at address 0 by SBAR register. +diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c +index f483b560b066..b0790fc32282 100644 +--- a/arch/arm/mach-shmobile/platsmp-apmu.c ++++ b/arch/arm/mach-shmobile/platsmp-apmu.c +@@ -133,7 +133,7 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus, + int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) + { + /* For this particular CPU register boot vector */ +- shmobile_smp_hook(cpu, virt_to_phys(shmobile_invalidate_start), 0); ++ shmobile_smp_hook(cpu, virt_to_phys(secondary_startup), 0); + + return apmu_wrap(cpu, apmu_power_on); + } +diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h +index a0f3b1cd497c..767c09e954a0 100644 +--- a/arch/arm/mach-socfpga/core.h ++++ b/arch/arm/mach-socfpga/core.h +@@ -31,7 +31,6 @@ + + #define RSTMGR_MPUMODRST_CPU1 0x2 /* CPU1 Reset */ + +-extern void socfpga_secondary_startup(void); + extern void __iomem *socfpga_scu_base_addr; + + extern void socfpga_init_clocks(void); +diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S +index f65ea0af4af3..5bb016427107 100644 +--- a/arch/arm/mach-socfpga/headsmp.S ++++ b/arch/arm/mach-socfpga/headsmp.S +@@ -30,8 +30,3 @@ ENTRY(secondary_trampoline) + 1: .long . + .long socfpga_cpu1start_addr + ENTRY(secondary_trampoline_end) +- +-ENTRY(socfpga_secondary_startup) +- bl v7_invalidate_l1 +- b secondary_startup +-ENDPROC(socfpga_secondary_startup) +diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c +index c64d89b7c0ca..79c5336c569f 100644 +--- a/arch/arm/mach-socfpga/platsmp.c ++++ b/arch/arm/mach-socfpga/platsmp.c +@@ -40,7 +40,7 @@ static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) + + memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); + +- writel(virt_to_phys(socfpga_secondary_startup), ++ writel(virt_to_phys(secondary_startup), + sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff)); + + flush_cache_all(); +diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile +index e48a74458c25..fffad2426ee4 100644 +--- a/arch/arm/mach-tegra/Makefile ++++ b/arch/arm/mach-tegra/Makefile +@@ -19,7 +19,7 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o + ifeq ($(CONFIG_CPU_IDLE),y) + obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o + endif +-obj-$(CONFIG_SMP) += platsmp.o headsmp.o ++obj-$(CONFIG_SMP) += platsmp.o + obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o + + obj-$(CONFIG_ARCH_TEGRA_114_SOC) += sleep-tegra30.o +diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S +deleted file mode 100644 +index 2072e7322c39..000000000000 +--- a/arch/arm/mach-tegra/headsmp.S ++++ /dev/null +@@ -1,12 +0,0 @@ +-#include <linux/linkage.h> +-#include <linux/init.h> +- +-#include "sleep.h" +- +- .section ".text.head", "ax" +- +-ENTRY(tegra_secondary_startup) +- check_cpu_part_num 0xc09, r8, r9 +- bleq v7_invalidate_l1 +- b secondary_startup +-ENDPROC(tegra_secondary_startup) +diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c +index 894c5c472184..6fd9db54887e 100644 +--- a/arch/arm/mach-tegra/reset.c ++++ b/arch/arm/mach-tegra/reset.c +@@ -94,7 +94,7 @@ void __init tegra_cpu_reset_handler_init(void) + __tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_PRESENT] = + *((u32 *)cpu_possible_mask); + __tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_SECONDARY] = +- virt_to_phys((void *)tegra_secondary_startup); ++ virt_to_phys((void *)secondary_startup); + #endif + + #ifdef CONFIG_PM_SLEEP +diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h +index 29c3dec0126a..9c479c7925b8 100644 +--- a/arch/arm/mach-tegra/reset.h ++++ b/arch/arm/mach-tegra/reset.h +@@ -37,7 +37,6 @@ void __tegra_cpu_reset_handler_start(void); + void __tegra_cpu_reset_handler(void); + void __tegra20_cpu1_resettable_status_offset(void); + void __tegra_cpu_reset_handler_end(void); +-void tegra_secondary_startup(void); + + #ifdef CONFIG_PM_SLEEP + #define tegra_cpu_lp1_mask \ +diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h +index 382c60e9aa16..7038cae95ddc 100644 +--- a/arch/arm/mach-zynq/common.h ++++ b/arch/arm/mach-zynq/common.h +@@ -17,8 +17,6 @@ + #ifndef __MACH_ZYNQ_COMMON_H__ + #define __MACH_ZYNQ_COMMON_H__ + +-void zynq_secondary_startup(void); +- + extern int zynq_slcr_init(void); + extern int zynq_early_slcr_init(void); + extern void zynq_slcr_system_reset(void); +diff --git a/arch/arm/mach-zynq/headsmp.S b/arch/arm/mach-zynq/headsmp.S +index dd8c071941e7..045c72720a4d 100644 +--- a/arch/arm/mach-zynq/headsmp.S ++++ b/arch/arm/mach-zynq/headsmp.S +@@ -22,8 +22,3 @@ zynq_secondary_trampoline_jump: + .globl zynq_secondary_trampoline_end + zynq_secondary_trampoline_end: + ENDPROC(zynq_secondary_trampoline) +- +-ENTRY(zynq_secondary_startup) +- bl v7_invalidate_l1 +- b secondary_startup +-ENDPROC(zynq_secondary_startup) +diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c +index 52d768ff7857..f66816c49186 100644 +--- a/arch/arm/mach-zynq/platsmp.c ++++ b/arch/arm/mach-zynq/platsmp.c +@@ -87,10 +87,9 @@ int zynq_cpun_start(u32 address, int cpu) + } + EXPORT_SYMBOL(zynq_cpun_start); + +-static int zynq_boot_secondary(unsigned int cpu, +- struct task_struct *idle) ++static int zynq_boot_secondary(unsigned int cpu, struct task_struct *idle) + { +- return zynq_cpun_start(virt_to_phys(zynq_secondary_startup), cpu); ++ return zynq_cpun_start(virt_to_phys(secondary_startup), cpu); + } + + /* +diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S +index 3d1054f11a8a..7911f14c2157 100644 +--- a/arch/arm/mm/proc-v7.S ++++ b/arch/arm/mm/proc-v7.S +@@ -268,7 +268,10 @@ __v7_ca15mp_setup: + __v7_b15mp_setup: + __v7_ca17mp_setup: + mov r10, #0 +-1: ++1: adr r12, __v7_setup_stack @ the local stack ++ stmia r12, {r0-r5, lr} @ v7_invalidate_l1 touches r0-r6 ++ bl v7_invalidate_l1 ++ ldmia r12, {r0-r5, lr} + #ifdef CONFIG_SMP + ALT_SMP(mrc p15, 0, r0, c1, c0, 1) + ALT_UP(mov r0, #(1 << 6)) @ fake it for UP +@@ -277,7 +280,7 @@ __v7_ca17mp_setup: + orreq r0, r0, r10 @ Enable CPU-specific SMP bits + mcreq p15, 0, r0, c1, c0, 1 + #endif +- b __v7_setup ++ b __v7_setup_cont + + __v7_pj4b_setup: + #ifdef CONFIG_CPU_PJ4B +@@ -335,10 +338,11 @@ __v7_pj4b_setup: + + __v7_setup: + adr r12, __v7_setup_stack @ the local stack +- stmia r12, {r0-r5, r7, r9, r11, lr} +- bl v7_flush_dcache_louis +- ldmia r12, {r0-r5, r7, r9, r11, lr} ++ stmia r12, {r0-r5, lr} @ v7_invalidate_l1 touches r0-r6 ++ bl v7_invalidate_l1 ++ ldmia r12, {r0-r5, lr} + ++__v7_setup_cont: + mrc p15, 0, r0, c0, c0, 0 @ read main ID register + and r10, r0, #0xff000000 @ ARM? + teq r10, #0x41000000 +@@ -460,7 +464,7 @@ ENDPROC(__v7_setup) + + .align 2 + __v7_setup_stack: +- .space 4 * 11 @ 11 registers ++ .space 4 * 7 @ 12 registers + + __INITDATA + +diff --git a/arch/arm/vdso/Makefile b/arch/arm/vdso/Makefile +index 8aa791051029..1160434eece0 100644 +--- a/arch/arm/vdso/Makefile ++++ b/arch/arm/vdso/Makefile +@@ -6,9 +6,15 @@ obj-vdso := vgettimeofday.o datapage.o + targets := $(obj-vdso) vdso.so vdso.so.dbg vdso.so.raw vdso.lds + obj-vdso := $(addprefix $(obj)/, $(obj-vdso)) + +-ccflags-y := -shared -fPIC -fno-common -fno-builtin -fno-stack-protector +-ccflags-y += -nostdlib -Wl,-soname=linux-vdso.so.1 -DDISABLE_BRANCH_PROFILING +-ccflags-y += -Wl,--no-undefined $(call cc-ldoption, -Wl$(comma)--hash-style=sysv) ++ccflags-y := -fPIC -fno-common -fno-builtin -fno-stack-protector ++ccflags-y += -DDISABLE_BRANCH_PROFILING ++ ++VDSO_LDFLAGS := -Wl,-Bsymbolic -Wl,--no-undefined -Wl,-soname=linux-vdso.so.1 ++VDSO_LDFLAGS += -Wl,-z,max-page-size=4096 -Wl,-z,common-page-size=4096 ++VDSO_LDFLAGS += -nostdlib -shared ++VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--hash-style=sysv) ++VDSO_LDFLAGS += $(call cc-ldoption, -Wl$(comma)--build-id) ++VDSO_LDFLAGS += $(call cc-ldoption, -fuse-ld=bfd) + + obj-$(CONFIG_VDSO) += vdso.o + extra-$(CONFIG_VDSO) += vdso.lds +@@ -40,10 +46,8 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE + + # Actual build commands + quiet_cmd_vdsold = VDSO $@ +- cmd_vdsold = $(CC) $(c_flags) -Wl,-T $(filter %.lds,$^) $(filter %.o,$^) \ +- $(call cc-ldoption, -Wl$(comma)--build-id) \ +- -Wl,-Bsymbolic -Wl,-z,max-page-size=4096 \ +- -Wl,-z,common-page-size=4096 -o $@ ++ cmd_vdsold = $(CC) $(c_flags) $(VDSO_LDFLAGS) \ ++ -Wl,-T $(filter %.lds,$^) $(filter %.o,$^) -o $@ + + quiet_cmd_vdsomunge = MUNGE $@ + cmd_vdsomunge = $(objtree)/$(obj)/vdsomunge $< $@ +diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c +index cce18c85d2e8..7778453762d8 100644 +--- a/arch/arm64/kernel/perf_event.c ++++ b/arch/arm64/kernel/perf_event.c +@@ -1318,7 +1318,7 @@ static int armpmu_device_probe(struct platform_device *pdev) + /* Don't bother with PPIs; they're already affine */ + irq = platform_get_irq(pdev, 0); + if (irq >= 0 && irq_is_percpu(irq)) +- return 0; ++ goto out; + + irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL); + if (!irqs) +@@ -1355,6 +1355,7 @@ static int armpmu_device_probe(struct platform_device *pdev) + else + kfree(irqs); + ++out: + cpu_pmu->plat_device = pdev; + return 0; + } +diff --git a/arch/arm64/kvm/inject_fault.c b/arch/arm64/kvm/inject_fault.c +index f02530e726f6..85c57158dcd9 100644 +--- a/arch/arm64/kvm/inject_fault.c ++++ b/arch/arm64/kvm/inject_fault.c +@@ -168,8 +168,8 @@ void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr) + { + if (!(vcpu->arch.hcr_el2 & HCR_RW)) + inject_abt32(vcpu, false, addr); +- +- inject_abt64(vcpu, false, addr); ++ else ++ inject_abt64(vcpu, false, addr); + } + + /** +@@ -184,8 +184,8 @@ void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr) + { + if (!(vcpu->arch.hcr_el2 & HCR_RW)) + inject_abt32(vcpu, true, addr); +- +- inject_abt64(vcpu, true, addr); ++ else ++ inject_abt64(vcpu, true, addr); + } + + /** +@@ -198,6 +198,6 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu) + { + if (!(vcpu->arch.hcr_el2 & HCR_RW)) + inject_undef32(vcpu); +- +- inject_undef64(vcpu); ++ else ++ inject_undef64(vcpu); + } +diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S +index ad4d44635c76..a6f6b762c47a 100644 +--- a/arch/mips/kernel/scall64-64.S ++++ b/arch/mips/kernel/scall64-64.S +@@ -80,7 +80,7 @@ syscall_trace_entry: + SAVE_STATIC + move s0, t2 + move a0, sp +- daddiu a1, v0, __NR_64_Linux ++ move a1, v0 + jal syscall_trace_enter + + bltz v0, 2f # seccomp failed? Skip syscall +diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S +index 446cc654da56..4b2010654c46 100644 +--- a/arch/mips/kernel/scall64-n32.S ++++ b/arch/mips/kernel/scall64-n32.S +@@ -72,7 +72,7 @@ n32_syscall_trace_entry: + SAVE_STATIC + move s0, t2 + move a0, sp +- daddiu a1, v0, __NR_N32_Linux ++ move a1, v0 + jal syscall_trace_enter + + bltz v0, 2f # seccomp failed? Skip syscall +diff --git a/arch/x86/include/asm/sigcontext.h b/arch/x86/include/asm/sigcontext.h +index 6fe6b182c998..9dfce4e0417d 100644 +--- a/arch/x86/include/asm/sigcontext.h ++++ b/arch/x86/include/asm/sigcontext.h +@@ -57,9 +57,9 @@ struct sigcontext { + unsigned long ip; + unsigned long flags; + unsigned short cs; +- unsigned short __pad2; /* Was called gs, but was always zero. */ +- unsigned short __pad1; /* Was called fs, but was always zero. */ +- unsigned short ss; ++ unsigned short gs; ++ unsigned short fs; ++ unsigned short __pad0; + unsigned long err; + unsigned long trapno; + unsigned long oldmask; +diff --git a/arch/x86/include/uapi/asm/sigcontext.h b/arch/x86/include/uapi/asm/sigcontext.h +index 16dc4e8a2cd3..d8b9f9081e86 100644 +--- a/arch/x86/include/uapi/asm/sigcontext.h ++++ b/arch/x86/include/uapi/asm/sigcontext.h +@@ -177,24 +177,9 @@ struct sigcontext { + __u64 rip; + __u64 eflags; /* RFLAGS */ + __u16 cs; +- +- /* +- * Prior to 2.5.64 ("[PATCH] x86-64 updates for 2.5.64-bk3"), +- * Linux saved and restored fs and gs in these slots. This +- * was counterproductive, as fsbase and gsbase were never +- * saved, so arch_prctl was presumably unreliable. +- * +- * If these slots are ever needed for any other purpose, there +- * is some risk that very old 64-bit binaries could get +- * confused. I doubt that many such binaries still work, +- * though, since the same patch in 2.5.64 also removed the +- * 64-bit set_thread_area syscall, so it appears that there is +- * no TLS API that works in both pre- and post-2.5.64 kernels. +- */ +- __u16 __pad2; /* Was gs. */ +- __u16 __pad1; /* Was fs. */ +- +- __u16 ss; ++ __u16 gs; ++ __u16 fs; ++ __u16 __pad0; + __u64 err; + __u64 trapno; + __u64 oldmask; +diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c +index dcb52850a28f..cde732c1b495 100644 +--- a/arch/x86/kernel/apic/apic.c ++++ b/arch/x86/kernel/apic/apic.c +@@ -1424,7 +1424,7 @@ static inline void __x2apic_disable(void) + { + u64 msr; + +- if (cpu_has_apic) ++ if (!cpu_has_apic) + return; + + rdmsrl(MSR_IA32_APICBASE, msr); +@@ -1483,10 +1483,13 @@ void x2apic_setup(void) + + static __init void x2apic_disable(void) + { +- u32 x2apic_id; ++ u32 x2apic_id, state = x2apic_state; + +- if (x2apic_state != X2APIC_ON) +- goto out; ++ x2apic_mode = 0; ++ x2apic_state = X2APIC_DISABLED; ++ ++ if (state != X2APIC_ON) ++ return; + + x2apic_id = read_apic_id(); + if (x2apic_id >= 255) +@@ -1494,9 +1497,6 @@ static __init void x2apic_disable(void) + + __x2apic_disable(); + register_lapic_address(mp_lapic_addr); +-out: +- x2apic_state = X2APIC_DISABLED; +- x2apic_mode = 0; + } + + static __init void x2apic_enable(void) +diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c +index 6e338e3b1dc0..971743774248 100644 +--- a/arch/x86/kernel/process.c ++++ b/arch/x86/kernel/process.c +@@ -453,6 +453,7 @@ static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c) + static void mwait_idle(void) + { + if (!current_set_polling_and_test()) { ++ trace_cpu_idle_rcuidle(1, smp_processor_id()); + if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) { + smp_mb(); /* quirk */ + clflush((void *)¤t_thread_info()->flags); +@@ -464,6 +465,7 @@ static void mwait_idle(void) + __sti_mwait(0, 0); + else + local_irq_enable(); ++ trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id()); + } else { + local_irq_enable(); + } +diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c +index 1ea14fd53933..e0fd5f47fbb9 100644 +--- a/arch/x86/kernel/signal.c ++++ b/arch/x86/kernel/signal.c +@@ -93,8 +93,15 @@ int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) + COPY(r15); + #endif /* CONFIG_X86_64 */ + ++#ifdef CONFIG_X86_32 + COPY_SEG_CPL3(cs); + COPY_SEG_CPL3(ss); ++#else /* !CONFIG_X86_32 */ ++ /* Kernel saves and restores only the CS segment register on signals, ++ * which is the bare minimum needed to allow mixed 32/64-bit code. ++ * App's signal handler can save/restore other segments if needed. */ ++ COPY_SEG_CPL3(cs); ++#endif /* CONFIG_X86_32 */ + + get_user_ex(tmpflags, &sc->flags); + regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); +@@ -154,9 +161,8 @@ int setup_sigcontext(struct sigcontext __user *sc, void __user *fpstate, + #else /* !CONFIG_X86_32 */ + put_user_ex(regs->flags, &sc->flags); + put_user_ex(regs->cs, &sc->cs); +- put_user_ex(0, &sc->__pad2); +- put_user_ex(0, &sc->__pad1); +- put_user_ex(regs->ss, &sc->ss); ++ put_user_ex(0, &sc->gs); ++ put_user_ex(0, &sc->fs); + #endif /* CONFIG_X86_32 */ + + put_user_ex(fpstate, &sc->fpstate); +@@ -450,19 +456,9 @@ static int __setup_rt_frame(int sig, struct ksignal *ksig, + + regs->sp = (unsigned long)frame; + +- /* +- * Set up the CS and SS registers to run signal handlers in +- * 64-bit mode, even if the handler happens to be interrupting +- * 32-bit or 16-bit code. +- * +- * SS is subtle. In 64-bit mode, we don't need any particular +- * SS descriptor, but we do need SS to be valid. It's possible +- * that the old SS is entirely bogus -- this can happen if the +- * signal we're trying to deliver is #GP or #SS caused by a bad +- * SS value. +- */ ++ /* Set up the CS register to run signal handlers in 64-bit mode, ++ even if the handler happens to be interrupting 32-bit code. */ + regs->cs = __USER_CS; +- regs->ss = __USER_DS; + + return 0; + } +diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig +index e88fda867a33..484145368a24 100644 +--- a/arch/x86/xen/Kconfig ++++ b/arch/x86/xen/Kconfig +@@ -8,7 +8,7 @@ config XEN + select PARAVIRT_CLOCK + select XEN_HAVE_PVMMU + depends on X86_64 || (X86_32 && X86_PAE) +- depends on X86_TSC ++ depends on X86_LOCAL_APIC && X86_TSC + help + This is the Linux Xen port. Enabling this will allow the + kernel to boot in a paravirtualized environment under the +@@ -17,7 +17,7 @@ config XEN + config XEN_DOM0 + def_bool y + depends on XEN && PCI_XEN && SWIOTLB_XEN +- depends on X86_LOCAL_APIC && X86_IO_APIC && ACPI && PCI ++ depends on X86_IO_APIC && ACPI && PCI + + config XEN_PVHVM + def_bool y +diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile +index 7322755f337a..4b6e29ac0968 100644 +--- a/arch/x86/xen/Makefile ++++ b/arch/x86/xen/Makefile +@@ -13,13 +13,13 @@ CFLAGS_mmu.o := $(nostackp) + obj-y := enlighten.o setup.o multicalls.o mmu.o irq.o \ + time.o xen-asm.o xen-asm_$(BITS).o \ + grant-table.o suspend.o platform-pci-unplug.o \ +- p2m.o ++ p2m.o apic.o + + obj-$(CONFIG_EVENT_TRACING) += trace.o + + obj-$(CONFIG_SMP) += smp.o + obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o + obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o +-obj-$(CONFIG_XEN_DOM0) += apic.o vga.o ++obj-$(CONFIG_XEN_DOM0) += vga.o + obj-$(CONFIG_SWIOTLB_XEN) += pci-swiotlb-xen.o + obj-$(CONFIG_XEN_EFI) += efi.o +diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h +index 9e195c683549..bef30cbb56c4 100644 +--- a/arch/x86/xen/xen-ops.h ++++ b/arch/x86/xen/xen-ops.h +@@ -101,17 +101,15 @@ struct dom0_vga_console_info; + + #ifdef CONFIG_XEN_DOM0 + void __init xen_init_vga(const struct dom0_vga_console_info *, size_t size); +-void __init xen_init_apic(void); + #else + static inline void __init xen_init_vga(const struct dom0_vga_console_info *info, + size_t size) + { + } +-static inline void __init xen_init_apic(void) +-{ +-} + #endif + ++void __init xen_init_apic(void); ++ + #ifdef CONFIG_XEN_EFI + extern void xen_efi_init(void); + #else +diff --git a/block/blk-settings.c b/block/blk-settings.c +index 12600bfffca9..e0057d035200 100644 +--- a/block/blk-settings.c ++++ b/block/blk-settings.c +@@ -241,8 +241,8 @@ EXPORT_SYMBOL(blk_queue_bounce_limit); + * Description: + * Enables a low level driver to set a hard upper limit, + * max_hw_sectors, on the size of requests. max_hw_sectors is set by +- * the device driver based upon the combined capabilities of I/O +- * controller and storage device. ++ * the device driver based upon the capabilities of the I/O ++ * controller. + * + * max_sectors is a soft limit imposed by the block layer for + * filesystem type requests. This value can be overridden on a +diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c +index 41c99be9bd41..e0064d180f04 100644 +--- a/drivers/ata/libata-core.c ++++ b/drivers/ata/libata-core.c +@@ -694,11 +694,11 @@ static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) + * RETURNS: + * Block address read from @tf. + */ +-u64 ata_tf_read_block(const struct ata_taskfile *tf, struct ata_device *dev) ++u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) + { + u64 block = 0; + +- if (!dev || tf->flags & ATA_TFLAG_LBA) { ++ if (tf->flags & ATA_TFLAG_LBA) { + if (tf->flags & ATA_TFLAG_LBA48) { + block |= (u64)tf->hob_lbah << 40; + block |= (u64)tf->hob_lbam << 32; +@@ -2147,24 +2147,6 @@ static int ata_dev_config_ncq(struct ata_device *dev, + return 0; + } + +-static void ata_dev_config_sense_reporting(struct ata_device *dev) +-{ +- unsigned int err_mask; +- +- if (!ata_id_has_sense_reporting(dev->id)) +- return; +- +- if (ata_id_sense_reporting_enabled(dev->id)) +- return; +- +- err_mask = ata_dev_set_feature(dev, SETFEATURE_SENSE_DATA, 0x1); +- if (err_mask) { +- ata_dev_dbg(dev, +- "failed to enable Sense Data Reporting, Emask 0x%x\n", +- err_mask); +- } +-} +- + /** + * ata_dev_configure - Configure the specified ATA/ATAPI device + * @dev: Target device to configure +@@ -2387,7 +2369,7 @@ int ata_dev_configure(struct ata_device *dev) + dev->devslp_timing[i] = sata_setting[j]; + } + } +- ata_dev_config_sense_reporting(dev); ++ + dev->cdb_len = 16; + } + +@@ -4248,6 +4230,8 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { + ATA_HORKAGE_ZERO_AFTER_TRIM, }, + { "Samsung SSD 8*", NULL, ATA_HORKAGE_NO_NCQ_TRIM | + ATA_HORKAGE_ZERO_AFTER_TRIM, }, ++ { "FCCT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM | ++ ATA_HORKAGE_ZERO_AFTER_TRIM, }, + + /* devices that don't properly handle TRIM commands */ + { "SuperSSpeed S238*", NULL, ATA_HORKAGE_NOTRIM, }, +diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c +index 7465031a893c..cb0508af1459 100644 +--- a/drivers/ata/libata-eh.c ++++ b/drivers/ata/libata-eh.c +@@ -1592,8 +1592,6 @@ static int ata_eh_read_log_10h(struct ata_device *dev, + tf->hob_lbah = buf[10]; + tf->nsect = buf[12]; + tf->hob_nsect = buf[13]; +- if (ata_id_has_ncq_autosense(dev->id)) +- tf->auxiliary = buf[14] << 16 | buf[15] << 8 | buf[16]; + + return 0; + } +@@ -1630,70 +1628,6 @@ unsigned int atapi_eh_tur(struct ata_device *dev, u8 *r_sense_key) + } + + /** +- * ata_eh_request_sense - perform REQUEST_SENSE_DATA_EXT +- * @dev: device to perform REQUEST_SENSE_SENSE_DATA_EXT to +- * @sense_buf: result sense data buffer (SCSI_SENSE_BUFFERSIZE bytes long) +- * @dfl_sense_key: default sense key to use +- * +- * Perform REQUEST_SENSE_DATA_EXT after the device reported CHECK +- * SENSE. This function is EH helper. +- * +- * LOCKING: +- * Kernel thread context (may sleep). +- * +- * RETURNS: +- * encoded sense data on success, 0 on failure or if sense data +- * is not available. +- */ +-static u32 ata_eh_request_sense(struct ata_queued_cmd *qc, +- struct scsi_cmnd *cmd) +-{ +- struct ata_device *dev = qc->dev; +- struct ata_taskfile tf; +- unsigned int err_mask; +- +- if (!cmd) +- return 0; +- +- DPRINTK("ATA request sense\n"); +- ata_dev_warn(dev, "request sense\n"); +- if (!ata_id_sense_reporting_enabled(dev->id)) { +- ata_dev_warn(qc->dev, "sense data reporting disabled\n"); +- return 0; +- } +- ata_tf_init(dev, &tf); +- +- tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; +- tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; +- tf.command = ATA_CMD_REQ_SENSE_DATA; +- tf.protocol = ATA_PROT_NODATA; +- +- err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); +- /* +- * ACS-4 states: +- * The device may set the SENSE DATA AVAILABLE bit to one in the +- * STATUS field and clear the ERROR bit to zero in the STATUS field +- * to indicate that the command returned completion without an error +- * and the sense data described in table 306 is available. +- * +- * IOW the 'ATA_SENSE' bit might not be set even though valid +- * sense data is available. +- * So check for both. +- */ +- if ((tf.command & ATA_SENSE) || +- tf.lbah != 0 || tf.lbam != 0 || tf.lbal != 0) { +- ata_scsi_set_sense(cmd, tf.lbah, tf.lbam, tf.lbal); +- qc->flags |= ATA_QCFLAG_SENSE_VALID; +- ata_dev_warn(dev, "sense data %02x/%02x/%02x\n", +- tf.lbah, tf.lbam, tf.lbal); +- } else { +- ata_dev_warn(dev, "request sense failed stat %02x emask %x\n", +- tf.command, err_mask); +- } +- return err_mask; +-} +- +-/** + * atapi_eh_request_sense - perform ATAPI REQUEST_SENSE + * @dev: device to perform REQUEST_SENSE to + * @sense_buf: result sense data buffer (SCSI_SENSE_BUFFERSIZE bytes long) +@@ -1855,19 +1789,6 @@ void ata_eh_analyze_ncq_error(struct ata_link *link) + memcpy(&qc->result_tf, &tf, sizeof(tf)); + qc->result_tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_LBA | ATA_TFLAG_LBA48; + qc->err_mask |= AC_ERR_DEV | AC_ERR_NCQ; +- if (qc->result_tf.auxiliary) { +- char sense_key, asc, ascq; +- +- sense_key = (qc->result_tf.auxiliary >> 16) & 0xff; +- asc = (qc->result_tf.auxiliary >> 8) & 0xff; +- ascq = qc->result_tf.auxiliary & 0xff; +- ata_dev_dbg(dev, "NCQ Autosense %02x/%02x/%02x\n", +- sense_key, asc, ascq); +- ata_scsi_set_sense(qc->scsicmd, sense_key, asc, ascq); +- ata_scsi_set_sense_information(qc->scsicmd, &qc->result_tf); +- qc->flags |= ATA_QCFLAG_SENSE_VALID; +- } +- + ehc->i.err_mask &= ~AC_ERR_DEV; + } + +@@ -1897,27 +1818,6 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc, + return ATA_EH_RESET; + } + +- /* +- * Sense data reporting does not work if the +- * device fault bit is set. +- */ +- if ((stat & ATA_SENSE) && !(stat & ATA_DF) && +- !(qc->flags & ATA_QCFLAG_SENSE_VALID)) { +- if (!(qc->ap->pflags & ATA_PFLAG_FROZEN)) { +- tmp = ata_eh_request_sense(qc, qc->scsicmd); +- if (tmp) +- qc->err_mask |= tmp; +- else +- ata_scsi_set_sense_information(qc->scsicmd, tf); +- } else { +- ata_dev_warn(qc->dev, "sense data available but port frozen\n"); +- } +- } +- +- /* Set by NCQ autosense or request sense above */ +- if (qc->flags & ATA_QCFLAG_SENSE_VALID) +- return 0; +- + if (stat & (ATA_ERR | ATA_DF)) + qc->err_mask |= AC_ERR_DEV; + else +@@ -2661,15 +2561,14 @@ static void ata_eh_link_report(struct ata_link *link) + + #ifdef CONFIG_ATA_VERBOSE_ERROR + if (res->command & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | +- ATA_SENSE | ATA_ERR)) { ++ ATA_ERR)) { + if (res->command & ATA_BUSY) + ata_dev_err(qc->dev, "status: { Busy }\n"); + else +- ata_dev_err(qc->dev, "status: { %s%s%s%s%s}\n", ++ ata_dev_err(qc->dev, "status: { %s%s%s%s}\n", + res->command & ATA_DRDY ? "DRDY " : "", + res->command & ATA_DF ? "DF " : "", + res->command & ATA_DRQ ? "DRQ " : "", +- res->command & ATA_SENSE ? "SENSE " : "", + res->command & ATA_ERR ? "ERR " : ""); + } + +diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c +index 641a61a59e89..0d7f0da3a269 100644 +--- a/drivers/ata/libata-scsi.c ++++ b/drivers/ata/libata-scsi.c +@@ -270,28 +270,13 @@ DEVICE_ATTR(unload_heads, S_IRUGO | S_IWUSR, + ata_scsi_park_show, ata_scsi_park_store); + EXPORT_SYMBOL_GPL(dev_attr_unload_heads); + +-void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq) ++static void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq) + { +- if (!cmd) +- return; +- + cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION; + + scsi_build_sense_buffer(0, cmd->sense_buffer, sk, asc, ascq); + } + +-void ata_scsi_set_sense_information(struct scsi_cmnd *cmd, +- const struct ata_taskfile *tf) +-{ +- u64 information; +- +- if (!cmd) +- return; +- +- information = ata_tf_read_block(tf, NULL); +- scsi_set_sense_information(cmd->sense_buffer, information); +-} +- + static ssize_t + ata_scsi_em_message_store(struct device *dev, struct device_attribute *attr, + const char *buf, size_t count) +@@ -1792,9 +1777,7 @@ static void ata_scsi_qc_complete(struct ata_queued_cmd *qc) + ((cdb[2] & 0x20) || need_sense)) { + ata_gen_passthru_sense(qc); + } else { +- if (qc->flags & ATA_QCFLAG_SENSE_VALID) { +- cmd->result = SAM_STAT_CHECK_CONDITION; +- } else if (!need_sense) { ++ if (!need_sense) { + cmd->result = SAM_STAT_GOOD; + } else { + /* TODO: decide which descriptor format to use +diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h +index a998a175f9f1..f840ca18a7c0 100644 +--- a/drivers/ata/libata.h ++++ b/drivers/ata/libata.h +@@ -67,8 +67,7 @@ extern struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev, int tag); + extern int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, + u64 block, u32 n_block, unsigned int tf_flags, + unsigned int tag); +-extern u64 ata_tf_read_block(const struct ata_taskfile *tf, +- struct ata_device *dev); ++extern u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev); + extern unsigned ata_exec_internal(struct ata_device *dev, + struct ata_taskfile *tf, const u8 *cdb, + int dma_dir, void *buf, unsigned int buflen, +@@ -138,9 +137,6 @@ extern int ata_scsi_add_hosts(struct ata_host *host, + struct scsi_host_template *sht); + extern void ata_scsi_scan_host(struct ata_port *ap, int sync); + extern int ata_scsi_offline_dev(struct ata_device *dev); +-extern void ata_scsi_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq); +-extern void ata_scsi_set_sense_information(struct scsi_cmnd *cmd, +- const struct ata_taskfile *tf); + extern void ata_scsi_media_change_notify(struct ata_device *dev); + extern void ata_scsi_hotplug(struct work_struct *work); + extern void ata_schedule_scsi_eh(struct Scsi_Host *shost); +diff --git a/drivers/base/regmap/regcache-rbtree.c b/drivers/base/regmap/regcache-rbtree.c +index 81751a49d8bf..56486d92c4e7 100644 +--- a/drivers/base/regmap/regcache-rbtree.c ++++ b/drivers/base/regmap/regcache-rbtree.c +@@ -296,11 +296,20 @@ static int regcache_rbtree_insert_to_block(struct regmap *map, + if (!blk) + return -ENOMEM; + +- present = krealloc(rbnode->cache_present, +- BITS_TO_LONGS(blklen) * sizeof(*present), GFP_KERNEL); +- if (!present) { +- kfree(blk); +- return -ENOMEM; ++ if (BITS_TO_LONGS(blklen) > BITS_TO_LONGS(rbnode->blklen)) { ++ present = krealloc(rbnode->cache_present, ++ BITS_TO_LONGS(blklen) * sizeof(*present), ++ GFP_KERNEL); ++ if (!present) { ++ kfree(blk); ++ return -ENOMEM; ++ } ++ ++ memset(present + BITS_TO_LONGS(rbnode->blklen), 0, ++ (BITS_TO_LONGS(blklen) - BITS_TO_LONGS(rbnode->blklen)) ++ * sizeof(*present)); ++ } else { ++ present = rbnode->cache_present; + } + + /* insert the register value in the correct place in the rbnode block */ +diff --git a/drivers/block/xen-blkback/blkback.c b/drivers/block/xen-blkback/blkback.c +index 713fc9ff1149..3e9ec9523f73 100644 +--- a/drivers/block/xen-blkback/blkback.c ++++ b/drivers/block/xen-blkback/blkback.c +@@ -362,8 +362,8 @@ static void purge_persistent_gnt(struct xen_blkif *blkif) + return; + } + +- if (work_pending(&blkif->persistent_purge_work)) { +- pr_alert_ratelimited("Scheduled work from previous purge is still pending, cannot purge list\n"); ++ if (work_busy(&blkif->persistent_purge_work)) { ++ pr_alert_ratelimited("Scheduled work from previous purge is still busy, cannot purge list\n"); + return; + } + +diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c +index 2c61cf8c6f61..89c7371ab2dc 100644 +--- a/drivers/block/xen-blkfront.c ++++ b/drivers/block/xen-blkfront.c +@@ -1118,8 +1118,10 @@ static void blkif_completion(struct blk_shadow *s, struct blkfront_info *info, + * Add the used indirect page back to the list of + * available pages for indirect grefs. + */ +- indirect_page = pfn_to_page(s->indirect_grants[i]->pfn); +- list_add(&indirect_page->lru, &info->indirect_pages); ++ if (!info->feature_persistent) { ++ indirect_page = pfn_to_page(s->indirect_grants[i]->pfn); ++ list_add(&indirect_page->lru, &info->indirect_pages); ++ } + s->indirect_grants[i]->gref = GRANT_INVALID_REF; + list_add_tail(&s->indirect_grants[i]->node, &info->grants); + } +diff --git a/drivers/clk/pxa/clk-pxa3xx.c b/drivers/clk/pxa/clk-pxa3xx.c +index 4b93a1efb36d..ac03ba49e9d1 100644 +--- a/drivers/clk/pxa/clk-pxa3xx.c ++++ b/drivers/clk/pxa/clk-pxa3xx.c +@@ -126,7 +126,7 @@ PARENTS(pxa3xx_ac97_bus) = { "ring_osc_60mhz", "ac97" }; + PARENTS(pxa3xx_sbus) = { "ring_osc_60mhz", "system_bus" }; + PARENTS(pxa3xx_smemcbus) = { "ring_osc_60mhz", "smemc" }; + +-#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENA : &CKENB) ++#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENB : &CKENA) + #define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp, \ + div_hp, bit, is_lp, flags) \ + PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp, \ +diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c +index 332c8ef8dae2..0436997e054b 100644 +--- a/drivers/crypto/caam/caamhash.c ++++ b/drivers/crypto/caam/caamhash.c +@@ -909,13 +909,14 @@ static int ahash_final_ctx(struct ahash_request *req) + state->buflen_1; + u32 *sh_desc = ctx->sh_desc_fin, *desc; + dma_addr_t ptr = ctx->sh_desc_fin_dma; +- int sec4_sg_bytes; ++ int sec4_sg_bytes, sec4_sg_src_index; + int digestsize = crypto_ahash_digestsize(ahash); + struct ahash_edesc *edesc; + int ret = 0; + int sh_len; + +- sec4_sg_bytes = (1 + (buflen ? 1 : 0)) * sizeof(struct sec4_sg_entry); ++ sec4_sg_src_index = 1 + (buflen ? 1 : 0); ++ sec4_sg_bytes = sec4_sg_src_index * sizeof(struct sec4_sg_entry); + + /* allocate space for base edesc and hw desc commands, link tables */ + edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN + +@@ -942,7 +943,7 @@ static int ahash_final_ctx(struct ahash_request *req) + state->buf_dma = try_buf_map_to_sec4_sg(jrdev, edesc->sec4_sg + 1, + buf, state->buf_dma, buflen, + last_buflen); +- (edesc->sec4_sg + sec4_sg_bytes - 1)->len |= SEC4_SG_LEN_FIN; ++ (edesc->sec4_sg + sec4_sg_src_index - 1)->len |= SEC4_SG_LEN_FIN; + + edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg, + sec4_sg_bytes, DMA_TO_DEVICE); +diff --git a/drivers/crypto/nx/nx-sha256.c b/drivers/crypto/nx/nx-sha256.c +index 08f8d5cd6334..becb738c897b 100644 +--- a/drivers/crypto/nx/nx-sha256.c ++++ b/drivers/crypto/nx/nx-sha256.c +@@ -71,7 +71,6 @@ static int nx_sha256_update(struct shash_desc *desc, const u8 *data, + struct sha256_state *sctx = shash_desc_ctx(desc); + struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base); + struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb; +- struct nx_sg *in_sg; + struct nx_sg *out_sg; + u64 to_process = 0, leftover, total; + unsigned long irq_flags; +@@ -97,7 +96,6 @@ static int nx_sha256_update(struct shash_desc *desc, const u8 *data, + NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE; + NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION; + +- in_sg = nx_ctx->in_sg; + max_sg_len = min_t(u64, nx_ctx->ap->sglen, + nx_driver.of.max_sg_len/sizeof(struct nx_sg)); + max_sg_len = min_t(u64, max_sg_len, +@@ -114,17 +112,12 @@ static int nx_sha256_update(struct shash_desc *desc, const u8 *data, + } + + do { +- /* +- * to_process: the SHA256_BLOCK_SIZE data chunk to process in +- * this update. This value is also restricted by the sg list +- * limits. +- */ +- to_process = total - to_process; +- to_process = to_process & ~(SHA256_BLOCK_SIZE - 1); ++ int used_sgs = 0; ++ struct nx_sg *in_sg = nx_ctx->in_sg; + + if (buf_len) { + data_len = buf_len; +- in_sg = nx_build_sg_list(nx_ctx->in_sg, ++ in_sg = nx_build_sg_list(in_sg, + (u8 *) sctx->buf, + &data_len, + max_sg_len); +@@ -133,15 +126,27 @@ static int nx_sha256_update(struct shash_desc *desc, const u8 *data, + rc = -EINVAL; + goto out; + } ++ used_sgs = in_sg - nx_ctx->in_sg; + } + ++ /* to_process: SHA256_BLOCK_SIZE aligned chunk to be ++ * processed in this iteration. This value is restricted ++ * by sg list limits and number of sgs we already used ++ * for leftover data. (see above) ++ * In ideal case, we could allow NX_PAGE_SIZE * max_sg_len, ++ * but because data may not be aligned, we need to account ++ * for that too. */ ++ to_process = min_t(u64, total, ++ (max_sg_len - 1 - used_sgs) * NX_PAGE_SIZE); ++ to_process = to_process & ~(SHA256_BLOCK_SIZE - 1); ++ + data_len = to_process - buf_len; + in_sg = nx_build_sg_list(in_sg, (u8 *) data, + &data_len, max_sg_len); + + nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg); + +- to_process = (data_len + buf_len); ++ to_process = data_len + buf_len; + leftover = total - to_process; + + /* +diff --git a/drivers/crypto/nx/nx-sha512.c b/drivers/crypto/nx/nx-sha512.c +index aff0fe58eac0..b6e183d58d73 100644 +--- a/drivers/crypto/nx/nx-sha512.c ++++ b/drivers/crypto/nx/nx-sha512.c +@@ -71,7 +71,6 @@ static int nx_sha512_update(struct shash_desc *desc, const u8 *data, + struct sha512_state *sctx = shash_desc_ctx(desc); + struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base); + struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb; +- struct nx_sg *in_sg; + struct nx_sg *out_sg; + u64 to_process, leftover = 0, total; + unsigned long irq_flags; +@@ -97,7 +96,6 @@ static int nx_sha512_update(struct shash_desc *desc, const u8 *data, + NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE; + NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION; + +- in_sg = nx_ctx->in_sg; + max_sg_len = min_t(u64, nx_ctx->ap->sglen, + nx_driver.of.max_sg_len/sizeof(struct nx_sg)); + max_sg_len = min_t(u64, max_sg_len, +@@ -114,18 +112,12 @@ static int nx_sha512_update(struct shash_desc *desc, const u8 *data, + } + + do { +- /* +- * to_process: the SHA512_BLOCK_SIZE data chunk to process in +- * this update. This value is also restricted by the sg list +- * limits. +- */ +- to_process = total - leftover; +- to_process = to_process & ~(SHA512_BLOCK_SIZE - 1); +- leftover = total - to_process; ++ int used_sgs = 0; ++ struct nx_sg *in_sg = nx_ctx->in_sg; + + if (buf_len) { + data_len = buf_len; +- in_sg = nx_build_sg_list(nx_ctx->in_sg, ++ in_sg = nx_build_sg_list(in_sg, + (u8 *) sctx->buf, + &data_len, max_sg_len); + +@@ -133,8 +125,20 @@ static int nx_sha512_update(struct shash_desc *desc, const u8 *data, + rc = -EINVAL; + goto out; + } ++ used_sgs = in_sg - nx_ctx->in_sg; + } + ++ /* to_process: SHA512_BLOCK_SIZE aligned chunk to be ++ * processed in this iteration. This value is restricted ++ * by sg list limits and number of sgs we already used ++ * for leftover data. (see above) ++ * In ideal case, we could allow NX_PAGE_SIZE * max_sg_len, ++ * but because data may not be aligned, we need to account ++ * for that too. */ ++ to_process = min_t(u64, total, ++ (max_sg_len - 1 - used_sgs) * NX_PAGE_SIZE); ++ to_process = to_process & ~(SHA512_BLOCK_SIZE - 1); ++ + data_len = to_process - buf_len; + in_sg = nx_build_sg_list(in_sg, (u8 *) data, + &data_len, max_sg_len); +@@ -146,7 +150,7 @@ static int nx_sha512_update(struct shash_desc *desc, const u8 *data, + goto out; + } + +- to_process = (data_len + buf_len); ++ to_process = data_len + buf_len; + leftover = total - to_process; + + /* +diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c +index 3515b381c131..711d8ad74f11 100644 +--- a/drivers/edac/ppc4xx_edac.c ++++ b/drivers/edac/ppc4xx_edac.c +@@ -920,7 +920,7 @@ static int ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) + */ + + for (row = 0; row < mci->nr_csrows; row++) { +- struct csrow_info *csi = &mci->csrows[row]; ++ struct csrow_info *csi = mci->csrows[row]; + + /* + * Get the configuration settings for this +diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +index 60b0c13d7ff5..aebc4595afa0 100644 +--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c ++++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +@@ -559,7 +559,7 @@ static int atmel_hlcdc_dc_drm_remove(struct platform_device *pdev) + return 0; + } + +-#ifdef CONFIG_PM ++#ifdef CONFIG_PM_SLEEP + static int atmel_hlcdc_dc_drm_suspend(struct device *dev) + { + struct drm_device *drm_dev = dev_get_drvdata(dev); +diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c +index d714a4b5711e..b1fe32b119ef 100644 +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -1150,6 +1150,19 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) + return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; + } + ++static bool intel_dp_source_supports_hbr2(struct drm_device *dev) ++{ ++ /* WaDisableHBR2:skl */ ++ if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) ++ return false; ++ ++ if ((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || IS_BROADWELL(dev) || ++ (INTEL_INFO(dev)->gen >= 9)) ++ return true; ++ else ++ return false; ++} ++ + static int + intel_dp_source_rates(struct drm_device *dev, const int **source_rates) + { +@@ -1163,11 +1176,8 @@ intel_dp_source_rates(struct drm_device *dev, const int **source_rates) + + *source_rates = default_rates; + +- if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) +- /* WaDisableHBR2:skl */ +- return (DP_LINK_BW_2_7 >> 3) + 1; +- else if (INTEL_INFO(dev)->gen >= 8 || +- (IS_HASWELL(dev) && !IS_HSW_ULX(dev))) ++ /* This depends on the fact that 5.4 is last value in the array */ ++ if (intel_dp_source_supports_hbr2(dev)) + return (DP_LINK_BW_5_4 >> 3) + 1; + else + return (DP_LINK_BW_2_7 >> 3) + 1; +@@ -3783,10 +3793,15 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp) + } + } + +- /* Training Pattern 3 support, both source and sink */ ++ /* Training Pattern 3 support, Intel platforms that support HBR2 alone ++ * have support for TP3 hence that check is used along with dpcd check ++ * to ensure TP3 can be enabled. ++ * SKL < B0: due it's WaDisableHBR2 is the only exception where TP3 is ++ * supported but still not enabled. ++ */ + if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12 && + intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED && +- (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)) { ++ intel_dp_source_supports_hbr2(dev)) { + intel_dp->use_tps3 = true; + DRM_DEBUG_KMS("Displayport TPS3 supported\n"); + } else +diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c +index 424e62197787..9ab7c1c758ae 100644 +--- a/drivers/gpu/drm/i915/intel_lrc.c ++++ b/drivers/gpu/drm/i915/intel_lrc.c +@@ -848,6 +848,8 @@ static int intel_lr_context_pin(struct intel_engine_cs *ring, + ret = intel_pin_and_map_ringbuffer_obj(ring->dev, ringbuf); + if (ret) + goto unpin_ctx_obj; ++ ++ ctx_obj->dirty = true; + } + + return ret; +diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +index 654c8daeb5ab..97ad3bcb99a7 100644 +--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c ++++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +@@ -2492,7 +2492,7 @@ int vmw_execbuf_process(struct drm_file *file_priv, + ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes, + true, NULL); + if (unlikely(ret != 0)) +- goto out_err; ++ goto out_err_nores; + + ret = vmw_validate_buffers(dev_priv, sw_context); + if (unlikely(ret != 0)) +@@ -2536,6 +2536,7 @@ int vmw_execbuf_process(struct drm_file *file_priv, + vmw_resource_relocations_free(&sw_context->res_relocations); + + vmw_fifo_commit(dev_priv, command_size); ++ mutex_unlock(&dev_priv->binding_mutex); + + vmw_query_bo_switch_commit(dev_priv, sw_context); + ret = vmw_execbuf_fence_commands(file_priv, dev_priv, +@@ -2551,7 +2552,6 @@ int vmw_execbuf_process(struct drm_file *file_priv, + DRM_ERROR("Fence submission error. Syncing.\n"); + + vmw_resource_list_unreserve(&sw_context->resource_list, false); +- mutex_unlock(&dev_priv->binding_mutex); + + ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes, + (void *) fence); +diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c +index 008e89bf6f3c..32d52d29cc68 100644 +--- a/drivers/hid/hid-input.c ++++ b/drivers/hid/hid-input.c +@@ -462,12 +462,15 @@ out: + + static void hidinput_cleanup_battery(struct hid_device *dev) + { ++ const struct power_supply_desc *psy_desc; ++ + if (!dev->battery) + return; + ++ psy_desc = dev->battery->desc; + power_supply_unregister(dev->battery); +- kfree(dev->battery->desc->name); +- kfree(dev->battery->desc); ++ kfree(psy_desc->name); ++ kfree(psy_desc); + dev->battery = NULL; + } + #else /* !CONFIG_HID_BATTERY_STRENGTH */ +diff --git a/drivers/hid/hid-uclogic.c b/drivers/hid/hid-uclogic.c +index 94167310e15a..b905d501e752 100644 +--- a/drivers/hid/hid-uclogic.c ++++ b/drivers/hid/hid-uclogic.c +@@ -858,7 +858,7 @@ static int uclogic_tablet_enable(struct hid_device *hdev) + for (p = drvdata->rdesc; + p <= drvdata->rdesc + drvdata->rsize - 4;) { + if (p[0] == 0xFE && p[1] == 0xED && p[2] == 0x1D && +- p[3] < sizeof(params)) { ++ p[3] < ARRAY_SIZE(params)) { + v = params[p[3]]; + put_unaligned(cpu_to_le32(v), (s32 *)p); + p += 4; +diff --git a/drivers/input/keyboard/gpio_keys_polled.c b/drivers/input/keyboard/gpio_keys_polled.c +index 097d7216d98e..c6dc644aa580 100644 +--- a/drivers/input/keyboard/gpio_keys_polled.c ++++ b/drivers/input/keyboard/gpio_keys_polled.c +@@ -246,7 +246,7 @@ static int gpio_keys_polled_probe(struct platform_device *pdev) + * convert it to descriptor. + */ + if (!button->gpiod && gpio_is_valid(button->gpio)) { +- unsigned flags = 0; ++ unsigned flags = GPIOF_IN; + + if (button->active_low) + flags |= GPIOF_ACTIVE_LOW; +diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c +index 692fe2bc8197..c12bb93334ff 100644 +--- a/drivers/irqchip/irq-crossbar.c ++++ b/drivers/irqchip/irq-crossbar.c +@@ -68,7 +68,9 @@ static struct irq_chip crossbar_chip = { + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, + .irq_retrigger = irq_chip_retrigger_hierarchy, +- .irq_set_wake = irq_chip_set_wake_parent, ++ .irq_set_type = irq_chip_set_type_parent, ++ .flags = IRQCHIP_MASK_ON_SUSPEND | ++ IRQCHIP_SKIP_SET_WAKE, + #ifdef CONFIG_SMP + .irq_set_affinity = irq_chip_set_affinity_parent, + #endif +diff --git a/drivers/md/dm-thin-metadata.c b/drivers/md/dm-thin-metadata.c +index 79f694120ddf..cde1d6749017 100644 +--- a/drivers/md/dm-thin-metadata.c ++++ b/drivers/md/dm-thin-metadata.c +@@ -1295,8 +1295,8 @@ static int __release_metadata_snap(struct dm_pool_metadata *pmd) + return r; + + disk_super = dm_block_data(copy); +- dm_sm_dec_block(pmd->metadata_sm, le64_to_cpu(disk_super->data_mapping_root)); +- dm_sm_dec_block(pmd->metadata_sm, le64_to_cpu(disk_super->device_details_root)); ++ dm_btree_del(&pmd->info, le64_to_cpu(disk_super->data_mapping_root)); ++ dm_btree_del(&pmd->details_info, le64_to_cpu(disk_super->device_details_root)); + dm_sm_dec_block(pmd->metadata_sm, held_root); + + return dm_tm_unlock(pmd->tm, copy); +diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c +index 6ca6dfab50eb..6523903e15fe 100644 +--- a/drivers/mfd/arizona-core.c ++++ b/drivers/mfd/arizona-core.c +@@ -912,10 +912,6 @@ int arizona_dev_init(struct arizona *arizona) + arizona->pdata.gpio_defaults[i]); + } + +- pm_runtime_set_autosuspend_delay(arizona->dev, 100); +- pm_runtime_use_autosuspend(arizona->dev); +- pm_runtime_enable(arizona->dev); +- + /* Chip default */ + if (!arizona->pdata.clk32k_src) + arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2; +@@ -1012,11 +1008,17 @@ int arizona_dev_init(struct arizona *arizona) + arizona->pdata.spk_fmt[i]); + } + ++ pm_runtime_set_active(arizona->dev); ++ pm_runtime_enable(arizona->dev); ++ + /* Set up for interrupts */ + ret = arizona_irq_init(arizona); + if (ret != 0) + goto err_reset; + ++ pm_runtime_set_autosuspend_delay(arizona->dev, 100); ++ pm_runtime_use_autosuspend(arizona->dev); ++ + arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error", + arizona_clkgen_err, arizona); + arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked", +@@ -1045,10 +1047,6 @@ int arizona_dev_init(struct arizona *arizona) + goto err_irq; + } + +-#ifdef CONFIG_PM +- regulator_disable(arizona->dcvdd); +-#endif +- + return 0; + + err_irq: +diff --git a/drivers/net/can/usb/peak_usb/pcan_usb.c b/drivers/net/can/usb/peak_usb/pcan_usb.c +index 72427f21edff..edfec540c893 100644 +--- a/drivers/net/can/usb/peak_usb/pcan_usb.c ++++ b/drivers/net/can/usb/peak_usb/pcan_usb.c +@@ -855,6 +855,18 @@ static int pcan_usb_probe(struct usb_interface *intf) + /* + * describe the PCAN-USB adapter + */ ++static const struct can_bittiming_const pcan_usb_const = { ++ .name = "pcan_usb", ++ .tseg1_min = 1, ++ .tseg1_max = 16, ++ .tseg2_min = 1, ++ .tseg2_max = 8, ++ .sjw_max = 4, ++ .brp_min = 1, ++ .brp_max = 64, ++ .brp_inc = 1, ++}; ++ + const struct peak_usb_adapter pcan_usb = { + .name = "PCAN-USB", + .device_id = PCAN_USB_PRODUCT_ID, +@@ -863,17 +875,7 @@ const struct peak_usb_adapter pcan_usb = { + .clock = { + .freq = PCAN_USB_CRYSTAL_HZ / 2 , + }, +- .bittiming_const = { +- .name = "pcan_usb", +- .tseg1_min = 1, +- .tseg1_max = 16, +- .tseg2_min = 1, +- .tseg2_max = 8, +- .sjw_max = 4, +- .brp_min = 1, +- .brp_max = 64, +- .brp_inc = 1, +- }, ++ .bittiming_const = &pcan_usb_const, + + /* size of device private data */ + .sizeof_dev_private = sizeof(struct pcan_usb), +diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_core.c b/drivers/net/can/usb/peak_usb/pcan_usb_core.c +index 7921cff93a63..5a2e341a6d1e 100644 +--- a/drivers/net/can/usb/peak_usb/pcan_usb_core.c ++++ b/drivers/net/can/usb/peak_usb/pcan_usb_core.c +@@ -792,9 +792,9 @@ static int peak_usb_create_dev(const struct peak_usb_adapter *peak_usb_adapter, + dev->ep_msg_out = peak_usb_adapter->ep_msg_out[ctrl_idx]; + + dev->can.clock = peak_usb_adapter->clock; +- dev->can.bittiming_const = &peak_usb_adapter->bittiming_const; ++ dev->can.bittiming_const = peak_usb_adapter->bittiming_const; + dev->can.do_set_bittiming = peak_usb_set_bittiming; +- dev->can.data_bittiming_const = &peak_usb_adapter->data_bittiming_const; ++ dev->can.data_bittiming_const = peak_usb_adapter->data_bittiming_const; + dev->can.do_set_data_bittiming = peak_usb_set_data_bittiming; + dev->can.do_set_mode = peak_usb_set_mode; + dev->can.do_get_berr_counter = peak_usb_adapter->do_get_berr_counter; +diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_core.h b/drivers/net/can/usb/peak_usb/pcan_usb_core.h +index 9e624f05ad4d..506fe506c9d3 100644 +--- a/drivers/net/can/usb/peak_usb/pcan_usb_core.h ++++ b/drivers/net/can/usb/peak_usb/pcan_usb_core.h +@@ -48,8 +48,8 @@ struct peak_usb_adapter { + u32 device_id; + u32 ctrlmode_supported; + struct can_clock clock; +- const struct can_bittiming_const bittiming_const; +- const struct can_bittiming_const data_bittiming_const; ++ const struct can_bittiming_const * const bittiming_const; ++ const struct can_bittiming_const * const data_bittiming_const; + unsigned int ctrl_count; + + int (*intf_probe)(struct usb_interface *intf); +diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c +index 09d14e70abd7..ce44a033f63b 100644 +--- a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c ++++ b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c +@@ -990,6 +990,30 @@ static void pcan_usb_fd_free(struct peak_usb_device *dev) + } + + /* describes the PCAN-USB FD adapter */ ++static const struct can_bittiming_const pcan_usb_fd_const = { ++ .name = "pcan_usb_fd", ++ .tseg1_min = 1, ++ .tseg1_max = 64, ++ .tseg2_min = 1, ++ .tseg2_max = 16, ++ .sjw_max = 16, ++ .brp_min = 1, ++ .brp_max = 1024, ++ .brp_inc = 1, ++}; ++ ++static const struct can_bittiming_const pcan_usb_fd_data_const = { ++ .name = "pcan_usb_fd", ++ .tseg1_min = 1, ++ .tseg1_max = 16, ++ .tseg2_min = 1, ++ .tseg2_max = 8, ++ .sjw_max = 4, ++ .brp_min = 1, ++ .brp_max = 1024, ++ .brp_inc = 1, ++}; ++ + const struct peak_usb_adapter pcan_usb_fd = { + .name = "PCAN-USB FD", + .device_id = PCAN_USBFD_PRODUCT_ID, +@@ -999,28 +1023,8 @@ const struct peak_usb_adapter pcan_usb_fd = { + .clock = { + .freq = PCAN_UFD_CRYSTAL_HZ, + }, +- .bittiming_const = { +- .name = "pcan_usb_fd", +- .tseg1_min = 1, +- .tseg1_max = 64, +- .tseg2_min = 1, +- .tseg2_max = 16, +- .sjw_max = 16, +- .brp_min = 1, +- .brp_max = 1024, +- .brp_inc = 1, +- }, +- .data_bittiming_const = { +- .name = "pcan_usb_fd", +- .tseg1_min = 1, +- .tseg1_max = 16, +- .tseg2_min = 1, +- .tseg2_max = 8, +- .sjw_max = 4, +- .brp_min = 1, +- .brp_max = 1024, +- .brp_inc = 1, +- }, ++ .bittiming_const = &pcan_usb_fd_const, ++ .data_bittiming_const = &pcan_usb_fd_data_const, + + /* size of device private data */ + .sizeof_dev_private = sizeof(struct pcan_usb_fd_device), +@@ -1058,6 +1062,30 @@ const struct peak_usb_adapter pcan_usb_fd = { + }; + + /* describes the PCAN-USB Pro FD adapter */ ++static const struct can_bittiming_const pcan_usb_pro_fd_const = { ++ .name = "pcan_usb_pro_fd", ++ .tseg1_min = 1, ++ .tseg1_max = 64, ++ .tseg2_min = 1, ++ .tseg2_max = 16, ++ .sjw_max = 16, ++ .brp_min = 1, ++ .brp_max = 1024, ++ .brp_inc = 1, ++}; ++ ++static const struct can_bittiming_const pcan_usb_pro_fd_data_const = { ++ .name = "pcan_usb_pro_fd", ++ .tseg1_min = 1, ++ .tseg1_max = 16, ++ .tseg2_min = 1, ++ .tseg2_max = 8, ++ .sjw_max = 4, ++ .brp_min = 1, ++ .brp_max = 1024, ++ .brp_inc = 1, ++}; ++ + const struct peak_usb_adapter pcan_usb_pro_fd = { + .name = "PCAN-USB Pro FD", + .device_id = PCAN_USBPROFD_PRODUCT_ID, +@@ -1067,28 +1095,8 @@ const struct peak_usb_adapter pcan_usb_pro_fd = { + .clock = { + .freq = PCAN_UFD_CRYSTAL_HZ, + }, +- .bittiming_const = { +- .name = "pcan_usb_pro_fd", +- .tseg1_min = 1, +- .tseg1_max = 64, +- .tseg2_min = 1, +- .tseg2_max = 16, +- .sjw_max = 16, +- .brp_min = 1, +- .brp_max = 1024, +- .brp_inc = 1, +- }, +- .data_bittiming_const = { +- .name = "pcan_usb_pro_fd", +- .tseg1_min = 1, +- .tseg1_max = 16, +- .tseg2_min = 1, +- .tseg2_max = 8, +- .sjw_max = 4, +- .brp_min = 1, +- .brp_max = 1024, +- .brp_inc = 1, +- }, ++ .bittiming_const = &pcan_usb_pro_fd_const, ++ .data_bittiming_const = &pcan_usb_pro_fd_data_const, + + /* size of device private data */ + .sizeof_dev_private = sizeof(struct pcan_usb_fd_device), +diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_pro.c b/drivers/net/can/usb/peak_usb/pcan_usb_pro.c +index dec51717635e..a5ad2e6aa73a 100644 +--- a/drivers/net/can/usb/peak_usb/pcan_usb_pro.c ++++ b/drivers/net/can/usb/peak_usb/pcan_usb_pro.c +@@ -1004,6 +1004,18 @@ int pcan_usb_pro_probe(struct usb_interface *intf) + /* + * describe the PCAN-USB Pro adapter + */ ++static const struct can_bittiming_const pcan_usb_pro_const = { ++ .name = "pcan_usb_pro", ++ .tseg1_min = 1, ++ .tseg1_max = 16, ++ .tseg2_min = 1, ++ .tseg2_max = 8, ++ .sjw_max = 4, ++ .brp_min = 1, ++ .brp_max = 1024, ++ .brp_inc = 1, ++}; ++ + const struct peak_usb_adapter pcan_usb_pro = { + .name = "PCAN-USB Pro", + .device_id = PCAN_USBPRO_PRODUCT_ID, +@@ -1012,17 +1024,7 @@ const struct peak_usb_adapter pcan_usb_pro = { + .clock = { + .freq = PCAN_USBPRO_CRYSTAL_HZ, + }, +- .bittiming_const = { +- .name = "pcan_usb_pro", +- .tseg1_min = 1, +- .tseg1_max = 16, +- .tseg2_min = 1, +- .tseg2_max = 8, +- .sjw_max = 4, +- .brp_min = 1, +- .brp_max = 1024, +- .brp_inc = 1, +- }, ++ .bittiming_const = &pcan_usb_pro_const, + + /* size of device private data */ + .sizeof_dev_private = sizeof(struct pcan_usb_pro_device), +diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c +index 37e6a6f91487..699a4802835f 100644 +--- a/drivers/net/wireless/iwlwifi/pcie/trans.c ++++ b/drivers/net/wireless/iwlwifi/pcie/trans.c +@@ -457,10 +457,16 @@ static void iwl_pcie_apm_stop(struct iwl_trans *trans, bool op_mode_leave) + if (trans->cfg->device_family == IWL_DEVICE_FAMILY_7000) + iwl_set_bits_prph(trans, APMG_PCIDEV_STT_REG, + APMG_PCIDEV_STT_VAL_WAKE_ME); +- else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) ++ else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) { ++ iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, ++ CSR_RESET_LINK_PWR_MGMT_DISABLED); + iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, + CSR_HW_IF_CONFIG_REG_PREPARE | + CSR_HW_IF_CONFIG_REG_ENABLE_PME); ++ mdelay(1); ++ iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, ++ CSR_RESET_LINK_PWR_MGMT_DISABLED); ++ } + mdelay(5); + } + +@@ -555,6 +561,10 @@ static int iwl_pcie_prepare_card_hw(struct iwl_trans *trans) + if (ret >= 0) + return 0; + ++ iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, ++ CSR_RESET_LINK_PWR_MGMT_DISABLED); ++ msleep(1); ++ + for (iter = 0; iter < 10; iter++) { + /* If HW is not ready, prepare the conditions to check again */ + iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, +@@ -562,8 +572,10 @@ static int iwl_pcie_prepare_card_hw(struct iwl_trans *trans) + + do { + ret = iwl_pcie_set_hw_ready(trans); +- if (ret >= 0) +- return 0; ++ if (ret >= 0) { ++ ret = 0; ++ goto out; ++ } + + usleep_range(200, 1000); + t += 200; +@@ -573,6 +585,10 @@ static int iwl_pcie_prepare_card_hw(struct iwl_trans *trans) + + IWL_ERR(trans, "Couldn't prepare the card\n"); + ++out: ++ iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, ++ CSR_RESET_LINK_PWR_MGMT_DISABLED); ++ + return ret; + } + +diff --git a/drivers/net/wireless/rsi/rsi_91x_sdio_ops.c b/drivers/net/wireless/rsi/rsi_91x_sdio_ops.c +index b6cc9ff47fc2..1c6788aecc62 100644 +--- a/drivers/net/wireless/rsi/rsi_91x_sdio_ops.c ++++ b/drivers/net/wireless/rsi/rsi_91x_sdio_ops.c +@@ -172,6 +172,7 @@ static int rsi_load_ta_instructions(struct rsi_common *common) + (struct rsi_91x_sdiodev *)adapter->rsi_dev; + u32 len; + u32 num_blocks; ++ const u8 *fw; + const struct firmware *fw_entry = NULL; + u32 block_size = dev->tx_blk_size; + int status = 0; +@@ -200,6 +201,10 @@ static int rsi_load_ta_instructions(struct rsi_common *common) + return status; + } + ++ /* Copy firmware into DMA-accessible memory */ ++ fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); ++ if (!fw) ++ return -ENOMEM; + len = fw_entry->size; + + if (len % 4) +@@ -210,7 +215,8 @@ static int rsi_load_ta_instructions(struct rsi_common *common) + rsi_dbg(INIT_ZONE, "%s: Instruction size:%d\n", __func__, len); + rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks); + +- status = rsi_copy_to_card(common, fw_entry->data, len, num_blocks); ++ status = rsi_copy_to_card(common, fw, len, num_blocks); ++ kfree(fw); + release_firmware(fw_entry); + return status; + } +diff --git a/drivers/net/wireless/rsi/rsi_91x_usb_ops.c b/drivers/net/wireless/rsi/rsi_91x_usb_ops.c +index 1106ce76707e..30c2cf7fa93b 100644 +--- a/drivers/net/wireless/rsi/rsi_91x_usb_ops.c ++++ b/drivers/net/wireless/rsi/rsi_91x_usb_ops.c +@@ -146,7 +146,10 @@ static int rsi_load_ta_instructions(struct rsi_common *common) + return status; + } + ++ /* Copy firmware into DMA-accessible memory */ + fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); ++ if (!fw) ++ return -ENOMEM; + len = fw_entry->size; + + if (len % 4) +@@ -158,6 +161,7 @@ static int rsi_load_ta_instructions(struct rsi_common *common) + rsi_dbg(INIT_ZONE, "%s: num blocks: %d\n", __func__, num_blocks); + + status = rsi_copy_to_card(common, fw, len, num_blocks); ++ kfree(fw); + release_firmware(fw_entry); + return status; + } +diff --git a/drivers/net/wireless/rtlwifi/core.c b/drivers/net/wireless/rtlwifi/core.c +index 3b3a88b53b11..585d0883c7e5 100644 +--- a/drivers/net/wireless/rtlwifi/core.c ++++ b/drivers/net/wireless/rtlwifi/core.c +@@ -1015,9 +1015,12 @@ static void send_beacon_frame(struct ieee80211_hw *hw, + { + struct rtl_priv *rtlpriv = rtl_priv(hw); + struct sk_buff *skb = ieee80211_beacon_get(hw, vif); ++ struct rtl_tcb_desc tcb_desc; + +- if (skb) +- rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, NULL); ++ if (skb) { ++ memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc)); ++ rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc); ++ } + } + + static void rtl_op_bss_info_changed(struct ieee80211_hw *hw, +diff --git a/drivers/net/wireless/rtlwifi/rtl8723be/sw.c b/drivers/net/wireless/rtlwifi/rtl8723be/sw.c +index 1017f02d7bf7..7bf88d9dcdc3 100644 +--- a/drivers/net/wireless/rtlwifi/rtl8723be/sw.c ++++ b/drivers/net/wireless/rtlwifi/rtl8723be/sw.c +@@ -385,6 +385,7 @@ module_param_named(debug, rtl8723be_mod_params.debug, int, 0444); + module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444); + module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444); + module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444); ++module_param_named(msi, rtl8723be_mod_params.msi_support, bool, 0444); + module_param_named(disable_watchdog, rtl8723be_mod_params.disable_watchdog, + bool, 0444); + MODULE_PARM_DESC(swenc, "Set to 1 for software crypto (default 0)\n"); +diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig +index 73de4efcbe6e..944f50015ed0 100644 +--- a/drivers/pci/Kconfig ++++ b/drivers/pci/Kconfig +@@ -2,7 +2,7 @@ + # PCI configuration + # + config PCI_BUS_ADDR_T_64BIT +- def_bool y if (ARCH_DMA_ADDR_T_64BIT || 64BIT) ++ def_bool y if (ARCH_DMA_ADDR_T_64BIT || (64BIT && !PARISC)) + depends on PCI + + config PCI_MSI +diff --git a/drivers/scsi/fnic/fnic.h b/drivers/scsi/fnic/fnic.h +index 26270c351624..ce129e595b55 100644 +--- a/drivers/scsi/fnic/fnic.h ++++ b/drivers/scsi/fnic/fnic.h +@@ -39,7 +39,7 @@ + + #define DRV_NAME "fnic" + #define DRV_DESCRIPTION "Cisco FCoE HBA Driver" +-#define DRV_VERSION "1.6.0.17" ++#define DRV_VERSION "1.6.0.17a" + #define PFX DRV_NAME ": " + #define DFX DRV_NAME "%d: " + +diff --git a/drivers/scsi/fnic/fnic_scsi.c b/drivers/scsi/fnic/fnic_scsi.c +index 155b286f1a9d..25436cd2860c 100644 +--- a/drivers/scsi/fnic/fnic_scsi.c ++++ b/drivers/scsi/fnic/fnic_scsi.c +@@ -425,6 +425,7 @@ static int fnic_queuecommand_lck(struct scsi_cmnd *sc, void (*done)(struct scsi_ + unsigned long ptr; + struct fc_rport_priv *rdata; + spinlock_t *io_lock = NULL; ++ int io_lock_acquired = 0; + + if (unlikely(fnic_chk_state_flags_locked(fnic, FNIC_FLAGS_IO_BLOCKED))) + return SCSI_MLQUEUE_HOST_BUSY; +@@ -518,6 +519,7 @@ static int fnic_queuecommand_lck(struct scsi_cmnd *sc, void (*done)(struct scsi_ + spin_lock_irqsave(io_lock, flags); + + /* initialize rest of io_req */ ++ io_lock_acquired = 1; + io_req->port_id = rport->port_id; + io_req->start_time = jiffies; + CMD_STATE(sc) = FNIC_IOREQ_CMD_PENDING; +@@ -571,7 +573,7 @@ out: + (((u64)CMD_FLAGS(sc) >> 32) | CMD_STATE(sc))); + + /* if only we issued IO, will we have the io lock */ +- if (CMD_FLAGS(sc) & FNIC_IO_INITIALIZED) ++ if (io_lock_acquired) + spin_unlock_irqrestore(io_lock, flags); + + atomic_dec(&fnic->in_flight); +diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c +index 1b3a09473452..30f9ef0c0d4f 100644 +--- a/drivers/scsi/libfc/fc_exch.c ++++ b/drivers/scsi/libfc/fc_exch.c +@@ -733,8 +733,6 @@ static bool fc_invoke_resp(struct fc_exch *ep, struct fc_seq *sp, + if (resp) { + resp(sp, fp, arg); + res = true; +- } else if (!IS_ERR(fp)) { +- fc_frame_free(fp); + } + + spin_lock_bh(&ep->ex_lock); +@@ -1596,7 +1594,8 @@ static void fc_exch_recv_seq_resp(struct fc_exch_mgr *mp, struct fc_frame *fp) + * If new exch resp handler is valid then call that + * first. + */ +- fc_invoke_resp(ep, sp, fp); ++ if (!fc_invoke_resp(ep, sp, fp)) ++ fc_frame_free(fp); + + fc_exch_release(ep); + return; +@@ -1695,7 +1694,8 @@ static void fc_exch_abts_resp(struct fc_exch *ep, struct fc_frame *fp) + fc_exch_hold(ep); + if (!rc) + fc_exch_delete(ep); +- fc_invoke_resp(ep, sp, fp); ++ if (!fc_invoke_resp(ep, sp, fp)) ++ fc_frame_free(fp); + if (has_rec) + fc_exch_timer_set(ep, ep->r_a_tov); + fc_exch_release(ep); +diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c +index c6795941b45d..2d5909c4685c 100644 +--- a/drivers/scsi/libfc/fc_fcp.c ++++ b/drivers/scsi/libfc/fc_fcp.c +@@ -1039,11 +1039,26 @@ restart: + fc_fcp_pkt_hold(fsp); + spin_unlock_irqrestore(&si->scsi_queue_lock, flags); + +- if (!fc_fcp_lock_pkt(fsp)) { ++ spin_lock_bh(&fsp->scsi_pkt_lock); ++ if (!(fsp->state & FC_SRB_COMPL)) { ++ fsp->state |= FC_SRB_COMPL; ++ /* ++ * TODO: dropping scsi_pkt_lock and then reacquiring ++ * again around fc_fcp_cleanup_cmd() is required, ++ * since fc_fcp_cleanup_cmd() calls into ++ * fc_seq_set_resp() and that func preempts cpu using ++ * schedule. May be schedule and related code should be ++ * removed instead of unlocking here to avoid scheduling ++ * while atomic bug. ++ */ ++ spin_unlock_bh(&fsp->scsi_pkt_lock); ++ + fc_fcp_cleanup_cmd(fsp, error); ++ ++ spin_lock_bh(&fsp->scsi_pkt_lock); + fc_io_compl(fsp); +- fc_fcp_unlock_pkt(fsp); + } ++ spin_unlock_bh(&fsp->scsi_pkt_lock); + + fc_fcp_pkt_release(fsp); + spin_lock_irqsave(&si->scsi_queue_lock, flags); +diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c +index 8053f24f0349..98d9bb6ff725 100644 +--- a/drivers/scsi/libiscsi.c ++++ b/drivers/scsi/libiscsi.c +@@ -2941,10 +2941,10 @@ void iscsi_conn_teardown(struct iscsi_cls_conn *cls_conn) + { + struct iscsi_conn *conn = cls_conn->dd_data; + struct iscsi_session *session = conn->session; +- unsigned long flags; + + del_timer_sync(&conn->transport_timer); + ++ mutex_lock(&session->eh_mutex); + spin_lock_bh(&session->frwd_lock); + conn->c_stage = ISCSI_CONN_CLEANUP_WAIT; + if (session->leadconn == conn) { +@@ -2956,28 +2956,6 @@ void iscsi_conn_teardown(struct iscsi_cls_conn *cls_conn) + } + spin_unlock_bh(&session->frwd_lock); + +- /* +- * Block until all in-progress commands for this connection +- * time out or fail. +- */ +- for (;;) { +- spin_lock_irqsave(session->host->host_lock, flags); +- if (!atomic_read(&session->host->host_busy)) { /* OK for ERL == 0 */ +- spin_unlock_irqrestore(session->host->host_lock, flags); +- break; +- } +- spin_unlock_irqrestore(session->host->host_lock, flags); +- msleep_interruptible(500); +- iscsi_conn_printk(KERN_INFO, conn, "iscsi conn_destroy(): " +- "host_busy %d host_failed %d\n", +- atomic_read(&session->host->host_busy), +- session->host->host_failed); +- /* +- * force eh_abort() to unblock +- */ +- wake_up(&conn->ehwait); +- } +- + /* flush queued up work because we free the connection below */ + iscsi_suspend_tx(conn); + +@@ -2994,6 +2972,7 @@ void iscsi_conn_teardown(struct iscsi_cls_conn *cls_conn) + if (session->leadconn == conn) + session->leadconn = NULL; + spin_unlock_bh(&session->frwd_lock); ++ mutex_unlock(&session->eh_mutex); + + iscsi_destroy_conn(cls_conn); + } +diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c +index 59c31bf88d92..ce6c770d74d5 100644 +--- a/drivers/scsi/scsi_error.c ++++ b/drivers/scsi/scsi_error.c +@@ -26,7 +26,6 @@ + #include <linux/blkdev.h> + #include <linux/delay.h> + #include <linux/jiffies.h> +-#include <asm/unaligned.h> + + #include <scsi/scsi.h> + #include <scsi/scsi_cmnd.h> +@@ -2587,33 +2586,3 @@ void scsi_build_sense_buffer(int desc, u8 *buf, u8 key, u8 asc, u8 ascq) + } + } + EXPORT_SYMBOL(scsi_build_sense_buffer); +- +-/** +- * scsi_set_sense_information - set the information field in a +- * formatted sense data buffer +- * @buf: Where to build sense data +- * @info: 64-bit information value to be set +- * +- **/ +-void scsi_set_sense_information(u8 *buf, u64 info) +-{ +- if ((buf[0] & 0x7f) == 0x72) { +- u8 *ucp, len; +- +- len = buf[7]; +- ucp = (char *)scsi_sense_desc_find(buf, len + 8, 0); +- if (!ucp) { +- buf[7] = len + 0xa; +- ucp = buf + 8 + len; +- } +- ucp[0] = 0; +- ucp[1] = 0xa; +- ucp[2] = 0x80; /* Valid bit */ +- ucp[3] = 0; +- put_unaligned_be64(info, &ucp[4]); +- } else if ((buf[0] & 0x7f) == 0x70) { +- buf[0] |= 0x80; +- put_unaligned_be64(info, &buf[3]); +- } +-} +-EXPORT_SYMBOL(scsi_set_sense_information); +diff --git a/drivers/scsi/scsi_pm.c b/drivers/scsi/scsi_pm.c +index 9e43ae1d2163..e4b799837948 100644 +--- a/drivers/scsi/scsi_pm.c ++++ b/drivers/scsi/scsi_pm.c +@@ -217,15 +217,15 @@ static int sdev_runtime_suspend(struct device *dev) + { + const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; + struct scsi_device *sdev = to_scsi_device(dev); +- int err; ++ int err = 0; + +- err = blk_pre_runtime_suspend(sdev->request_queue); +- if (err) +- return err; +- if (pm && pm->runtime_suspend) ++ if (pm && pm->runtime_suspend) { ++ err = blk_pre_runtime_suspend(sdev->request_queue); ++ if (err) ++ return err; + err = pm->runtime_suspend(dev); +- blk_post_runtime_suspend(sdev->request_queue, err); +- ++ blk_post_runtime_suspend(sdev->request_queue, err); ++ } + return err; + } + +@@ -248,11 +248,11 @@ static int sdev_runtime_resume(struct device *dev) + const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; + int err = 0; + +- blk_pre_runtime_resume(sdev->request_queue); +- if (pm && pm->runtime_resume) ++ if (pm && pm->runtime_resume) { ++ blk_pre_runtime_resume(sdev->request_queue); + err = pm->runtime_resume(dev); +- blk_post_runtime_resume(sdev->request_queue, err); +- ++ blk_post_runtime_resume(sdev->request_queue, err); ++ } + return err; + } + +diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c +index 7f9d65fe4fd9..11ea52b2c36b 100644 +--- a/drivers/scsi/sd.c ++++ b/drivers/scsi/sd.c +@@ -2770,9 +2770,9 @@ static int sd_revalidate_disk(struct gendisk *disk) + max_xfer = sdkp->max_xfer_blocks; + max_xfer <<= ilog2(sdp->sector_size) - 9; + +- max_xfer = min_not_zero(queue_max_hw_sectors(sdkp->disk->queue), +- max_xfer); +- blk_queue_max_hw_sectors(sdkp->disk->queue, max_xfer); ++ sdkp->disk->queue->limits.max_sectors = ++ min_not_zero(queue_max_hw_sectors(sdkp->disk->queue), max_xfer); ++ + set_capacity(disk, sdkp->capacity); + sd_config_write_same(sdkp); + kfree(buffer); +diff --git a/drivers/target/iscsi/iscsi_target.c b/drivers/target/iscsi/iscsi_target.c +index 305a5cbc099a..0ab6e2efd28c 100644 +--- a/drivers/target/iscsi/iscsi_target.c ++++ b/drivers/target/iscsi/iscsi_target.c +@@ -968,9 +968,9 @@ int iscsit_setup_scsi_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd, + cmd->cmd_flags |= ICF_NON_IMMEDIATE_UNSOLICITED_DATA; + + conn->sess->init_task_tag = cmd->init_task_tag = hdr->itt; +- if (hdr->flags & ISCSI_FLAG_CMD_READ) { ++ if (hdr->flags & ISCSI_FLAG_CMD_READ) + cmd->targ_xfer_tag = session_get_next_ttt(conn->sess); +- } else if (hdr->flags & ISCSI_FLAG_CMD_WRITE) ++ else + cmd->targ_xfer_tag = 0xFFFFFFFF; + cmd->cmd_sn = be32_to_cpu(hdr->cmdsn); + cmd->exp_stat_sn = be32_to_cpu(hdr->exp_statsn); +diff --git a/drivers/xen/xenbus/xenbus_client.c b/drivers/xen/xenbus/xenbus_client.c +index 96b2011d25f3..658be6cc3db6 100644 +--- a/drivers/xen/xenbus/xenbus_client.c ++++ b/drivers/xen/xenbus/xenbus_client.c +@@ -814,8 +814,10 @@ static int xenbus_unmap_ring_vfree_hvm(struct xenbus_device *dev, void *vaddr) + + rv = xenbus_unmap_ring(dev, node->handles, node->nr_handles, + addrs); +- if (!rv) ++ if (!rv) { + vunmap(vaddr); ++ free_xenballooned_pages(node->nr_handles, node->hvm.pages); ++ } + else + WARN(1, "Leaking %p, size %u page(s)\n", vaddr, + node->nr_handles); +diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h +index 45c39a37f924..8bc073d297db 100644 +--- a/include/drm/drm_pciids.h ++++ b/include/drm/drm_pciids.h +@@ -172,6 +172,7 @@ + {0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|RADEON_NEW_MEMMAP}, \ ++ {0x1002, 0x6617, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ +diff --git a/include/linux/ata.h b/include/linux/ata.h +index 533dbb6428f5..5dfbcd8887bb 100644 +--- a/include/linux/ata.h ++++ b/include/linux/ata.h +@@ -385,8 +385,6 @@ enum { + SATA_SSP = 0x06, /* Software Settings Preservation */ + SATA_DEVSLP = 0x09, /* Device Sleep */ + +- SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */ +- + /* feature values for SET_MAX */ + ATA_SET_MAX_ADDR = 0x00, + ATA_SET_MAX_PASSWD = 0x01, +@@ -530,8 +528,6 @@ struct ata_bmdma_prd { + #define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20) + #define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4)) + #define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8)) +-#define ata_id_has_ncq_autosense(id) \ +- ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7)) + + static inline bool ata_id_has_hipm(const u16 *id) + { +@@ -710,20 +706,6 @@ static inline bool ata_id_has_read_log_dma_ext(const u16 *id) + return id[ATA_ID_COMMAND_SET_3] & (1 << 3); + } + +-static inline bool ata_id_has_sense_reporting(const u16 *id) +-{ +- if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15))) +- return false; +- return id[ATA_ID_COMMAND_SET_3] & (1 << 6); +-} +- +-static inline bool ata_id_sense_reporting_enabled(const u16 *id) +-{ +- if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15))) +- return false; +- return id[ATA_ID_COMMAND_SET_4] & (1 << 6); +-} +- + /** + * ata_id_major_version - get ATA level of drive + * @id: Identify data +diff --git a/include/linux/irq.h b/include/linux/irq.h +index 62c6901cab55..3532dca843f4 100644 +--- a/include/linux/irq.h ++++ b/include/linux/irq.h +@@ -467,6 +467,7 @@ extern int irq_chip_set_affinity_parent(struct irq_data *data, + const struct cpumask *dest, + bool force); + extern int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on); ++extern int irq_chip_set_type_parent(struct irq_data *data, unsigned int type); + #endif + + /* Handling of unhandled and spurious interrupts: */ +diff --git a/include/scsi/scsi_eh.h b/include/scsi/scsi_eh.h +index 5a4bb5bb66b3..1e1421b06565 100644 +--- a/include/scsi/scsi_eh.h ++++ b/include/scsi/scsi_eh.h +@@ -59,7 +59,6 @@ extern int scsi_get_sense_info_fld(const u8 * sense_buffer, int sb_len, + u64 * info_out); + + extern void scsi_build_sense_buffer(int desc, u8 *buf, u8 key, u8 asc, u8 ascq); +-extern void scsi_set_sense_information(u8 *buf, u64 info); + + extern int scsi_ioctl_reset(struct scsi_device *, int __user *); + +diff --git a/ipc/sem.c b/ipc/sem.c +index d1a6edd17eba..c50aa5755c62 100644 +--- a/ipc/sem.c ++++ b/ipc/sem.c +@@ -253,6 +253,16 @@ static void sem_rcu_free(struct rcu_head *head) + } + + /* ++ * spin_unlock_wait() and !spin_is_locked() are not memory barriers, they ++ * are only control barriers. ++ * The code must pair with spin_unlock(&sem->lock) or ++ * spin_unlock(&sem_perm.lock), thus just the control barrier is insufficient. ++ * ++ * smp_rmb() is sufficient, as writes cannot pass the control barrier. ++ */ ++#define ipc_smp_acquire__after_spin_is_unlocked() smp_rmb() ++ ++/* + * Wait until all currently ongoing simple ops have completed. + * Caller must own sem_perm.lock. + * New simple ops cannot start, because simple ops first check +@@ -275,6 +285,7 @@ static void sem_wait_array(struct sem_array *sma) + sem = sma->sem_base + i; + spin_unlock_wait(&sem->lock); + } ++ ipc_smp_acquire__after_spin_is_unlocked(); + } + + /* +@@ -327,13 +338,12 @@ static inline int sem_lock(struct sem_array *sma, struct sembuf *sops, + /* Then check that the global lock is free */ + if (!spin_is_locked(&sma->sem_perm.lock)) { + /* +- * The ipc object lock check must be visible on all +- * cores before rechecking the complex count. Otherwise +- * we can race with another thread that does: ++ * We need a memory barrier with acquire semantics, ++ * otherwise we can race with another thread that does: + * complex_count++; + * spin_unlock(sem_perm.lock); + */ +- smp_rmb(); ++ ipc_smp_acquire__after_spin_is_unlocked(); + + /* + * Now repeat the test of complex_count: +@@ -2074,17 +2084,28 @@ void exit_sem(struct task_struct *tsk) + rcu_read_lock(); + un = list_entry_rcu(ulp->list_proc.next, + struct sem_undo, list_proc); +- if (&un->list_proc == &ulp->list_proc) +- semid = -1; +- else +- semid = un->semid; ++ if (&un->list_proc == &ulp->list_proc) { ++ /* ++ * We must wait for freeary() before freeing this ulp, ++ * in case we raced with last sem_undo. There is a small ++ * possibility where we exit while freeary() didn't ++ * finish unlocking sem_undo_list. ++ */ ++ spin_unlock_wait(&ulp->lock); ++ rcu_read_unlock(); ++ break; ++ } ++ spin_lock(&ulp->lock); ++ semid = un->semid; ++ spin_unlock(&ulp->lock); + ++ /* exit_sem raced with IPC_RMID, nothing to do */ + if (semid == -1) { + rcu_read_unlock(); +- break; ++ continue; + } + +- sma = sem_obtain_object_check(tsk->nsproxy->ipc_ns, un->semid); ++ sma = sem_obtain_object_check(tsk->nsproxy->ipc_ns, semid); + /* exit_sem raced with IPC_RMID, nothing to do */ + if (IS_ERR(sma)) { + rcu_read_unlock(); +diff --git a/kernel/cpuset.c b/kernel/cpuset.c +index ee14e3a35a29..f0acff0f66c9 100644 +--- a/kernel/cpuset.c ++++ b/kernel/cpuset.c +@@ -1223,7 +1223,7 @@ static int update_nodemask(struct cpuset *cs, struct cpuset *trialcs, + spin_unlock_irq(&callback_lock); + + /* use trialcs->mems_allowed as a temp variable */ +- update_nodemasks_hier(cs, &cs->mems_allowed); ++ update_nodemasks_hier(cs, &trialcs->mems_allowed); + done: + return retval; + } +diff --git a/kernel/events/core.c b/kernel/events/core.c +index 0ceb386777ae..94817491407b 100644 +--- a/kernel/events/core.c ++++ b/kernel/events/core.c +@@ -1886,8 +1886,6 @@ event_sched_in(struct perf_event *event, + + perf_pmu_disable(event->pmu); + +- event->tstamp_running += tstamp - event->tstamp_stopped; +- + perf_set_shadow_time(event, ctx, tstamp); + + perf_log_itrace_start(event); +@@ -1899,6 +1897,8 @@ event_sched_in(struct perf_event *event, + goto out; + } + ++ event->tstamp_running += tstamp - event->tstamp_stopped; ++ + if (!is_software_event(event)) + cpuctx->active_oncpu++; + if (!ctx->nr_active++) +@@ -3976,28 +3976,21 @@ static void perf_event_for_each(struct perf_event *event, + perf_event_for_each_child(sibling, func); + } + +-static int perf_event_period(struct perf_event *event, u64 __user *arg) +-{ +- struct perf_event_context *ctx = event->ctx; +- int ret = 0, active; ++struct period_event { ++ struct perf_event *event; + u64 value; ++}; + +- if (!is_sampling_event(event)) +- return -EINVAL; +- +- if (copy_from_user(&value, arg, sizeof(value))) +- return -EFAULT; +- +- if (!value) +- return -EINVAL; ++static int __perf_event_period(void *info) ++{ ++ struct period_event *pe = info; ++ struct perf_event *event = pe->event; ++ struct perf_event_context *ctx = event->ctx; ++ u64 value = pe->value; ++ bool active; + +- raw_spin_lock_irq(&ctx->lock); ++ raw_spin_lock(&ctx->lock); + if (event->attr.freq) { +- if (value > sysctl_perf_event_sample_rate) { +- ret = -EINVAL; +- goto unlock; +- } +- + event->attr.sample_freq = value; + } else { + event->attr.sample_period = value; +@@ -4016,11 +4009,53 @@ static int perf_event_period(struct perf_event *event, u64 __user *arg) + event->pmu->start(event, PERF_EF_RELOAD); + perf_pmu_enable(ctx->pmu); + } ++ raw_spin_unlock(&ctx->lock); + +-unlock: ++ return 0; ++} ++ ++static int perf_event_period(struct perf_event *event, u64 __user *arg) ++{ ++ struct period_event pe = { .event = event, }; ++ struct perf_event_context *ctx = event->ctx; ++ struct task_struct *task; ++ u64 value; ++ ++ if (!is_sampling_event(event)) ++ return -EINVAL; ++ ++ if (copy_from_user(&value, arg, sizeof(value))) ++ return -EFAULT; ++ ++ if (!value) ++ return -EINVAL; ++ ++ if (event->attr.freq && value > sysctl_perf_event_sample_rate) ++ return -EINVAL; ++ ++ task = ctx->task; ++ pe.value = value; ++ ++ if (!task) { ++ cpu_function_call(event->cpu, __perf_event_period, &pe); ++ return 0; ++ } ++ ++retry: ++ if (!task_function_call(task, __perf_event_period, &pe)) ++ return 0; ++ ++ raw_spin_lock_irq(&ctx->lock); ++ if (ctx->is_active) { ++ raw_spin_unlock_irq(&ctx->lock); ++ task = ctx->task; ++ goto retry; ++ } ++ ++ __perf_event_period(&pe); + raw_spin_unlock_irq(&ctx->lock); + +- return ret; ++ return 0; + } + + static const struct file_operations perf_fops; +@@ -4766,12 +4801,20 @@ static const struct file_operations perf_fops = { + * to user-space before waking everybody up. + */ + ++static inline struct fasync_struct **perf_event_fasync(struct perf_event *event) ++{ ++ /* only the parent has fasync state */ ++ if (event->parent) ++ event = event->parent; ++ return &event->fasync; ++} ++ + void perf_event_wakeup(struct perf_event *event) + { + ring_buffer_wakeup(event); + + if (event->pending_kill) { +- kill_fasync(&event->fasync, SIGIO, event->pending_kill); ++ kill_fasync(perf_event_fasync(event), SIGIO, event->pending_kill); + event->pending_kill = 0; + } + } +@@ -6117,7 +6160,7 @@ static int __perf_event_overflow(struct perf_event *event, + else + perf_event_output(event, data, regs); + +- if (event->fasync && event->pending_kill) { ++ if (*perf_event_fasync(event) && event->pending_kill) { + event->pending_wakeup = 1; + irq_work_queue(&event->pending); + } +diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c +index 725c416085e3..a7604c81168e 100644 +--- a/kernel/events/ring_buffer.c ++++ b/kernel/events/ring_buffer.c +@@ -547,11 +547,13 @@ static void __rb_free_aux(struct ring_buffer *rb) + rb->aux_priv = NULL; + } + +- for (pg = 0; pg < rb->aux_nr_pages; pg++) +- rb_free_aux_page(rb, pg); ++ if (rb->aux_nr_pages) { ++ for (pg = 0; pg < rb->aux_nr_pages; pg++) ++ rb_free_aux_page(rb, pg); + +- kfree(rb->aux_pages); +- rb->aux_nr_pages = 0; ++ kfree(rb->aux_pages); ++ rb->aux_nr_pages = 0; ++ } + } + + void rb_free_aux(struct ring_buffer *rb) +diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c +index eb9a4ea394ab..94bbd8fee90d 100644 +--- a/kernel/irq/chip.c ++++ b/kernel/irq/chip.c +@@ -934,6 +934,23 @@ int irq_chip_set_affinity_parent(struct irq_data *data, + } + + /** ++ * irq_chip_set_type_parent - Set IRQ type on the parent interrupt ++ * @data: Pointer to interrupt specific data ++ * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h ++ * ++ * Conditional, as the underlying parent chip might not implement it. ++ */ ++int irq_chip_set_type_parent(struct irq_data *data, unsigned int type) ++{ ++ data = data->parent_data; ++ ++ if (data->chip->irq_set_type) ++ return data->chip->irq_set_type(data, type); ++ ++ return -ENOSYS; ++} ++ ++/** + * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware + * @data: Pointer to interrupt specific data + * +@@ -946,7 +963,7 @@ int irq_chip_retrigger_hierarchy(struct irq_data *data) + if (data->chip && data->chip->irq_retrigger) + return data->chip->irq_retrigger(data); + +- return -ENOSYS; ++ return 0; + } + + /** +diff --git a/mm/memory-failure.c b/mm/memory-failure.c +index 501820c815b3..9f48145c884f 100644 +--- a/mm/memory-failure.c ++++ b/mm/memory-failure.c +@@ -1558,6 +1558,8 @@ static int get_any_page(struct page *page, unsigned long pfn, int flags) + */ + ret = __get_any_page(page, pfn, 0); + if (!PageLRU(page)) { ++ /* Drop page reference which is from __get_any_page() */ ++ put_page(page); + pr_info("soft_offline: %#lx: unknown non LRU page type %lx\n", + pfn, page->flags); + return -EIO; +@@ -1587,13 +1589,12 @@ static int soft_offline_huge_page(struct page *page, int flags) + unlock_page(hpage); + + ret = isolate_huge_page(hpage, &pagelist); +- if (ret) { +- /* +- * get_any_page() and isolate_huge_page() takes a refcount each, +- * so need to drop one here. +- */ +- put_page(hpage); +- } else { ++ /* ++ * get_any_page() and isolate_huge_page() takes a refcount each, ++ * so need to drop one here. ++ */ ++ put_page(hpage); ++ if (!ret) { + pr_info("soft offline: %#lx hugepage failed to isolate\n", pfn); + return -EBUSY; + } +diff --git a/net/9p/client.c b/net/9p/client.c +index 81925b923318..fcf6fe063d82 100644 +--- a/net/9p/client.c ++++ b/net/9p/client.c +@@ -1541,6 +1541,7 @@ p9_client_read(struct p9_fid *fid, u64 offset, struct iov_iter *to, int *err) + struct p9_client *clnt = fid->clnt; + struct p9_req_t *req; + int total = 0; ++ *err = 0; + + p9_debug(P9_DEBUG_9P, ">>> TREAD fid %d offset %llu %d\n", + fid->fid, (unsigned long long) offset, (int)iov_iter_count(to)); +@@ -1616,6 +1617,7 @@ p9_client_write(struct p9_fid *fid, u64 offset, struct iov_iter *from, int *err) + struct p9_client *clnt = fid->clnt; + struct p9_req_t *req; + int total = 0; ++ *err = 0; + + p9_debug(P9_DEBUG_9P, ">>> TWRITE fid %d offset %llu count %zd\n", + fid->fid, (unsigned long long) offset, +diff --git a/net/mac80211/rc80211_minstrel.c b/net/mac80211/rc80211_minstrel.c +index 247552a7f6c2..3ece7d1034c8 100644 +--- a/net/mac80211/rc80211_minstrel.c ++++ b/net/mac80211/rc80211_minstrel.c +@@ -92,14 +92,15 @@ int minstrel_get_tp_avg(struct minstrel_rate *mr, int prob_ewma) + static inline void + minstrel_sort_best_tp_rates(struct minstrel_sta_info *mi, int i, u8 *tp_list) + { +- int j = MAX_THR_RATES; +- struct minstrel_rate_stats *tmp_mrs = &mi->r[j - 1].stats; ++ int j; ++ struct minstrel_rate_stats *tmp_mrs; + struct minstrel_rate_stats *cur_mrs = &mi->r[i].stats; + +- while (j > 0 && (minstrel_get_tp_avg(&mi->r[i], cur_mrs->prob_ewma) > +- minstrel_get_tp_avg(&mi->r[tp_list[j - 1]], tmp_mrs->prob_ewma))) { +- j--; ++ for (j = MAX_THR_RATES; j > 0; --j) { + tmp_mrs = &mi->r[tp_list[j - 1]].stats; ++ if (minstrel_get_tp_avg(&mi->r[i], cur_mrs->prob_ewma) <= ++ minstrel_get_tp_avg(&mi->r[tp_list[j - 1]], tmp_mrs->prob_ewma)) ++ break; + } + + if (j < MAX_THR_RATES - 1) +diff --git a/scripts/kconfig/streamline_config.pl b/scripts/kconfig/streamline_config.pl +index 9cb8522d8d22..f3d3fb42b873 100755 +--- a/scripts/kconfig/streamline_config.pl ++++ b/scripts/kconfig/streamline_config.pl +@@ -137,7 +137,7 @@ my $ksource = ($ARGV[0] ? $ARGV[0] : '.'); + my $kconfig = $ARGV[1]; + my $lsmod_file = $ENV{'LSMOD'}; + +-my @makefiles = `find $ksource -name Makefile 2>/dev/null`; ++my @makefiles = `find $ksource -name Makefile -or -name Kbuild 2>/dev/null`; + chomp @makefiles; + + my %depends; +diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c +index 5645481af3d9..36e8f1236637 100644 +--- a/sound/pci/hda/hda_codec.c ++++ b/sound/pci/hda/hda_codec.c +@@ -3259,7 +3259,7 @@ static int add_std_chmaps(struct hda_codec *codec) + struct snd_pcm_chmap *chmap; + const struct snd_pcm_chmap_elem *elem; + +- if (!pcm || pcm->own_chmap || ++ if (!pcm || !pcm->pcm || pcm->own_chmap || + !hinfo->substreams) + continue; + elem = hinfo->chmap ? hinfo->chmap : snd_pcm_std_chmaps; +diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c +index ac0db1679f09..5bc7f2e2715c 100644 +--- a/sound/pci/hda/hda_generic.c ++++ b/sound/pci/hda/hda_generic.c +@@ -671,7 +671,8 @@ static bool is_active_nid(struct hda_codec *codec, hda_nid_t nid, + } + for (i = 0; i < path->depth; i++) { + if (path->path[i] == nid) { +- if (dir == HDA_OUTPUT || path->idx[i] == idx) ++ if (dir == HDA_OUTPUT || idx == -1 || ++ path->idx[i] == idx) + return true; + break; + } +@@ -682,7 +683,7 @@ static bool is_active_nid(struct hda_codec *codec, hda_nid_t nid, + + /* check whether the NID is referred by any active paths */ + #define is_active_nid_for_any(codec, nid) \ +- is_active_nid(codec, nid, HDA_OUTPUT, 0) ++ is_active_nid(codec, nid, HDA_OUTPUT, -1) + + /* get the default amp value for the target state */ + static int get_amp_val_to_activate(struct hda_codec *codec, hda_nid_t nid, +@@ -883,8 +884,7 @@ void snd_hda_activate_path(struct hda_codec *codec, struct nid_path *path, + struct hda_gen_spec *spec = codec->spec; + int i; + +- if (!enable) +- path->active = false; ++ path->active = enable; + + /* make sure the widget is powered up */ + if (enable && (spec->power_down_unused || codec->power_save_node)) +@@ -902,9 +902,6 @@ void snd_hda_activate_path(struct hda_codec *codec, struct nid_path *path, + if (has_amp_out(codec, path, i)) + activate_amp_out(codec, path, i, enable); + } +- +- if (enable) +- path->active = true; + } + EXPORT_SYMBOL_GPL(snd_hda_activate_path); + +diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c +index 78b719b5b34d..06cc9d57ba3d 100644 +--- a/sound/pci/hda/patch_conexant.c ++++ b/sound/pci/hda/patch_conexant.c +@@ -200,12 +200,33 @@ static int cx_auto_init(struct hda_codec *codec) + return 0; + } + +-#define cx_auto_free snd_hda_gen_free ++static void cx_auto_reboot_notify(struct hda_codec *codec) ++{ ++ struct conexant_spec *spec = codec->spec; ++ ++ if (codec->core.vendor_id != 0x14f150f2) ++ return; ++ ++ /* Turn the CX20722 codec into D3 to avoid spurious noises ++ from the internal speaker during (and after) reboot */ ++ cx_auto_turn_eapd(codec, spec->num_eapds, spec->eapds, false); ++ ++ snd_hda_codec_set_power_to_all(codec, codec->core.afg, AC_PWRST_D3); ++ snd_hda_codec_write(codec, codec->core.afg, 0, ++ AC_VERB_SET_POWER_STATE, AC_PWRST_D3); ++} ++ ++static void cx_auto_free(struct hda_codec *codec) ++{ ++ cx_auto_reboot_notify(codec); ++ snd_hda_gen_free(codec); ++} + + static const struct hda_codec_ops cx_auto_patch_ops = { + .build_controls = cx_auto_build_controls, + .build_pcms = snd_hda_gen_build_pcms, + .init = cx_auto_init, ++ .reboot_notify = cx_auto_reboot_notify, + .free = cx_auto_free, + .unsol_event = snd_hda_jack_unsol_event, + #ifdef CONFIG_PM +diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c +index 1e99f075a5ab..91f6928560e1 100644 +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -5119,6 +5119,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { + SND_PCI_QUIRK(0x1028, 0x06d9, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x06da, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x06de, "Dell", ALC292_FIXUP_DISABLE_AAMIX), ++ SND_PCI_QUIRK(0x1028, 0x06db, "Dell", ALC292_FIXUP_DISABLE_AAMIX), + SND_PCI_QUIRK(0x1028, 0x164a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x164b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), +diff --git a/sound/usb/card.c b/sound/usb/card.c +index 1fab9778807a..0450593980fd 100644 +--- a/sound/usb/card.c ++++ b/sound/usb/card.c +@@ -638,7 +638,7 @@ int snd_usb_autoresume(struct snd_usb_audio *chip) + int err = -ENODEV; + + down_read(&chip->shutdown_rwsem); +- if (chip->probing && chip->in_pm) ++ if (chip->probing || chip->in_pm) + err = 0; + else if (!chip->shutdown) + err = usb_autopm_get_interface(chip->pm_intf); +diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c +index 754e689596a2..00ebc0ca008e 100644 +--- a/sound/usb/quirks.c ++++ b/sound/usb/quirks.c +@@ -1268,6 +1268,7 @@ u64 snd_usb_interface_dsd_format_quirks(struct snd_usb_audio *chip, + return SNDRV_PCM_FMTBIT_DSD_U32_BE; + break; + ++ case USB_ID(0x20b1, 0x000a): /* Gustard DAC-X20U */ + case USB_ID(0x20b1, 0x2009): /* DIYINHK DSD DXD 384kHz USB to I2S/DSD */ + case USB_ID(0x20b1, 0x2023): /* JLsounds I2SoverUSB */ + if (fp->altsetting == 3)
