commit:     aa70ccd2c8168a680487d6693fbd9eb2dbbba839
Author:     Huang Rui <vowstar <AT> gmail <DOT> com>
AuthorDate: Wed May 13 13:53:28 2020 +0000
Commit:     Rui Huang <vowstar <AT> gmail <DOT> com>
CommitDate: Wed May 13 13:56:17 2020 +0000
URL:        https://gitweb.gentoo.org/repo/proj/guru.git/commit/?id=aa70ccd2

sci-electronics/verilator: fix compile problem

After bison upgrade to 3.6.1, caused compile error.
bison 3.6.1 generated unexpected nested-comment,
but 3.5.4 is no problem.
This fix workaround it by remove unexpected nested
comment. The test pass.

Issue: https://github.com/akimd/bison/issues/38
Issue: https://github.com/verilator/verilator/issues/2320
Package-Manager: Portage-2.3.99, Repoman-2.3.22
Signed-off-by: Huang Rui <vowstar <AT> gmail.com>

 .../verilator/files/verilator-4.034-fix-bison.patch     | 17 +++++++++++++++++
 sci-electronics/verilator/verilator-4.034.ebuild        | 14 +++++++++++---
 2 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/sci-electronics/verilator/files/verilator-4.034-fix-bison.patch 
b/sci-electronics/verilator/files/verilator-4.034-fix-bison.patch
new file mode 100644
index 0000000..56d680a
--- /dev/null
+++ b/sci-electronics/verilator/files/verilator-4.034-fix-bison.patch
@@ -0,0 +1,17 @@
+diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
+index 911f97e1..63799569 100644
+--- a/src/Makefile_obj.in
++++ b/src/Makefile_obj.in
+@@ -323,6 +323,12 @@ V3ParseBison.h: V3ParseBison.c
+ V3ParseBison.c: verilog.y $(BISONPRE)
+       @echo "If you get errors from verilog.y below, try upgrading bison to 
version 1.875 or newer."
+       $(PERL) $(BISONPRE) --yacc ${YACC} -d -v -o V3ParseBison.c $<
++      # Unfortunately bison 3.6.1 have break changes caused compile error.
++      # Workaround issue https://github.com/verilator/verilator/issues/2320
++      # This workaround is safe for the old version of bison.
++      # TODO: code should removed when bison fixed the problem.
++      @sed -ie 's#/\* "/\*.*\*/"  \*/##g' V3ParseBison.c
++      @sed -ie 's#/\* "/\*.*\*/"  \*/##g' V3ParseBison.h
+ 
+ V3Lexer_pregen.yy.cpp:        verilog.l V3ParseBison.h $(HEADERS)
+       ${LEX} --version

diff --git a/sci-electronics/verilator/verilator-4.034.ebuild 
b/sci-electronics/verilator/verilator-4.034.ebuild
index 10df066..bf099b7 100644
--- a/sci-electronics/verilator/verilator-4.034.ebuild
+++ b/sci-electronics/verilator/verilator-4.034.ebuild
@@ -6,13 +6,16 @@ EAPI="7"
 inherit autotools
 
 DESCRIPTION="The fast free Verilog/SystemVerilog simulator"
-HOMEPAGE="https://www.veripool.org/wiki/verilator";
+HOMEPAGE="
+       https://verilator.org
+       https://github.com/verilator/verilator
+"
 
 if [[ "${PV}" == "9999" ]] ; then
        inherit git-r3
-       EGIT_REPO_URI="https://git.veripool.org/git/${PN}";
+       EGIT_REPO_URI="https://github.com/${PN}/${PN}.git";
 else
-       SRC_URI="http://www.veripool.org/ftp/${P}.tgz -> ${P}.tar.gz"
+       SRC_URI="https://github.com/${PN}/${PN}/archive/v${PV}.tar.gz -> 
${P}.tar.gz"
        KEYWORDS="~alpha ~amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 
~riscv ~s390 ~sparc ~x86"
 fi
 
@@ -33,6 +36,11 @@ BDEPEND="
        sys-devel/flex
 "
 
+PATCHES=(
+       # https://github.com/verilator/verilator/issues/2320
+       "${FILESDIR}"/${PN}-4.034-fix-bison.patch
+)
+
 src_prepare() {
        default
        eautoconf --force

Reply via email to