commit: 37557341c0895a26a577adcc6994453a28bd71cc Author: Alice Ferrazzi <alicef <AT> gentoo <DOT> org> AuthorDate: Wed Oct 13 09:34:23 2021 +0000 Commit: Alice Ferrazzi <alicef <AT> gentoo <DOT> org> CommitDate: Wed Oct 13 09:35:03 2021 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=37557341
Linux patch 5.10.73 Signed-off-by: Alice Ferrazzi <alicef <AT> gentoo.org> 0000_README | 4 + 1072_linux-5.10.73.patch | 2474 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 2478 insertions(+) diff --git a/0000_README b/0000_README index 42e4628..9e6befb 100644 --- a/0000_README +++ b/0000_README @@ -331,6 +331,10 @@ Patch: 1071_linux-5.10.72.patch From: http://www.kernel.org Desc: Linux 5.10.72 +Patch: 1072_linux-5.10.73.patch +From: http://www.kernel.org +Desc: Linux 5.10.73 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1072_linux-5.10.73.patch b/1072_linux-5.10.73.patch new file mode 100644 index 0000000..5327e55 --- /dev/null +++ b/1072_linux-5.10.73.patch @@ -0,0 +1,2474 @@ +diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml +index f8622bd0f61ee..f0e0345da498f 100644 +--- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml ++++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml +@@ -18,7 +18,7 @@ properties: + const: ti,sn65dsi86 + + reg: +- const: 0x2d ++ enum: [ 0x2c, 0x2d ] + + enable-gpios: + maxItems: 1 +diff --git a/Makefile b/Makefile +index 48211c8503d4e..3f62cea9afc0e 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 5 + PATCHLEVEL = 10 +-SUBLEVEL = 72 ++SUBLEVEL = 73 + EXTRAVERSION = + NAME = Dare mighty things + +diff --git a/arch/arm/boot/dts/imx53-m53menlo.dts b/arch/arm/boot/dts/imx53-m53menlo.dts +index d3082b9774e40..4f88e96d81ddb 100644 +--- a/arch/arm/boot/dts/imx53-m53menlo.dts ++++ b/arch/arm/boot/dts/imx53-m53menlo.dts +@@ -56,6 +56,7 @@ + panel { + compatible = "edt,etm0700g0dh6"; + pinctrl-0 = <&pinctrl_display_gpio>; ++ pinctrl-names = "default"; + enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; + + port { +@@ -76,8 +77,7 @@ + regulator-name = "vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; +- enable-active-high; ++ gpio = <&gpio1 2 0>; + }; + }; + +diff --git a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi +index 9148a01ed6d9f..ebc0892e37c7a 100644 +--- a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi ++++ b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi +@@ -5,6 +5,7 @@ + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/input/input.h> ++#include <dt-bindings/leds/common.h> + #include <dt-bindings/pwm/pwm.h> + + / { +@@ -275,6 +276,7 @@ + led-cur = /bits/ 8 <0x20>; + max-cur = /bits/ 8 <0x60>; + reg = <0>; ++ color = <LED_COLOR_ID_RED>; + }; + + chan@1 { +@@ -282,6 +284,7 @@ + led-cur = /bits/ 8 <0x20>; + max-cur = /bits/ 8 <0x60>; + reg = <1>; ++ color = <LED_COLOR_ID_GREEN>; + }; + + chan@2 { +@@ -289,6 +292,7 @@ + led-cur = /bits/ 8 <0x20>; + max-cur = /bits/ 8 <0x60>; + reg = <2>; ++ color = <LED_COLOR_ID_BLUE>; + }; + + chan@3 { +@@ -296,6 +300,7 @@ + led-cur = /bits/ 8 <0x0>; + max-cur = /bits/ 8 <0x0>; + reg = <3>; ++ color = <LED_COLOR_ID_WHITE>; + }; + }; + +diff --git a/arch/arm/boot/dts/imx6qdl-pico.dtsi b/arch/arm/boot/dts/imx6qdl-pico.dtsi +index 5de4ccb979163..f7a56d6b160c8 100644 +--- a/arch/arm/boot/dts/imx6qdl-pico.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-pico.dtsi +@@ -176,7 +176,18 @@ + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; ++ phy-handle = <&phy>; + status = "okay"; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy: ethernet-phy@1 { ++ reg = <1>; ++ qca,clk-out-frequency = <125000000>; ++ }; ++ }; + }; + + &hdmi { +diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts +index c5b9037184149..7d530ae3483b8 100644 +--- a/arch/arm/boot/dts/omap3430-sdp.dts ++++ b/arch/arm/boot/dts/omap3430-sdp.dts +@@ -101,7 +101,7 @@ + + nand@1,0 { + compatible = "ti,omap2-nand"; +- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ ++ reg = <1 0 4>; /* CS1, offset 0, IO size 4 */ + interrupt-parent = <&gpmc>; + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ +diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi +index e36d590e83732..72c4a9fc41a20 100644 +--- a/arch/arm/boot/dts/qcom-apq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-apq8064.dtsi +@@ -198,7 +198,7 @@ + clock-frequency = <19200000>; + }; + +- pxo_board { ++ pxo_board: pxo_board { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <27000000>; +@@ -1148,7 +1148,7 @@ + }; + + gpu: adreno-3xx@4300000 { +- compatible = "qcom,adreno-3xx"; ++ compatible = "qcom,adreno-320.2", "qcom,adreno"; + reg = <0x04300000 0x20000>; + reg-names = "kgsl_3d0_reg_memory"; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; +@@ -1163,7 +1163,6 @@ + <&mmcc GFX3D_AHB_CLK>, + <&mmcc GFX3D_AXI_CLK>, + <&mmcc MMSS_IMEM_AHB_CLK>; +- qcom,chipid = <0x03020002>; + + iommus = <&gfx3d 0 + &gfx3d 1 +@@ -1306,7 +1305,7 @@ + reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator"; + clock-names = "iface_clk", "ref"; + clocks = <&mmcc DSI_M_AHB_CLK>, +- <&cxo_board>; ++ <&pxo_board>; + }; + + +diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c +index 120f9aa6fff32..3f015cb6ec2b0 100644 +--- a/arch/arm/mach-at91/pm.c ++++ b/arch/arm/mach-at91/pm.c +@@ -517,18 +517,22 @@ static const struct of_device_id ramc_ids[] __initconst = { + { /*sentinel*/ } + }; + +-static __init void at91_dt_ramc(void) ++static __init int at91_dt_ramc(void) + { + struct device_node *np; + const struct of_device_id *of_id; + int idx = 0; + void *standby = NULL; + const struct ramc_info *ramc; ++ int ret; + + for_each_matching_node_and_match(np, ramc_ids, &of_id) { + soc_pm.data.ramc[idx] = of_iomap(np, 0); +- if (!soc_pm.data.ramc[idx]) +- panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx); ++ if (!soc_pm.data.ramc[idx]) { ++ pr_err("unable to map ramc[%d] cpu registers\n", idx); ++ ret = -ENOMEM; ++ goto unmap_ramc; ++ } + + ramc = of_id->data; + if (!standby) +@@ -538,15 +542,26 @@ static __init void at91_dt_ramc(void) + idx++; + } + +- if (!idx) +- panic(pr_fmt("unable to find compatible ram controller node in dtb\n")); ++ if (!idx) { ++ pr_err("unable to find compatible ram controller node in dtb\n"); ++ ret = -ENODEV; ++ goto unmap_ramc; ++ } + + if (!standby) { + pr_warn("ramc no standby function available\n"); +- return; ++ return 0; + } + + at91_cpuidle_device.dev.platform_data = standby; ++ ++ return 0; ++ ++unmap_ramc: ++ while (idx) ++ iounmap(soc_pm.data.ramc[--idx]); ++ ++ return ret; + } + + static void at91rm9200_idle(void) +@@ -869,6 +884,8 @@ static void __init at91_pm_init(void (*pm_idle)(void)) + + void __init at91rm9200_pm_init(void) + { ++ int ret; ++ + if (!IS_ENABLED(CONFIG_SOC_AT91RM9200)) + return; + +@@ -880,7 +897,9 @@ void __init at91rm9200_pm_init(void) + soc_pm.data.standby_mode = AT91_PM_STANDBY; + soc_pm.data.suspend_mode = AT91_PM_ULP0; + +- at91_dt_ramc(); ++ ret = at91_dt_ramc(); ++ if (ret) ++ return; + + /* + * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. +@@ -895,13 +914,17 @@ void __init sam9x60_pm_init(void) + static const int modes[] __initconst = { + AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, AT91_PM_ULP1, + }; ++ int ret; + + if (!IS_ENABLED(CONFIG_SOC_SAM9X60)) + return; + + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); + at91_pm_modes_init(); +- at91_dt_ramc(); ++ ret = at91_dt_ramc(); ++ if (ret) ++ return; ++ + at91_pm_init(NULL); + + soc_pm.ws_ids = sam9x60_ws_ids; +@@ -910,6 +933,8 @@ void __init sam9x60_pm_init(void) + + void __init at91sam9_pm_init(void) + { ++ int ret; ++ + if (!IS_ENABLED(CONFIG_SOC_AT91SAM9)) + return; + +@@ -921,7 +946,10 @@ void __init at91sam9_pm_init(void) + soc_pm.data.standby_mode = AT91_PM_STANDBY; + soc_pm.data.suspend_mode = AT91_PM_ULP0; + +- at91_dt_ramc(); ++ ret = at91_dt_ramc(); ++ if (ret) ++ return; ++ + at91_pm_init(at91sam9_idle); + } + +@@ -930,12 +958,16 @@ void __init sama5_pm_init(void) + static const int modes[] __initconst = { + AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, + }; ++ int ret; + + if (!IS_ENABLED(CONFIG_SOC_SAMA5)) + return; + + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); +- at91_dt_ramc(); ++ ret = at91_dt_ramc(); ++ if (ret) ++ return; ++ + at91_pm_init(NULL); + } + +@@ -945,13 +977,17 @@ void __init sama5d2_pm_init(void) + AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, AT91_PM_ULP1, + AT91_PM_BACKUP, + }; ++ int ret; + + if (!IS_ENABLED(CONFIG_SOC_SAMA5D2)) + return; + + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); + at91_pm_modes_init(); +- at91_dt_ramc(); ++ ret = at91_dt_ramc(); ++ if (ret) ++ return; ++ + at91_pm_init(NULL); + + soc_pm.ws_ids = sama5d2_ws_ids; +diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c +index 40c74b4c4d730..e24409c1f5d39 100644 +--- a/arch/arm/mach-imx/pm-imx6.c ++++ b/arch/arm/mach-imx/pm-imx6.c +@@ -9,6 +9,7 @@ + #include <linux/io.h> + #include <linux/irq.h> + #include <linux/genalloc.h> ++#include <linux/irqchip/arm-gic.h> + #include <linux/mfd/syscon.h> + #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> + #include <linux/of.h> +@@ -618,6 +619,7 @@ static void __init imx6_pm_common_init(const struct imx6_pm_socdata + + static void imx6_pm_stby_poweroff(void) + { ++ gic_cpu_if_down(0); + imx6_set_lpm(STOP_POWER_OFF); + imx6q_suspend_finish(0); + +diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c +index 83d595ebcf1f6..9443f129859b2 100644 +--- a/arch/arm/mach-omap2/omap_hwmod.c ++++ b/arch/arm/mach-omap2/omap_hwmod.c +@@ -3618,6 +3618,8 @@ int omap_hwmod_init_module(struct device *dev, + oh->flags |= HWMOD_SWSUP_SIDLE_ACT; + if (data->cfg->quirks & SYSC_QUIRK_SWSUP_MSTANDBY) + oh->flags |= HWMOD_SWSUP_MSTANDBY; ++ if (data->cfg->quirks & SYSC_QUIRK_CLKDM_NOAUTO) ++ oh->flags |= HWMOD_CLKDM_NOAUTO; + + error = omap_hwmod_check_module(dev, oh, data, sysc_fields, + rev_offs, sysc_offs, syss_offs, +diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c +index ce8b043263521..1214e39aad5ec 100644 +--- a/arch/arm/net/bpf_jit_32.c ++++ b/arch/arm/net/bpf_jit_32.c +@@ -36,6 +36,10 @@ + * +-----+ + * |RSVD | JIT scratchpad + * current ARM_SP => +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE) ++ * | ... | caller-saved registers ++ * +-----+ ++ * | ... | arguments passed on stack ++ * ARM_SP during call => +-----| + * | | + * | ... | Function call stack + * | | +@@ -63,6 +67,12 @@ + * + * When popping registers off the stack at the end of a BPF function, we + * reference them via the current ARM_FP register. ++ * ++ * Some eBPF operations are implemented via a call to a helper function. ++ * Such calls are "invisible" in the eBPF code, so it is up to the calling ++ * program to preserve any caller-saved ARM registers during the call. The ++ * JIT emits code to push and pop those registers onto the stack, immediately ++ * above the callee stack frame. + */ + #define CALLEE_MASK (1 << ARM_R4 | 1 << ARM_R5 | 1 << ARM_R6 | \ + 1 << ARM_R7 | 1 << ARM_R8 | 1 << ARM_R9 | \ +@@ -70,6 +80,8 @@ + #define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR) + #define CALLEE_POP_MASK (CALLEE_MASK | 1 << ARM_PC) + ++#define CALLER_MASK (1 << ARM_R0 | 1 << ARM_R1 | 1 << ARM_R2 | 1 << ARM_R3) ++ + enum { + /* Stack layout - these are offsets from (top of stack - 4) */ + BPF_R2_HI, +@@ -464,6 +476,7 @@ static inline int epilogue_offset(const struct jit_ctx *ctx) + + static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op) + { ++ const int exclude_mask = BIT(ARM_R0) | BIT(ARM_R1); + const s8 *tmp = bpf2a32[TMP_REG_1]; + + #if __LINUX_ARM_ARCH__ == 7 +@@ -495,11 +508,17 @@ static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op) + emit(ARM_MOV_R(ARM_R0, rm), ctx); + } + ++ /* Push caller-saved registers on stack */ ++ emit(ARM_PUSH(CALLER_MASK & ~exclude_mask), ctx); ++ + /* Call appropriate function */ + emit_mov_i(ARM_IP, op == BPF_DIV ? + (u32)jit_udiv32 : (u32)jit_mod32, ctx); + emit_blx_r(ARM_IP, ctx); + ++ /* Restore caller-saved registers from stack */ ++ emit(ARM_POP(CALLER_MASK & ~exclude_mask), ctx); ++ + /* Save return value */ + if (rd != ARM_R0) + emit(ARM_MOV_R(rd, ARM_R0), ctx); +diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +index 5f42904d53ab6..580690057601c 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +@@ -386,6 +386,24 @@ + status = "disabled"; + }; + ++ can0: can@2180000 { ++ compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan"; ++ reg = <0x0 0x2180000 0x0 0x10000>; ++ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&sysclk>, <&clockgen 4 1>; ++ clock-names = "ipg", "per"; ++ status = "disabled"; ++ }; ++ ++ can1: can@2190000 { ++ compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan"; ++ reg = <0x0 0x2190000 0x0 0x10000>; ++ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; ++ clocks = <&sysclk>, <&clockgen 4 1>; ++ clock-names = "ipg", "per"; ++ status = "disabled"; ++ }; ++ + duart0: serial@21c0500 { + compatible = "fsl,ns16550", "ns16550a"; + reg = <0x00 0x21c0500 0x0 0x100>; +diff --git a/arch/arm64/boot/dts/qcom/pm8150.dtsi b/arch/arm64/boot/dts/qcom/pm8150.dtsi +index 1b6406927509f..82edcd74ce983 100644 +--- a/arch/arm64/boot/dts/qcom/pm8150.dtsi ++++ b/arch/arm64/boot/dts/qcom/pm8150.dtsi +@@ -48,7 +48,7 @@ + #size-cells = <0>; + + pon: power-on@800 { +- compatible = "qcom,pm8916-pon"; ++ compatible = "qcom,pm8998-pon"; + reg = <0x0800>; + pwrkey { + compatible = "qcom,pm8941-pwrkey"; +diff --git a/arch/powerpc/boot/dts/fsl/t1023rdb.dts b/arch/powerpc/boot/dts/fsl/t1023rdb.dts +index 5ba6fbfca2742..f82f85c65964c 100644 +--- a/arch/powerpc/boot/dts/fsl/t1023rdb.dts ++++ b/arch/powerpc/boot/dts/fsl/t1023rdb.dts +@@ -154,7 +154,7 @@ + + fm1mac3: ethernet@e4000 { + phy-handle = <&sgmii_aqr_phy3>; +- phy-connection-type = "sgmii-2500"; ++ phy-connection-type = "2500base-x"; + sleep = <&rcpm 0x20000000>; + }; + +diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c +index a1c7441940184..9ac0651795cf6 100644 +--- a/arch/powerpc/kernel/dma-iommu.c ++++ b/arch/powerpc/kernel/dma-iommu.c +@@ -117,6 +117,15 @@ u64 dma_iommu_get_required_mask(struct device *dev) + struct iommu_table *tbl = get_iommu_table_base(dev); + u64 mask; + ++ if (dev_is_pci(dev)) { ++ u64 bypass_mask = dma_direct_get_required_mask(dev); ++ ++ if (dma_iommu_dma_supported(dev, bypass_mask)) { ++ dev_info(dev, "%s: returning bypass mask 0x%llx\n", __func__, bypass_mask); ++ return bypass_mask; ++ } ++ } ++ + if (!tbl) + return 0; + +diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S +index 9d3b468bd2d7a..10df278dc3fbe 100644 +--- a/arch/powerpc/kernel/exceptions-64s.S ++++ b/arch/powerpc/kernel/exceptions-64s.S +@@ -1715,27 +1715,30 @@ EXC_COMMON_BEGIN(program_check_common) + */ + + andi. r10,r12,MSR_PR +- bne 2f /* If userspace, go normal path */ ++ bne .Lnormal_stack /* If userspace, go normal path */ + + andis. r10,r12,(SRR1_PROGTM)@h +- bne 1f /* If TM, emergency */ ++ bne .Lemergency_stack /* If TM, emergency */ + + cmpdi r1,-INT_FRAME_SIZE /* check if r1 is in userspace */ +- blt 2f /* normal path if not */ ++ blt .Lnormal_stack /* normal path if not */ + + /* Use the emergency stack */ +-1: andi. r10,r12,MSR_PR /* Set CR0 correctly for label */ ++.Lemergency_stack: ++ andi. r10,r12,MSR_PR /* Set CR0 correctly for label */ + /* 3 in EXCEPTION_PROLOG_COMMON */ + mr r10,r1 /* Save r1 */ + ld r1,PACAEMERGSP(r13) /* Use emergency stack */ + subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ + __ISTACK(program_check)=0 + __GEN_COMMON_BODY program_check +- b 3f +-2: ++ b .Ldo_program_check ++ ++.Lnormal_stack: + __ISTACK(program_check)=1 + __GEN_COMMON_BODY program_check +-3: ++ ++.Ldo_program_check: + addi r3,r1,STACK_FRAME_OVERHEAD + bl program_check_exception + REST_NVGPRS(r1) /* instruction emulation may change GPRs */ +diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c +index 658ca2bab13cc..0752967f351bb 100644 +--- a/arch/powerpc/net/bpf_jit_comp64.c ++++ b/arch/powerpc/net/bpf_jit_comp64.c +@@ -347,18 +347,25 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, + EMIT(PPC_RAW_SUB(dst_reg, dst_reg, src_reg)); + goto bpf_alu32_trunc; + case BPF_ALU | BPF_ADD | BPF_K: /* (u32) dst += (u32) imm */ +- case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */ + case BPF_ALU64 | BPF_ADD | BPF_K: /* dst += imm */ ++ if (!imm) { ++ goto bpf_alu32_trunc; ++ } else if (imm >= -32768 && imm < 32768) { ++ EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(imm))); ++ } else { ++ PPC_LI32(b2p[TMP_REG_1], imm); ++ EMIT(PPC_RAW_ADD(dst_reg, dst_reg, b2p[TMP_REG_1])); ++ } ++ goto bpf_alu32_trunc; ++ case BPF_ALU | BPF_SUB | BPF_K: /* (u32) dst -= (u32) imm */ + case BPF_ALU64 | BPF_SUB | BPF_K: /* dst -= imm */ +- if (BPF_OP(code) == BPF_SUB) +- imm = -imm; +- if (imm) { +- if (imm >= -32768 && imm < 32768) +- EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(imm))); +- else { +- PPC_LI32(b2p[TMP_REG_1], imm); +- EMIT(PPC_RAW_ADD(dst_reg, dst_reg, b2p[TMP_REG_1])); +- } ++ if (!imm) { ++ goto bpf_alu32_trunc; ++ } else if (imm > -32768 && imm <= 32768) { ++ EMIT(PPC_RAW_ADDI(dst_reg, dst_reg, IMM_L(-imm))); ++ } else { ++ PPC_LI32(b2p[TMP_REG_1], imm); ++ EMIT(PPC_RAW_SUB(dst_reg, dst_reg, b2p[TMP_REG_1])); + } + goto bpf_alu32_trunc; + case BPF_ALU | BPF_MUL | BPF_X: /* (u32) dst *= (u32) src */ +diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c +index cf024fa37bda0..7ed38ebd0c7b6 100644 +--- a/arch/powerpc/platforms/pseries/eeh_pseries.c ++++ b/arch/powerpc/platforms/pseries/eeh_pseries.c +@@ -868,6 +868,10 @@ static int __init eeh_pseries_init(void) + if (is_kdump_kernel() || reset_devices) { + pr_info("Issue PHB reset ...\n"); + list_for_each_entry(phb, &hose_list, list_node) { ++ // Skip if the slot is empty ++ if (list_empty(&PCI_DN(phb->dn)->child_list)) ++ continue; ++ + pdn = list_first_entry(&PCI_DN(phb->dn)->child_list, struct pci_dn, list); + config_addr = pseries_eeh_get_pe_config_addr(pdn); + +diff --git a/arch/riscv/include/uapi/asm/unistd.h b/arch/riscv/include/uapi/asm/unistd.h +index 4b989ae15d59f..8062996c2dfd0 100644 +--- a/arch/riscv/include/uapi/asm/unistd.h ++++ b/arch/riscv/include/uapi/asm/unistd.h +@@ -18,9 +18,10 @@ + #ifdef __LP64__ + #define __ARCH_WANT_NEW_STAT + #define __ARCH_WANT_SET_GET_RLIMIT +-#define __ARCH_WANT_SYS_CLONE3 + #endif /* __LP64__ */ + ++#define __ARCH_WANT_SYS_CLONE3 ++ + #include <asm-generic/unistd.h> + + /* +diff --git a/arch/riscv/kernel/vdso.c b/arch/riscv/kernel/vdso.c +index 3f1d35e7c98a6..73d45931a053a 100644 +--- a/arch/riscv/kernel/vdso.c ++++ b/arch/riscv/kernel/vdso.c +@@ -65,7 +65,9 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, + + vdso_len = (vdso_pages + 1) << PAGE_SHIFT; + +- mmap_write_lock(mm); ++ if (mmap_write_lock_killable(mm)) ++ return -EINTR; ++ + vdso_base = get_unmapped_area(NULL, 0, vdso_len, 0, 0); + if (IS_ERR_VALUE(vdso_base)) { + ret = vdso_base; +diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c +index 094118663285d..89f81067e09ed 100644 +--- a/arch/riscv/mm/cacheflush.c ++++ b/arch/riscv/mm/cacheflush.c +@@ -16,6 +16,8 @@ static void ipi_remote_fence_i(void *info) + + void flush_icache_all(void) + { ++ local_flush_icache_all(); ++ + if (IS_ENABLED(CONFIG_RISCV_SBI)) + sbi_remote_fence_i(NULL); + else +diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c +index 8d9047d2d1e11..cd0cbdafedbd2 100644 +--- a/arch/s390/net/bpf_jit_comp.c ++++ b/arch/s390/net/bpf_jit_comp.c +@@ -1775,7 +1775,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp) + jit.addrs = kvcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL); + if (jit.addrs == NULL) { + fp = orig_fp; +- goto out; ++ goto free_addrs; + } + /* + * Three initial passes: +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index f3c8a8110f60c..4201d0cf5f835 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -1415,7 +1415,7 @@ config HIGHMEM4G + + config HIGHMEM64G + bool "64GB" +- depends on !M486SX && !M486 && !M586 && !M586TSC && !M586MMX && !MGEODE_LX && !MGEODEGX1 && !MCYRIXIII && !MELAN && !MWINCHIPC6 && !WINCHIP3D && !MK6 ++ depends on !M486SX && !M486 && !M586 && !M586TSC && !M586MMX && !MGEODE_LX && !MGEODEGX1 && !MCYRIXIII && !MELAN && !MWINCHIPC6 && !MWINCHIP3D && !MK6 + select X86_PAE + help + Select this if you have a 32-bit processor and more than 4 +diff --git a/arch/x86/include/asm/entry-common.h b/arch/x86/include/asm/entry-common.h +index 6fe54b2813c13..4a382fb6a9ef8 100644 +--- a/arch/x86/include/asm/entry-common.h ++++ b/arch/x86/include/asm/entry-common.h +@@ -24,7 +24,7 @@ static __always_inline void arch_check_user_regs(struct pt_regs *regs) + * For !SMAP hardware we patch out CLAC on entry. + */ + if (boot_cpu_has(X86_FEATURE_SMAP) || +- (IS_ENABLED(CONFIG_64_BIT) && boot_cpu_has(X86_FEATURE_XENPV))) ++ (IS_ENABLED(CONFIG_64BIT) && boot_cpu_has(X86_FEATURE_XENPV))) + mask |= X86_EFLAGS_AC; + + WARN_ON_ONCE(flags & mask); +diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c +index 25148ebd36341..ec21f5e9ffd05 100644 +--- a/arch/x86/kernel/cpu/common.c ++++ b/arch/x86/kernel/cpu/common.c +@@ -320,6 +320,7 @@ static __always_inline void setup_smap(struct cpuinfo_x86 *c) + #ifdef CONFIG_X86_SMAP + cr4_set_bits(X86_CR4_SMAP); + #else ++ clear_cpu_cap(c, X86_FEATURE_SMAP); + cr4_clear_bits(X86_CR4_SMAP); + #endif + } +diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c +index a4b5af03dcc1b..0c6d1dc59fa21 100644 +--- a/arch/x86/kernel/early-quirks.c ++++ b/arch/x86/kernel/early-quirks.c +@@ -711,12 +711,6 @@ static struct chipset early_qrk[] __initdata = { + */ + { PCI_VENDOR_ID_INTEL, 0x0f00, + PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, +- { PCI_VENDOR_ID_INTEL, 0x3e20, +- PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, +- { PCI_VENDOR_ID_INTEL, 0x3ec4, +- PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, +- { PCI_VENDOR_ID_INTEL, 0x8a12, +- PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, + { PCI_VENDOR_ID_BROADCOM, 0x4331, + PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset}, + {} +diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c +index 7a50f0b62a709..4ab7a9757e521 100644 +--- a/arch/x86/kernel/hpet.c ++++ b/arch/x86/kernel/hpet.c +@@ -9,6 +9,7 @@ + + #include <asm/hpet.h> + #include <asm/time.h> ++#include <asm/mwait.h> + + #undef pr_fmt + #define pr_fmt(fmt) "hpet: " fmt +@@ -806,6 +807,83 @@ static bool __init hpet_counting(void) + return false; + } + ++static bool __init mwait_pc10_supported(void) ++{ ++ unsigned int eax, ebx, ecx, mwait_substates; ++ ++ if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) ++ return false; ++ ++ if (!cpu_feature_enabled(X86_FEATURE_MWAIT)) ++ return false; ++ ++ if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF) ++ return false; ++ ++ cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates); ++ ++ return (ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) && ++ (ecx & CPUID5_ECX_INTERRUPT_BREAK) && ++ (mwait_substates & (0xF << 28)); ++} ++ ++/* ++ * Check whether the system supports PC10. If so force disable HPET as that ++ * stops counting in PC10. This check is overbroad as it does not take any ++ * of the following into account: ++ * ++ * - ACPI tables ++ * - Enablement of intel_idle ++ * - Command line arguments which limit intel_idle C-state support ++ * ++ * That's perfectly fine. HPET is a piece of hardware designed by committee ++ * and the only reasons why it is still in use on modern systems is the ++ * fact that it is impossible to reliably query TSC and CPU frequency via ++ * CPUID or firmware. ++ * ++ * If HPET is functional it is useful for calibrating TSC, but this can be ++ * done via PMTIMER as well which seems to be the last remaining timer on ++ * X86/INTEL platforms that has not been completely wreckaged by feature ++ * creep. ++ * ++ * In theory HPET support should be removed altogether, but there are older ++ * systems out there which depend on it because TSC and APIC timer are ++ * dysfunctional in deeper C-states. ++ * ++ * It's only 20 years now that hardware people have been asked to provide ++ * reliable and discoverable facilities which can be used for timekeeping ++ * and per CPU timer interrupts. ++ * ++ * The probability that this problem is going to be solved in the ++ * forseeable future is close to zero, so the kernel has to be cluttered ++ * with heuristics to keep up with the ever growing amount of hardware and ++ * firmware trainwrecks. Hopefully some day hardware people will understand ++ * that the approach of "This can be fixed in software" is not sustainable. ++ * Hope dies last... ++ */ ++static bool __init hpet_is_pc10_damaged(void) ++{ ++ unsigned long long pcfg; ++ ++ /* Check whether PC10 substates are supported */ ++ if (!mwait_pc10_supported()) ++ return false; ++ ++ /* Check whether PC10 is enabled in PKG C-state limit */ ++ rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, pcfg); ++ if ((pcfg & 0xF) < 8) ++ return false; ++ ++ if (hpet_force_user) { ++ pr_warn("HPET force enabled via command line, but dysfunctional in PC10.\n"); ++ return false; ++ } ++ ++ pr_info("HPET dysfunctional in PC10. Force disabled.\n"); ++ boot_hpet_disable = true; ++ return true; ++} ++ + /** + * hpet_enable - Try to setup the HPET timer. Returns 1 on success. + */ +@@ -819,6 +897,9 @@ int __init hpet_enable(void) + if (!is_hpet_capable()) + return 0; + ++ if (hpet_is_pc10_damaged()) ++ return 0; ++ + hpet_set_mapping(); + if (!hpet_virt_address) + return 0; +diff --git a/arch/x86/kernel/sev-es-shared.c b/arch/x86/kernel/sev-es-shared.c +index ecb20b17b7df6..82db4014deb21 100644 +--- a/arch/x86/kernel/sev-es-shared.c ++++ b/arch/x86/kernel/sev-es-shared.c +@@ -130,6 +130,8 @@ static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, + } else { + ret = ES_VMM_ERROR; + } ++ } else if (ghcb->save.sw_exit_info_1 & 0xffffffff) { ++ ret = ES_VMM_ERROR; + } else { + ret = ES_OK; + } +diff --git a/arch/x86/platform/olpc/olpc.c b/arch/x86/platform/olpc/olpc.c +index ee2beda590d0d..1d4a00e767ece 100644 +--- a/arch/x86/platform/olpc/olpc.c ++++ b/arch/x86/platform/olpc/olpc.c +@@ -274,7 +274,7 @@ static struct olpc_ec_driver ec_xo1_driver = { + + static struct olpc_ec_driver ec_xo1_5_driver = { + .ec_cmd = olpc_xo1_ec_cmd, +-#ifdef CONFIG_OLPC_XO1_5_SCI ++#ifdef CONFIG_OLPC_XO15_SCI + /* + * XO-1.5 EC wakeups are available when olpc-xo15-sci driver is + * compiled in +diff --git a/arch/xtensa/include/asm/kmem_layout.h b/arch/xtensa/include/asm/kmem_layout.h +index 7cbf68ca71060..6fc05cba61a27 100644 +--- a/arch/xtensa/include/asm/kmem_layout.h ++++ b/arch/xtensa/include/asm/kmem_layout.h +@@ -78,7 +78,7 @@ + #endif + #define XCHAL_KIO_SIZE 0x10000000 + +-#if (!XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY) && defined(CONFIG_OF) ++#if (!XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY) && defined(CONFIG_USE_OF) + #define XCHAL_KIO_PADDR xtensa_get_kio_paddr() + #ifndef __ASSEMBLY__ + extern unsigned long xtensa_kio_paddr; +diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c +index a48bf2d10ac2d..80cc9770a8d2d 100644 +--- a/arch/xtensa/kernel/irq.c ++++ b/arch/xtensa/kernel/irq.c +@@ -145,7 +145,7 @@ unsigned xtensa_get_ext_irq_no(unsigned irq) + + void __init init_IRQ(void) + { +-#ifdef CONFIG_OF ++#ifdef CONFIG_USE_OF + irqchip_init(); + #else + #ifdef CONFIG_HAVE_SMP +diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c +index ed184106e4cf9..ee9082a142feb 100644 +--- a/arch/xtensa/kernel/setup.c ++++ b/arch/xtensa/kernel/setup.c +@@ -63,7 +63,7 @@ extern unsigned long initrd_end; + extern int initrd_below_start_ok; + #endif + +-#ifdef CONFIG_OF ++#ifdef CONFIG_USE_OF + void *dtb_start = __dtb_start; + #endif + +@@ -125,7 +125,7 @@ __tagtable(BP_TAG_INITRD, parse_tag_initrd); + + #endif /* CONFIG_BLK_DEV_INITRD */ + +-#ifdef CONFIG_OF ++#ifdef CONFIG_USE_OF + + static int __init parse_tag_fdt(const bp_tag_t *tag) + { +@@ -135,7 +135,7 @@ static int __init parse_tag_fdt(const bp_tag_t *tag) + + __tagtable(BP_TAG_FDT, parse_tag_fdt); + +-#endif /* CONFIG_OF */ ++#endif /* CONFIG_USE_OF */ + + static int __init parse_tag_cmdline(const bp_tag_t* tag) + { +@@ -183,7 +183,7 @@ static int __init parse_bootparam(const bp_tag_t *tag) + } + #endif + +-#ifdef CONFIG_OF ++#ifdef CONFIG_USE_OF + + #if !XCHAL_HAVE_PTP_MMU || XCHAL_HAVE_SPANNING_WAY + unsigned long xtensa_kio_paddr = XCHAL_KIO_DEFAULT_PADDR; +@@ -232,7 +232,7 @@ void __init early_init_devtree(void *params) + strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); + } + +-#endif /* CONFIG_OF */ ++#endif /* CONFIG_USE_OF */ + + /* + * Initialize architecture. (Early stage) +@@ -253,7 +253,7 @@ void __init init_arch(bp_tag_t *bp_start) + if (bp_start) + parse_bootparam(bp_start); + +-#ifdef CONFIG_OF ++#ifdef CONFIG_USE_OF + early_init_devtree(dtb_start); + #endif + +diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c +index fd2193df8a145..511bb92518f28 100644 +--- a/arch/xtensa/mm/mmu.c ++++ b/arch/xtensa/mm/mmu.c +@@ -100,7 +100,7 @@ void init_mmu(void) + + void init_kio(void) + { +-#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF) ++#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_USE_OF) + /* + * Update the IO area mapping in case xtensa_kio_paddr has changed + */ +diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c +index 159b57c6dc4df..02341fd66e8d2 100644 +--- a/drivers/bus/ti-sysc.c ++++ b/drivers/bus/ti-sysc.c +@@ -1464,6 +1464,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { + /* Quirks that need to be set based on detected module */ + SYSC_QUIRK("aess", 0, 0, 0x10, -ENODEV, 0x40000000, 0xffffffff, + SYSC_MODULE_QUIRK_AESS), ++ /* Errata i893 handling for dra7 dcan1 and 2 */ ++ SYSC_QUIRK("dcan", 0x4ae3c000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff, ++ SYSC_QUIRK_CLKDM_NOAUTO), + SYSC_QUIRK("dcan", 0x48480000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff, + SYSC_QUIRK_CLKDM_NOAUTO), + SYSC_QUIRK("dss", 0x4832a000, 0, 0x10, 0x14, 0x00000020, 0xffffffff, +@@ -2922,6 +2925,7 @@ static int sysc_init_soc(struct sysc *ddata) + break; + case SOC_AM3: + sysc_add_disabled(0x48310000); /* rng */ ++ break; + default: + break; + }; +diff --git a/drivers/gpu/drm/nouveau/dispnv50/crc.c b/drivers/gpu/drm/nouveau/dispnv50/crc.c +index b8c31b697797e..66f32d965c723 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/crc.c ++++ b/drivers/gpu/drm/nouveau/dispnv50/crc.c +@@ -704,6 +704,7 @@ static const struct file_operations nv50_crc_flip_threshold_fops = { + .open = nv50_crc_debugfs_flip_threshold_open, + .read = seq_read, + .write = nv50_crc_debugfs_flip_threshold_set, ++ .release = single_release, + }; + + int nv50_head_crc_late_register(struct nv50_head *head) +diff --git a/drivers/gpu/drm/nouveau/dispnv50/head.c b/drivers/gpu/drm/nouveau/dispnv50/head.c +index 61826cac3061a..be649d14f8797 100644 +--- a/drivers/gpu/drm/nouveau/dispnv50/head.c ++++ b/drivers/gpu/drm/nouveau/dispnv50/head.c +@@ -51,6 +51,7 @@ nv50_head_flush_clr(struct nv50_head *head, + void + nv50_head_flush_set_wndw(struct nv50_head *head, struct nv50_head_atom *asyh) + { ++ if (asyh->set.curs ) head->func->curs_set(head, asyh); + if (asyh->set.olut ) { + asyh->olut.offset = nv50_lut_load(&head->olut, + asyh->olut.buffer, +@@ -66,7 +67,6 @@ nv50_head_flush_set(struct nv50_head *head, struct nv50_head_atom *asyh) + if (asyh->set.view ) head->func->view (head, asyh); + if (asyh->set.mode ) head->func->mode (head, asyh); + if (asyh->set.core ) head->func->core_set(head, asyh); +- if (asyh->set.curs ) head->func->curs_set(head, asyh); + if (asyh->set.base ) head->func->base (head, asyh); + if (asyh->set.ovly ) head->func->ovly (head, asyh); + if (asyh->set.dither ) head->func->dither (head, asyh); +diff --git a/drivers/gpu/drm/nouveau/nouveau_debugfs.c b/drivers/gpu/drm/nouveau/nouveau_debugfs.c +index c2bc05eb2e54a..1cbe01048b930 100644 +--- a/drivers/gpu/drm/nouveau/nouveau_debugfs.c ++++ b/drivers/gpu/drm/nouveau/nouveau_debugfs.c +@@ -207,6 +207,7 @@ static const struct file_operations nouveau_pstate_fops = { + .open = nouveau_debugfs_pstate_open, + .read = seq_read, + .write = nouveau_debugfs_pstate_set, ++ .release = single_release, + }; + + static struct drm_info_list nouveau_debugfs_list[] = { +diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c +index c2051380d18c0..6504ebec11901 100644 +--- a/drivers/gpu/drm/nouveau/nouveau_gem.c ++++ b/drivers/gpu/drm/nouveau/nouveau_gem.c +@@ -196,10 +196,8 @@ nouveau_gem_new(struct nouveau_cli *cli, u64 size, int align, uint32_t domain, + } + + ret = nouveau_bo_init(nvbo, size, align, domain, NULL, NULL); +- if (ret) { +- nouveau_bo_ref(NULL, &nvbo); ++ if (ret) + return ret; +- } + + /* we restrict allowed domains on nv50+ to only the types + * that were requested at creation time. not possibly on +diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +index f75fb157f2ff7..016b877051dab 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c ++++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +@@ -216,11 +216,13 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, + goto err_disable_clk_tmds; + } + ++ ret = sun8i_hdmi_phy_init(hdmi->phy); ++ if (ret) ++ goto err_disable_clk_tmds; ++ + drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs); + drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS); + +- sun8i_hdmi_phy_init(hdmi->phy); +- + plat_data->mode_valid = hdmi->quirks->mode_valid; + plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe; + sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data); +@@ -262,6 +264,7 @@ static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master, + struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev); + + dw_hdmi_unbind(hdmi->hdmi); ++ sun8i_hdmi_phy_deinit(hdmi->phy); + clk_disable_unprepare(hdmi->clk_tmds); + reset_control_assert(hdmi->rst_ctrl); + gpiod_set_value(hdmi->ddc_en, 0); +diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +index 74f6ed0e25709..bffe1b9cd3dcb 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h ++++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +@@ -169,6 +169,7 @@ struct sun8i_hdmi_phy { + struct clk *clk_phy; + struct clk *clk_pll0; + struct clk *clk_pll1; ++ struct device *dev; + unsigned int rcal; + struct regmap *regs; + struct reset_control *rst_phy; +@@ -205,7 +206,8 @@ encoder_to_sun8i_dw_hdmi(struct drm_encoder *encoder) + + int sun8i_hdmi_phy_get(struct sun8i_dw_hdmi *hdmi, struct device_node *node); + +-void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy); ++int sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy); ++void sun8i_hdmi_phy_deinit(struct sun8i_hdmi_phy *phy); + void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy, + struct dw_hdmi_plat_data *plat_data); + +diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c +index c9239708d398c..b64d93da651d2 100644 +--- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c ++++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c +@@ -506,9 +506,60 @@ static void sun8i_hdmi_phy_init_h3(struct sun8i_hdmi_phy *phy) + phy->rcal = (val & SUN8I_HDMI_PHY_ANA_STS_RCAL_MASK) >> 2; + } + +-void sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy) ++int sun8i_hdmi_phy_init(struct sun8i_hdmi_phy *phy) + { ++ int ret; ++ ++ ret = reset_control_deassert(phy->rst_phy); ++ if (ret) { ++ dev_err(phy->dev, "Cannot deassert phy reset control: %d\n", ret); ++ return ret; ++ } ++ ++ ret = clk_prepare_enable(phy->clk_bus); ++ if (ret) { ++ dev_err(phy->dev, "Cannot enable bus clock: %d\n", ret); ++ goto err_assert_rst_phy; ++ } ++ ++ ret = clk_prepare_enable(phy->clk_mod); ++ if (ret) { ++ dev_err(phy->dev, "Cannot enable mod clock: %d\n", ret); ++ goto err_disable_clk_bus; ++ } ++ ++ if (phy->variant->has_phy_clk) { ++ ret = sun8i_phy_clk_create(phy, phy->dev, ++ phy->variant->has_second_pll); ++ if (ret) { ++ dev_err(phy->dev, "Couldn't create the PHY clock\n"); ++ goto err_disable_clk_mod; ++ } ++ ++ clk_prepare_enable(phy->clk_phy); ++ } ++ + phy->variant->phy_init(phy); ++ ++ return 0; ++ ++err_disable_clk_mod: ++ clk_disable_unprepare(phy->clk_mod); ++err_disable_clk_bus: ++ clk_disable_unprepare(phy->clk_bus); ++err_assert_rst_phy: ++ reset_control_assert(phy->rst_phy); ++ ++ return ret; ++} ++ ++void sun8i_hdmi_phy_deinit(struct sun8i_hdmi_phy *phy) ++{ ++ clk_disable_unprepare(phy->clk_mod); ++ clk_disable_unprepare(phy->clk_bus); ++ clk_disable_unprepare(phy->clk_phy); ++ ++ reset_control_assert(phy->rst_phy); + } + + void sun8i_hdmi_phy_set_ops(struct sun8i_hdmi_phy *phy, +@@ -638,6 +689,7 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev) + return -ENOMEM; + + phy->variant = (struct sun8i_hdmi_phy_variant *)match->data; ++ phy->dev = dev; + + ret = of_address_to_resource(node, 0, &res); + if (ret) { +@@ -696,47 +748,10 @@ static int sun8i_hdmi_phy_probe(struct platform_device *pdev) + goto err_put_clk_pll1; + } + +- ret = reset_control_deassert(phy->rst_phy); +- if (ret) { +- dev_err(dev, "Cannot deassert phy reset control: %d\n", ret); +- goto err_put_rst_phy; +- } +- +- ret = clk_prepare_enable(phy->clk_bus); +- if (ret) { +- dev_err(dev, "Cannot enable bus clock: %d\n", ret); +- goto err_deassert_rst_phy; +- } +- +- ret = clk_prepare_enable(phy->clk_mod); +- if (ret) { +- dev_err(dev, "Cannot enable mod clock: %d\n", ret); +- goto err_disable_clk_bus; +- } +- +- if (phy->variant->has_phy_clk) { +- ret = sun8i_phy_clk_create(phy, dev, +- phy->variant->has_second_pll); +- if (ret) { +- dev_err(dev, "Couldn't create the PHY clock\n"); +- goto err_disable_clk_mod; +- } +- +- clk_prepare_enable(phy->clk_phy); +- } +- + platform_set_drvdata(pdev, phy); + + return 0; + +-err_disable_clk_mod: +- clk_disable_unprepare(phy->clk_mod); +-err_disable_clk_bus: +- clk_disable_unprepare(phy->clk_bus); +-err_deassert_rst_phy: +- reset_control_assert(phy->rst_phy); +-err_put_rst_phy: +- reset_control_put(phy->rst_phy); + err_put_clk_pll1: + clk_put(phy->clk_pll1); + err_put_clk_pll0: +@@ -753,12 +768,6 @@ static int sun8i_hdmi_phy_remove(struct platform_device *pdev) + { + struct sun8i_hdmi_phy *phy = platform_get_drvdata(pdev); + +- clk_disable_unprepare(phy->clk_mod); +- clk_disable_unprepare(phy->clk_bus); +- clk_disable_unprepare(phy->clk_phy); +- +- reset_control_assert(phy->rst_phy); +- + reset_control_put(phy->rst_phy); + + clk_put(phy->clk_pll0); +diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c +index 1a5f1ccd1d2f7..0af2784cbd0d9 100644 +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -41,6 +41,8 @@ + #define I2C_HANDSHAKE_RST 0x0020 + #define I2C_FIFO_ADDR_CLR 0x0001 + #define I2C_DELAY_LEN 0x0002 ++#define I2C_ST_START_CON 0x8001 ++#define I2C_FS_START_CON 0x1800 + #define I2C_TIME_CLR_VALUE 0x0000 + #define I2C_TIME_DEFAULT_VALUE 0x0003 + #define I2C_WRRD_TRANAC_VALUE 0x0002 +@@ -479,6 +481,7 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c) + { + u16 control_reg; + u16 intr_stat_reg; ++ u16 ext_conf_val; + + mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_START); + intr_stat_reg = mtk_i2c_readw(i2c, OFFSET_INTR_STAT); +@@ -517,8 +520,13 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c) + if (i2c->dev_comp->ltiming_adjust) + mtk_i2c_writew(i2c, i2c->ltiming_reg, OFFSET_LTIMING); + ++ if (i2c->speed_hz <= I2C_MAX_STANDARD_MODE_FREQ) ++ ext_conf_val = I2C_ST_START_CON; ++ else ++ ext_conf_val = I2C_FS_START_CON; ++ + if (i2c->dev_comp->timing_adjust) { +- mtk_i2c_writew(i2c, i2c->ac_timing.ext, OFFSET_EXT_CONF); ++ ext_conf_val = i2c->ac_timing.ext; + mtk_i2c_writew(i2c, i2c->ac_timing.inter_clk_div, + OFFSET_CLOCK_DIV); + mtk_i2c_writew(i2c, I2C_SCL_MIS_COMP_VALUE, +@@ -543,6 +551,7 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c) + OFFSET_HS_STA_STO_AC_TIMING); + } + } ++ mtk_i2c_writew(i2c, ext_conf_val, OFFSET_EXT_CONF); + + /* If use i2c pin from PMIC mt6397 side, need set PATH_DIR first */ + if (i2c->have_pmic) +diff --git a/drivers/i2c/i2c-core-acpi.c b/drivers/i2c/i2c-core-acpi.c +index 37c510d9347a7..4b136d8710743 100644 +--- a/drivers/i2c/i2c-core-acpi.c ++++ b/drivers/i2c/i2c-core-acpi.c +@@ -426,6 +426,7 @@ static int i2c_acpi_notify(struct notifier_block *nb, unsigned long value, + break; + + i2c_acpi_register_device(adapter, adev, &info); ++ put_device(&adapter->dev); + break; + case ACPI_RECONFIG_DEVICE_REMOVE: + if (!acpi_device_enumerated(adev)) +diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c +index d3f40c9a8c6c8..b274083a6e635 100644 +--- a/drivers/mmc/host/meson-gx-mmc.c ++++ b/drivers/mmc/host/meson-gx-mmc.c +@@ -735,7 +735,7 @@ static void meson_mmc_desc_chain_transfer(struct mmc_host *mmc, u32 cmd_cfg) + writel(start, host->regs + SD_EMMC_START); + } + +-/* local sg copy to buffer version with _to/fromio usage for dram_access_quirk */ ++/* local sg copy for dram_access_quirk */ + static void meson_mmc_copy_buffer(struct meson_host *host, struct mmc_data *data, + size_t buflen, bool to_buffer) + { +@@ -753,21 +753,27 @@ static void meson_mmc_copy_buffer(struct meson_host *host, struct mmc_data *data + sg_miter_start(&miter, sgl, nents, sg_flags); + + while ((offset < buflen) && sg_miter_next(&miter)) { +- unsigned int len; ++ unsigned int buf_offset = 0; ++ unsigned int len, left; ++ u32 *buf = miter.addr; + + len = min(miter.length, buflen - offset); ++ left = len; + +- /* When dram_access_quirk, the bounce buffer is a iomem mapping */ +- if (host->dram_access_quirk) { +- if (to_buffer) +- memcpy_toio(host->bounce_iomem_buf + offset, miter.addr, len); +- else +- memcpy_fromio(miter.addr, host->bounce_iomem_buf + offset, len); ++ if (to_buffer) { ++ do { ++ writel(*buf++, host->bounce_iomem_buf + offset + buf_offset); ++ ++ buf_offset += 4; ++ left -= 4; ++ } while (left); + } else { +- if (to_buffer) +- memcpy(host->bounce_buf + offset, miter.addr, len); +- else +- memcpy(miter.addr, host->bounce_buf + offset, len); ++ do { ++ *buf++ = readl(host->bounce_iomem_buf + offset + buf_offset); ++ ++ buf_offset += 4; ++ left -= 4; ++ } while (left); + } + + offset += len; +@@ -819,7 +825,11 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd) + if (data->flags & MMC_DATA_WRITE) { + cmd_cfg |= CMD_CFG_DATA_WR; + WARN_ON(xfer_bytes > host->bounce_buf_size); +- meson_mmc_copy_buffer(host, data, xfer_bytes, true); ++ if (host->dram_access_quirk) ++ meson_mmc_copy_buffer(host, data, xfer_bytes, true); ++ else ++ sg_copy_to_buffer(data->sg, data->sg_len, ++ host->bounce_buf, xfer_bytes); + dma_wmb(); + } + +@@ -838,12 +848,43 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd) + writel(cmd->arg, host->regs + SD_EMMC_CMD_ARG); + } + ++static int meson_mmc_validate_dram_access(struct mmc_host *mmc, struct mmc_data *data) ++{ ++ struct scatterlist *sg; ++ int i; ++ ++ /* Reject request if any element offset or size is not 32bit aligned */ ++ for_each_sg(data->sg, sg, data->sg_len, i) { ++ if (!IS_ALIGNED(sg->offset, sizeof(u32)) || ++ !IS_ALIGNED(sg->length, sizeof(u32))) { ++ dev_err(mmc_dev(mmc), "unaligned sg offset %u len %u\n", ++ data->sg->offset, data->sg->length); ++ return -EINVAL; ++ } ++ } ++ ++ return 0; ++} ++ + static void meson_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) + { + struct meson_host *host = mmc_priv(mmc); + bool needs_pre_post_req = mrq->data && + !(mrq->data->host_cookie & SD_EMMC_PRE_REQ_DONE); + ++ /* ++ * The memory at the end of the controller used as bounce buffer for ++ * the dram_access_quirk only accepts 32bit read/write access, ++ * check the aligment and length of the data before starting the request. ++ */ ++ if (host->dram_access_quirk && mrq->data) { ++ mrq->cmd->error = meson_mmc_validate_dram_access(mmc, mrq->data); ++ if (mrq->cmd->error) { ++ mmc_request_done(mmc, mrq); ++ return; ++ } ++ } ++ + if (needs_pre_post_req) { + meson_mmc_get_transfer_mode(mmc, mrq); + if (!meson_mmc_desc_chain_mode(mrq->data)) +@@ -988,7 +1029,11 @@ static irqreturn_t meson_mmc_irq_thread(int irq, void *dev_id) + if (meson_mmc_bounce_buf_read(data)) { + xfer_bytes = data->blksz * data->blocks; + WARN_ON(xfer_bytes > host->bounce_buf_size); +- meson_mmc_copy_buffer(host, data, xfer_bytes, false); ++ if (host->dram_access_quirk) ++ meson_mmc_copy_buffer(host, data, xfer_bytes, false); ++ else ++ sg_copy_from_buffer(data->sg, data->sg_len, ++ host->bounce_buf, xfer_bytes); + } + + next_cmd = meson_mmc_get_next_command(cmd); +diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c +index 5564d7b23e7cd..d1a1c548c515f 100644 +--- a/drivers/mmc/host/sdhci-of-at91.c ++++ b/drivers/mmc/host/sdhci-of-at91.c +@@ -11,6 +11,7 @@ + #include <linux/delay.h> + #include <linux/err.h> + #include <linux/io.h> ++#include <linux/iopoll.h> + #include <linux/kernel.h> + #include <linux/mmc/host.h> + #include <linux/mmc/slot-gpio.h> +@@ -61,7 +62,6 @@ static void sdhci_at91_set_force_card_detect(struct sdhci_host *host) + static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) + { + u16 clk; +- unsigned long timeout; + + host->mmc->actual_clock = 0; + +@@ -86,16 +86,11 @@ static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); + + /* Wait max 20 ms */ +- timeout = 20; +- while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) +- & SDHCI_CLOCK_INT_STABLE)) { +- if (timeout == 0) { +- pr_err("%s: Internal clock never stabilised.\n", +- mmc_hostname(host->mmc)); +- return; +- } +- timeout--; +- mdelay(1); ++ if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE), ++ 1000, 20000, false, host, SDHCI_CLOCK_CONTROL)) { ++ pr_err("%s: Internal clock never stabilised.\n", ++ mmc_hostname(host->mmc)); ++ return; + } + + clk |= SDHCI_CLOCK_CARD_EN; +@@ -114,6 +109,7 @@ static void sdhci_at91_reset(struct sdhci_host *host, u8 mask) + { + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); ++ unsigned int tmp; + + sdhci_reset(host, mask); + +@@ -126,6 +122,10 @@ static void sdhci_at91_reset(struct sdhci_host *host, u8 mask) + + sdhci_writel(host, calcr | SDMMC_CALCR_ALWYSON | SDMMC_CALCR_EN, + SDMMC_CALCR); ++ ++ if (read_poll_timeout(sdhci_readl, tmp, !(tmp & SDMMC_CALCR_EN), ++ 10, 20000, false, host, SDMMC_CALCR)) ++ dev_err(mmc_dev(host->mmc), "Failed to calibrate\n"); + } + } + +diff --git a/drivers/net/ethernet/google/gve/gve.h b/drivers/net/ethernet/google/gve/gve.h +index f5c80229ea966..cfb174624d4ee 100644 +--- a/drivers/net/ethernet/google/gve/gve.h ++++ b/drivers/net/ethernet/google/gve/gve.h +@@ -472,7 +472,7 @@ struct gve_queue_page_list *gve_assign_rx_qpl(struct gve_priv *priv) + gve_num_tx_qpls(priv)); + + /* we are out of rx qpls */ +- if (id == priv->qpl_cfg.qpl_map_size) ++ if (id == gve_num_tx_qpls(priv) + gve_num_rx_qpls(priv)) + return NULL; + + set_bit(id, priv->qpl_cfg.qpl_id_map); +diff --git a/drivers/net/ethernet/google/gve/gve_main.c b/drivers/net/ethernet/google/gve/gve_main.c +index 0b714b606ba19..fd52218f48846 100644 +--- a/drivers/net/ethernet/google/gve/gve_main.c ++++ b/drivers/net/ethernet/google/gve/gve_main.c +@@ -30,6 +30,7 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s) + { + struct gve_priv *priv = netdev_priv(dev); + unsigned int start; ++ u64 packets, bytes; + int ring; + + if (priv->rx) { +@@ -37,10 +38,12 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s) + do { + start = + u64_stats_fetch_begin(&priv->rx[ring].statss); +- s->rx_packets += priv->rx[ring].rpackets; +- s->rx_bytes += priv->rx[ring].rbytes; ++ packets = priv->rx[ring].rpackets; ++ bytes = priv->rx[ring].rbytes; + } while (u64_stats_fetch_retry(&priv->rx[ring].statss, + start)); ++ s->rx_packets += packets; ++ s->rx_bytes += bytes; + } + } + if (priv->tx) { +@@ -48,10 +51,12 @@ static void gve_get_stats(struct net_device *dev, struct rtnl_link_stats64 *s) + do { + start = + u64_stats_fetch_begin(&priv->tx[ring].statss); +- s->tx_packets += priv->tx[ring].pkt_done; +- s->tx_bytes += priv->tx[ring].bytes_done; ++ packets = priv->tx[ring].pkt_done; ++ bytes = priv->tx[ring].bytes_done; + } while (u64_stats_fetch_retry(&priv->tx[ring].statss, + start)); ++ s->tx_packets += packets; ++ s->tx_bytes += bytes; + } + } + } +@@ -71,6 +76,9 @@ static int gve_alloc_counter_array(struct gve_priv *priv) + + static void gve_free_counter_array(struct gve_priv *priv) + { ++ if (!priv->counter_array) ++ return; ++ + dma_free_coherent(&priv->pdev->dev, + priv->num_event_counters * + sizeof(*priv->counter_array), +@@ -131,6 +139,9 @@ static int gve_alloc_stats_report(struct gve_priv *priv) + + static void gve_free_stats_report(struct gve_priv *priv) + { ++ if (!priv->stats_report) ++ return; ++ + del_timer_sync(&priv->stats_report_timer); + dma_free_coherent(&priv->pdev->dev, priv->stats_report_len, + priv->stats_report, priv->stats_report_bus); +@@ -301,18 +312,19 @@ static void gve_free_notify_blocks(struct gve_priv *priv) + { + int i; + +- if (priv->msix_vectors) { +- /* Free the irqs */ +- for (i = 0; i < priv->num_ntfy_blks; i++) { +- struct gve_notify_block *block = &priv->ntfy_blocks[i]; +- int msix_idx = i; ++ if (!priv->msix_vectors) ++ return; + +- irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector, +- NULL); +- free_irq(priv->msix_vectors[msix_idx].vector, block); +- } +- free_irq(priv->msix_vectors[priv->mgmt_msix_idx].vector, priv); ++ /* Free the irqs */ ++ for (i = 0; i < priv->num_ntfy_blks; i++) { ++ struct gve_notify_block *block = &priv->ntfy_blocks[i]; ++ int msix_idx = i; ++ ++ irq_set_affinity_hint(priv->msix_vectors[msix_idx].vector, ++ NULL); ++ free_irq(priv->msix_vectors[msix_idx].vector, block); + } ++ free_irq(priv->msix_vectors[priv->mgmt_msix_idx].vector, priv); + dma_free_coherent(&priv->pdev->dev, + priv->num_ntfy_blks * sizeof(*priv->ntfy_blocks), + priv->ntfy_blocks, priv->ntfy_block_bus); +@@ -975,9 +987,10 @@ static void gve_handle_reset(struct gve_priv *priv) + + void gve_handle_report_stats(struct gve_priv *priv) + { +- int idx, stats_idx = 0, tx_bytes; +- unsigned int start = 0; + struct stats *stats = priv->stats_report->stats; ++ int idx, stats_idx = 0; ++ unsigned int start = 0; ++ u64 tx_bytes; + + if (!gve_get_report_stats(priv)) + return; +diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c +index bc648ce0743c7..52c2d6fdeb7a0 100644 +--- a/drivers/net/ethernet/intel/i40e/i40e_main.c ++++ b/drivers/net/ethernet/intel/i40e/i40e_main.c +@@ -4839,7 +4839,8 @@ static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) + { + int i; + +- i40e_free_misc_vector(pf); ++ if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) ++ i40e_free_misc_vector(pf); + + i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector, + I40E_IWARP_IRQ_PILE_ID); +@@ -9662,7 +9663,7 @@ static int i40e_get_capabilities(struct i40e_pf *pf, + if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { + /* retry with a larger buffer */ + buf_len = data_size; +- } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { ++ } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) { + dev_info(&pf->pdev->dev, + "capability discovery failed, err %s aq_err %s\n", + i40e_stat_str(&pf->hw, err), +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +index f327b78261ec4..117a593414537 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +@@ -999,14 +999,9 @@ static inline void mlx5e_handle_csum(struct net_device *netdev, + goto csum_unnecessary; + + if (likely(is_last_ethertype_ip(skb, &network_depth, &proto))) { +- u8 ipproto = get_ip_proto(skb, network_depth, proto); +- +- if (unlikely(ipproto == IPPROTO_SCTP)) ++ if (unlikely(get_ip_proto(skb, network_depth, proto) == IPPROTO_SCTP)) + goto csum_unnecessary; + +- if (unlikely(mlx5_ipsec_is_rx_flow(cqe))) +- goto csum_none; +- + stats->csum_complete++; + skb->ip_summed = CHECKSUM_COMPLETE; + skb->csum = csum_unfold((__force __sum16)cqe->check_sum); +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c +index 3e19b1721303f..b00c7d47833f3 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/egress_lgcy.c +@@ -79,12 +79,16 @@ int esw_acl_egress_lgcy_setup(struct mlx5_eswitch *esw, + int dest_num = 0; + int err = 0; + +- if (MLX5_CAP_ESW_EGRESS_ACL(esw->dev, flow_counter)) { ++ if (vport->egress.legacy.drop_counter) { ++ drop_counter = vport->egress.legacy.drop_counter; ++ } else if (MLX5_CAP_ESW_EGRESS_ACL(esw->dev, flow_counter)) { + drop_counter = mlx5_fc_create(esw->dev, false); +- if (IS_ERR(drop_counter)) ++ if (IS_ERR(drop_counter)) { + esw_warn(esw->dev, + "vport[%d] configure egress drop rule counter err(%ld)\n", + vport->vport, PTR_ERR(drop_counter)); ++ drop_counter = NULL; ++ } + vport->egress.legacy.drop_counter = drop_counter; + } + +@@ -123,7 +127,7 @@ int esw_acl_egress_lgcy_setup(struct mlx5_eswitch *esw, + flow_act.action = MLX5_FLOW_CONTEXT_ACTION_DROP; + + /* Attach egress drop flow counter */ +- if (!IS_ERR_OR_NULL(drop_counter)) { ++ if (drop_counter) { + flow_act.action |= MLX5_FLOW_CONTEXT_ACTION_COUNT; + drop_ctr_dst.type = MLX5_FLOW_DESTINATION_TYPE_COUNTER; + drop_ctr_dst.counter_id = mlx5_fc_id(drop_counter); +@@ -162,7 +166,7 @@ void esw_acl_egress_lgcy_cleanup(struct mlx5_eswitch *esw, + esw_acl_egress_table_destroy(vport); + + clean_drop_counter: +- if (!IS_ERR_OR_NULL(vport->egress.legacy.drop_counter)) { ++ if (vport->egress.legacy.drop_counter) { + mlx5_fc_destroy(esw->dev, vport->egress.legacy.drop_counter); + vport->egress.legacy.drop_counter = NULL; + } +diff --git a/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c b/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c +index d64fad2823e73..45570d0a58d2f 100644 +--- a/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c ++++ b/drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c +@@ -160,7 +160,9 @@ int esw_acl_ingress_lgcy_setup(struct mlx5_eswitch *esw, + + esw_acl_ingress_lgcy_rules_destroy(vport); + +- if (MLX5_CAP_ESW_INGRESS_ACL(esw->dev, flow_counter)) { ++ if (vport->ingress.legacy.drop_counter) { ++ counter = vport->ingress.legacy.drop_counter; ++ } else if (MLX5_CAP_ESW_INGRESS_ACL(esw->dev, flow_counter)) { + counter = mlx5_fc_create(esw->dev, false); + if (IS_ERR(counter)) { + esw_warn(esw->dev, +diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c +index b848439fa837c..2645ca35103c9 100644 +--- a/drivers/net/phy/mdio_bus.c ++++ b/drivers/net/phy/mdio_bus.c +@@ -534,6 +534,13 @@ int __mdiobus_register(struct mii_bus *bus, struct module *owner) + bus->dev.groups = NULL; + dev_set_name(&bus->dev, "%s", bus->id); + ++ /* We need to set state to MDIOBUS_UNREGISTERED to correctly release ++ * the device in mdiobus_free() ++ * ++ * State will be updated later in this function in case of success ++ */ ++ bus->state = MDIOBUS_UNREGISTERED; ++ + err = device_register(&bus->dev); + if (err) { + pr_err("mii_bus %s failed to register\n", bus->id); +diff --git a/drivers/net/phy/sfp.c b/drivers/net/phy/sfp.c +index 2fff62695455d..32c34c728c7a1 100644 +--- a/drivers/net/phy/sfp.c ++++ b/drivers/net/phy/sfp.c +@@ -133,7 +133,7 @@ static const char * const sm_state_strings[] = { + [SFP_S_LINK_UP] = "link_up", + [SFP_S_TX_FAULT] = "tx_fault", + [SFP_S_REINIT] = "reinit", +- [SFP_S_TX_DISABLE] = "rx_disable", ++ [SFP_S_TX_DISABLE] = "tx_disable", + }; + + static const char *sm_state_to_str(unsigned short sm_state) +diff --git a/drivers/net/wireless/ath/ath5k/Kconfig b/drivers/net/wireless/ath/ath5k/Kconfig +index f35cd8de228e4..6914b37bb0fbc 100644 +--- a/drivers/net/wireless/ath/ath5k/Kconfig ++++ b/drivers/net/wireless/ath/ath5k/Kconfig +@@ -3,9 +3,7 @@ config ATH5K + tristate "Atheros 5xxx wireless cards support" + depends on (PCI || ATH25) && MAC80211 + select ATH_COMMON +- select MAC80211_LEDS +- select LEDS_CLASS +- select NEW_LEDS ++ select MAC80211_LEDS if LEDS_CLASS=y || LEDS_CLASS=MAC80211 + select ATH5K_AHB if ATH25 + select ATH5K_PCI if !ATH25 + help +diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c +index 6a2a168567630..33e9928af3635 100644 +--- a/drivers/net/wireless/ath/ath5k/led.c ++++ b/drivers/net/wireless/ath/ath5k/led.c +@@ -89,7 +89,8 @@ static const struct pci_device_id ath5k_led_devices[] = { + + void ath5k_led_enable(struct ath5k_hw *ah) + { +- if (test_bit(ATH_STAT_LEDSOFT, ah->status)) { ++ if (IS_ENABLED(CONFIG_MAC80211_LEDS) && ++ test_bit(ATH_STAT_LEDSOFT, ah->status)) { + ath5k_hw_set_gpio_output(ah, ah->led_pin); + ath5k_led_off(ah); + } +@@ -104,7 +105,8 @@ static void ath5k_led_on(struct ath5k_hw *ah) + + void ath5k_led_off(struct ath5k_hw *ah) + { +- if (!test_bit(ATH_STAT_LEDSOFT, ah->status)) ++ if (!IS_ENABLED(CONFIG_MAC80211_LEDS) || ++ !test_bit(ATH_STAT_LEDSOFT, ah->status)) + return; + ath5k_hw_set_gpio(ah, ah->led_pin, !ah->led_on); + } +@@ -146,7 +148,7 @@ ath5k_register_led(struct ath5k_hw *ah, struct ath5k_led *led, + static void + ath5k_unregister_led(struct ath5k_led *led) + { +- if (!led->ah) ++ if (!IS_ENABLED(CONFIG_MAC80211_LEDS) || !led->ah) + return; + led_classdev_unregister(&led->led_dev); + ath5k_led_off(led->ah); +@@ -169,7 +171,7 @@ int ath5k_init_leds(struct ath5k_hw *ah) + char name[ATH5K_LED_MAX_NAME_LEN + 1]; + const struct pci_device_id *match; + +- if (!ah->pdev) ++ if (!IS_ENABLED(CONFIG_MAC80211_LEDS) || !ah->pdev) + return 0; + + #ifdef CONFIG_ATH5K_AHB +diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c +index 90b12e201795c..4e43efd5d1ea1 100644 +--- a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c ++++ b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c +@@ -635,6 +635,8 @@ static const struct iwl_dev_info iwl_dev_info_table[] = { + IWL_DEV_INFO(0x43F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x43F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x43F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL), ++ IWL_DEV_INFO(0x43F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650s_name), ++ IWL_DEV_INFO(0x43F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650i_name), + IWL_DEV_INFO(0x43F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x43F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL), +diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c +index 44e15f0e3a2ed..ad3e3cde1c20d 100644 +--- a/drivers/pci/controller/pci-hyperv.c ++++ b/drivers/pci/controller/pci-hyperv.c +@@ -3259,9 +3259,17 @@ static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs) + return 0; + + if (!keep_devs) { +- /* Delete any children which might still exist. */ ++ struct list_head removed; ++ ++ /* Move all present children to the list on stack */ ++ INIT_LIST_HEAD(&removed); + spin_lock_irqsave(&hbus->device_list_lock, flags); +- list_for_each_entry_safe(hpdev, tmp, &hbus->children, list_entry) { ++ list_for_each_entry_safe(hpdev, tmp, &hbus->children, list_entry) ++ list_move_tail(&hpdev->list_entry, &removed); ++ spin_unlock_irqrestore(&hbus->device_list_lock, flags); ++ ++ /* Remove all children in the list */ ++ list_for_each_entry_safe(hpdev, tmp, &removed, list_entry) { + list_del(&hpdev->list_entry); + if (hpdev->pci_slot) + pci_destroy_slot(hpdev->pci_slot); +@@ -3269,7 +3277,6 @@ static int hv_pci_bus_exit(struct hv_device *hdev, bool keep_devs) + put_pcichild(hpdev); + put_pcichild(hpdev); + } +- spin_unlock_irqrestore(&hbus->device_list_lock, flags); + } + + ret = hv_send_resources_released(hdev); +diff --git a/drivers/ptp/ptp_pch.c b/drivers/ptp/ptp_pch.c +index ce10ecd41ba0f..9492ed09518ff 100644 +--- a/drivers/ptp/ptp_pch.c ++++ b/drivers/ptp/ptp_pch.c +@@ -651,6 +651,7 @@ static const struct pci_device_id pch_ieee1588_pcidev_id[] = { + }, + {0} + }; ++MODULE_DEVICE_TABLE(pci, pch_ieee1588_pcidev_id); + + static SIMPLE_DEV_PM_OPS(pch_pm_ops, pch_suspend, pch_resume); + +diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c +index eba7f76f9d61a..6034cd8992b0e 100644 +--- a/drivers/soc/qcom/mdt_loader.c ++++ b/drivers/soc/qcom/mdt_loader.c +@@ -98,7 +98,7 @@ void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len) + if (ehdr->e_phnum < 2) + return ERR_PTR(-EINVAL); + +- if (phdrs[0].p_type == PT_LOAD || phdrs[1].p_type == PT_LOAD) ++ if (phdrs[0].p_type == PT_LOAD) + return ERR_PTR(-EINVAL); + + if ((phdrs[1].p_flags & QCOM_MDT_TYPE_MASK) != QCOM_MDT_TYPE_HASH) +diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c +index e0620416e5743..60c82dcaa8d1d 100644 +--- a/drivers/soc/qcom/socinfo.c ++++ b/drivers/soc/qcom/socinfo.c +@@ -521,7 +521,7 @@ static int qcom_socinfo_probe(struct platform_device *pdev) + /* Feed the soc specific unique data into entropy pool */ + add_device_randomness(info, item_size); + +- platform_set_drvdata(pdev, qs->soc_dev); ++ platform_set_drvdata(pdev, qs); + + return 0; + } +diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c +index fb067b5e4a977..4a782bfd753c3 100644 +--- a/drivers/soc/ti/omap_prm.c ++++ b/drivers/soc/ti/omap_prm.c +@@ -509,25 +509,28 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev, + writel_relaxed(v, reset->prm->base + reset->prm->data->rstctrl); + spin_unlock_irqrestore(&reset->lock, flags); + +- if (!has_rstst) +- goto exit; ++ /* wait for the reset bit to clear */ ++ ret = readl_relaxed_poll_timeout_atomic(reset->prm->base + ++ reset->prm->data->rstctrl, ++ v, !(v & BIT(id)), 1, ++ OMAP_RESET_MAX_WAIT); ++ if (ret) ++ pr_err("%s: timedout waiting for %s:%lu\n", __func__, ++ reset->prm->data->name, id); + + /* wait for the status to be set */ +- ret = readl_relaxed_poll_timeout_atomic(reset->prm->base + ++ if (has_rstst) { ++ ret = readl_relaxed_poll_timeout_atomic(reset->prm->base + + reset->prm->data->rstst, + v, v & BIT(st_bit), 1, + OMAP_RESET_MAX_WAIT); +- if (ret) +- pr_err("%s: timedout waiting for %s:%lu\n", __func__, +- reset->prm->data->name, id); ++ if (ret) ++ pr_err("%s: timedout waiting for %s:%lu\n", __func__, ++ reset->prm->data->name, id); ++ } + +-exit: +- if (reset->clkdm) { +- /* At least dra7 iva needs a delay before clkdm idle */ +- if (has_rstst) +- udelay(1); ++ if (reset->clkdm) + pdata->clkdm_allow_idle(reset->clkdm); +- } + + return ret; + } +diff --git a/drivers/usb/chipidea/ci_hdrc_imx.c b/drivers/usb/chipidea/ci_hdrc_imx.c +index ee565bdb44d65..b4c6527fe5f66 100644 +--- a/drivers/usb/chipidea/ci_hdrc_imx.c ++++ b/drivers/usb/chipidea/ci_hdrc_imx.c +@@ -425,11 +425,16 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev) + data->phy = devm_usb_get_phy_by_phandle(dev, "fsl,usbphy", 0); + if (IS_ERR(data->phy)) { + ret = PTR_ERR(data->phy); +- /* Return -EINVAL if no usbphy is available */ +- if (ret == -ENODEV) +- data->phy = NULL; +- else +- goto err_clk; ++ if (ret == -ENODEV) { ++ data->phy = devm_usb_get_phy_by_phandle(dev, "phys", 0); ++ if (IS_ERR(data->phy)) { ++ ret = PTR_ERR(data->phy); ++ if (ret == -ENODEV) ++ data->phy = NULL; ++ else ++ goto err_clk; ++ } ++ } + } + + pdata.usb_phy = data->phy; +diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c +index 7748b1335558e..7950d5b3af429 100644 +--- a/drivers/usb/class/cdc-acm.c ++++ b/drivers/usb/class/cdc-acm.c +@@ -340,6 +340,9 @@ static void acm_process_notification(struct acm *acm, unsigned char *buf) + acm->iocount.overrun++; + spin_unlock_irqrestore(&acm->read_lock, flags); + ++ if (newctrl & ACM_CTRL_BRK) ++ tty_flip_buffer_push(&acm->port); ++ + if (difference) + wake_up_all(&acm->wioctl); + +@@ -475,11 +478,16 @@ static int acm_submit_read_urbs(struct acm *acm, gfp_t mem_flags) + + static void acm_process_read_urb(struct acm *acm, struct urb *urb) + { ++ unsigned long flags; ++ + if (!urb->actual_length) + return; + ++ spin_lock_irqsave(&acm->read_lock, flags); + tty_insert_flip_string(&acm->port, urb->transfer_buffer, + urb->actual_length); ++ spin_unlock_irqrestore(&acm->read_lock, flags); ++ + tty_flip_buffer_push(&acm->port); + } + +diff --git a/drivers/usb/common/Kconfig b/drivers/usb/common/Kconfig +index 5e8a04e3dd3c8..b856622431a73 100644 +--- a/drivers/usb/common/Kconfig ++++ b/drivers/usb/common/Kconfig +@@ -6,8 +6,7 @@ config USB_COMMON + + config USB_LED_TRIG + bool "USB LED Triggers" +- depends on LEDS_CLASS && LEDS_TRIGGERS +- select USB_COMMON ++ depends on LEDS_CLASS && USB_COMMON && LEDS_TRIGGERS + help + This option adds LED triggers for USB host and/or gadget activity. + +diff --git a/drivers/usb/typec/tcpm/tcpm.c b/drivers/usb/typec/tcpm/tcpm.c +index 0b08dd3b19eb0..291d020427924 100644 +--- a/drivers/usb/typec/tcpm/tcpm.c ++++ b/drivers/usb/typec/tcpm/tcpm.c +@@ -3922,6 +3922,7 @@ static void _tcpm_cc_change(struct tcpm_port *port, enum typec_cc_status cc1, + tcpm_set_state(port, SRC_ATTACH_WAIT, 0); + break; + case SRC_ATTACHED: ++ case SRC_STARTUP: + case SRC_SEND_CAPABILITIES: + case SRC_READY: + if (tcpm_port_is_disconnected(port) || +diff --git a/drivers/video/fbdev/gbefb.c b/drivers/video/fbdev/gbefb.c +index 31270a8986e8e..8f8ca1f88fe21 100644 +--- a/drivers/video/fbdev/gbefb.c ++++ b/drivers/video/fbdev/gbefb.c +@@ -1269,7 +1269,7 @@ static struct platform_device *gbefb_device; + static int __init gbefb_init(void) + { + int ret = platform_driver_register(&gbefb_driver); +- if (!ret) { ++ if (IS_ENABLED(CONFIG_SGI_IP32) && !ret) { + gbefb_device = platform_device_alloc("gbefb", 0); + if (gbefb_device) { + ret = platform_device_add(gbefb_device); +diff --git a/drivers/xen/balloon.c b/drivers/xen/balloon.c +index 15d4b1ef19f83..1911a62a6d9c1 100644 +--- a/drivers/xen/balloon.c ++++ b/drivers/xen/balloon.c +@@ -491,12 +491,12 @@ static enum bp_state decrease_reservation(unsigned long nr_pages, gfp_t gfp) + } + + /* +- * Stop waiting if either state is not BP_EAGAIN and ballooning action is +- * needed, or if the credit has changed while state is BP_EAGAIN. ++ * Stop waiting if either state is BP_DONE and ballooning action is ++ * needed, or if the credit has changed while state is not BP_DONE. + */ + static bool balloon_thread_cond(enum bp_state state, long credit) + { +- if (state != BP_EAGAIN) ++ if (state == BP_DONE) + credit = 0; + + return current_credit() != credit || kthread_should_stop(); +@@ -516,10 +516,19 @@ static int balloon_thread(void *unused) + + set_freezable(); + for (;;) { +- if (state == BP_EAGAIN) +- timeout = balloon_stats.schedule_delay * HZ; +- else ++ switch (state) { ++ case BP_DONE: ++ case BP_ECANCELED: + timeout = 3600 * HZ; ++ break; ++ case BP_EAGAIN: ++ timeout = balloon_stats.schedule_delay * HZ; ++ break; ++ case BP_WAIT: ++ timeout = HZ; ++ break; ++ } ++ + credit = current_credit(); + + wait_event_freezable_timeout(balloon_thread_wq, +diff --git a/drivers/xen/privcmd.c b/drivers/xen/privcmd.c +index 720a7b7abd46d..fe8df32bb612b 100644 +--- a/drivers/xen/privcmd.c ++++ b/drivers/xen/privcmd.c +@@ -803,11 +803,12 @@ static long privcmd_ioctl_mmap_resource(struct file *file, + unsigned int domid = + (xdata.flags & XENMEM_rsrc_acq_caller_owned) ? + DOMID_SELF : kdata.dom; +- int num; ++ int num, *errs = (int *)pfns; + ++ BUILD_BUG_ON(sizeof(*errs) > sizeof(*pfns)); + num = xen_remap_domain_mfn_array(vma, + kdata.addr & PAGE_MASK, +- pfns, kdata.num, (int *)pfns, ++ pfns, kdata.num, errs, + vma->vm_page_prot, + domid, + vma->vm_private_data); +@@ -817,7 +818,7 @@ static long privcmd_ioctl_mmap_resource(struct file *file, + unsigned int i; + + for (i = 0; i < num; i++) { +- rc = pfns[i]; ++ rc = errs[i]; + if (rc < 0) + break; + } +diff --git a/fs/nfsd/nfs4xdr.c b/fs/nfsd/nfs4xdr.c +index 5f5169b9c2e90..46f825cf53f4f 100644 +--- a/fs/nfsd/nfs4xdr.c ++++ b/fs/nfsd/nfs4xdr.c +@@ -3427,15 +3427,18 @@ nfsd4_encode_dirent(void *ccdv, const char *name, int namlen, + goto fail; + cd->rd_maxcount -= entry_bytes; + /* +- * RFC 3530 14.2.24 describes rd_dircount as only a "hint", so +- * let's always let through the first entry, at least: ++ * RFC 3530 14.2.24 describes rd_dircount as only a "hint", and ++ * notes that it could be zero. If it is zero, then the server ++ * should enforce only the rd_maxcount value. + */ +- if (!cd->rd_dircount) +- goto fail; +- name_and_cookie = 4 + 4 * XDR_QUADLEN(namlen) + 8; +- if (name_and_cookie > cd->rd_dircount && cd->cookie_offset) +- goto fail; +- cd->rd_dircount -= min(cd->rd_dircount, name_and_cookie); ++ if (cd->rd_dircount) { ++ name_and_cookie = 4 + 4 * XDR_QUADLEN(namlen) + 8; ++ if (name_and_cookie > cd->rd_dircount && cd->cookie_offset) ++ goto fail; ++ cd->rd_dircount -= min(cd->rd_dircount, name_and_cookie); ++ if (!cd->rd_dircount) ++ cd->rd_maxcount = 0; ++ } + + cd->cookie_offset = cookie_offset; + skip_entry: +diff --git a/fs/nfsd/nfsctl.c b/fs/nfsd/nfsctl.c +index 0759e589ab52b..ddf2b375632b7 100644 +--- a/fs/nfsd/nfsctl.c ++++ b/fs/nfsd/nfsctl.c +@@ -1547,7 +1547,7 @@ static int __init init_nfsd(void) + goto out_free_all; + return 0; + out_free_all: +- unregister_pernet_subsys(&nfsd_net_ops); ++ unregister_filesystem(&nfsd_fs_type); + out_free_exports: + remove_proc_entry("fs/nfs/exports", NULL); + remove_proc_entry("fs/nfs", NULL); +diff --git a/fs/overlayfs/dir.c b/fs/overlayfs/dir.c +index 08b595c526d74..16955a307dcd9 100644 +--- a/fs/overlayfs/dir.c ++++ b/fs/overlayfs/dir.c +@@ -1214,9 +1214,13 @@ static int ovl_rename(struct inode *olddir, struct dentry *old, + goto out_dput; + } + } else { +- if (!d_is_negative(newdentry) && +- (!new_opaque || !ovl_is_whiteout(newdentry))) +- goto out_dput; ++ if (!d_is_negative(newdentry)) { ++ if (!new_opaque || !ovl_is_whiteout(newdentry)) ++ goto out_dput; ++ } else { ++ if (flags & RENAME_EXCHANGE) ++ goto out_dput; ++ } + } + + if (olddentry == trap) +diff --git a/fs/overlayfs/file.c b/fs/overlayfs/file.c +index 5c5c3972ebd0a..f7135777cb4eb 100644 +--- a/fs/overlayfs/file.c ++++ b/fs/overlayfs/file.c +@@ -301,6 +301,12 @@ static ssize_t ovl_read_iter(struct kiocb *iocb, struct iov_iter *iter) + if (ret) + return ret; + ++ ret = -EINVAL; ++ if (iocb->ki_flags & IOCB_DIRECT && ++ (!real.file->f_mapping->a_ops || ++ !real.file->f_mapping->a_ops->direct_IO)) ++ goto out_fdput; ++ + old_cred = ovl_override_creds(file_inode(file)->i_sb); + if (is_sync_kiocb(iocb)) { + ret = vfs_iter_read(real.file, iter, &iocb->ki_pos, +@@ -325,7 +331,7 @@ static ssize_t ovl_read_iter(struct kiocb *iocb, struct iov_iter *iter) + out: + revert_creds(old_cred); + ovl_file_accessed(file); +- ++out_fdput: + fdput(real); + + return ret; +@@ -354,6 +360,12 @@ static ssize_t ovl_write_iter(struct kiocb *iocb, struct iov_iter *iter) + if (ret) + goto out_unlock; + ++ ret = -EINVAL; ++ if (iocb->ki_flags & IOCB_DIRECT && ++ (!real.file->f_mapping->a_ops || ++ !real.file->f_mapping->a_ops->direct_IO)) ++ goto out_fdput; ++ + if (!ovl_should_sync(OVL_FS(inode->i_sb))) + ifl &= ~(IOCB_DSYNC | IOCB_SYNC); + +@@ -389,6 +401,7 @@ static ssize_t ovl_write_iter(struct kiocb *iocb, struct iov_iter *iter) + } + out: + revert_creds(old_cred); ++out_fdput: + fdput(real); + + out_unlock: +diff --git a/kernel/bpf/stackmap.c b/kernel/bpf/stackmap.c +index ebf60848d5eb7..4477873ac3a0b 100644 +--- a/kernel/bpf/stackmap.c ++++ b/kernel/bpf/stackmap.c +@@ -64,7 +64,8 @@ static inline int stack_map_data_size(struct bpf_map *map) + + static int prealloc_elems_and_freelist(struct bpf_stack_map *smap) + { +- u32 elem_size = sizeof(struct stack_map_bucket) + smap->map.value_size; ++ u64 elem_size = sizeof(struct stack_map_bucket) + ++ (u64)smap->map.value_size; + int err; + + smap->elems = bpf_map_area_alloc(elem_size * smap->map.max_entries, +diff --git a/net/bridge/br_netlink.c b/net/bridge/br_netlink.c +index 73f71c22f4c03..31b00ba5dcc84 100644 +--- a/net/bridge/br_netlink.c ++++ b/net/bridge/br_netlink.c +@@ -1590,7 +1590,8 @@ static size_t br_get_linkxstats_size(const struct net_device *dev, int attr) + } + + return numvls * nla_total_size(sizeof(struct bridge_vlan_xstats)) + +- nla_total_size(sizeof(struct br_mcast_stats)) + ++ nla_total_size_64bit(sizeof(struct br_mcast_stats)) + ++ (p ? nla_total_size_64bit(sizeof(p->stp_xstats)) : 0) + + nla_total_size(0); + } + +diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c +index 7266571d5c7e2..27ffa83ffeb3c 100644 +--- a/net/core/rtnetlink.c ++++ b/net/core/rtnetlink.c +@@ -5257,7 +5257,7 @@ nla_put_failure: + static size_t if_nlmsg_stats_size(const struct net_device *dev, + u32 filter_mask) + { +- size_t size = 0; ++ size_t size = NLMSG_ALIGN(sizeof(struct if_stats_msg)); + + if (stats_attr_valid(filter_mask, IFLA_STATS_LINK_64, 0)) + size += nla_total_size_64bit(sizeof(struct rtnl_link_stats64)); +diff --git a/net/ipv4/inet_hashtables.c b/net/ipv4/inet_hashtables.c +index 45fb450b45227..f3fd5c911ed09 100644 +--- a/net/ipv4/inet_hashtables.c ++++ b/net/ipv4/inet_hashtables.c +@@ -242,8 +242,10 @@ static inline int compute_score(struct sock *sk, struct net *net, + + if (!inet_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif)) + return -1; ++ score = sk->sk_bound_dev_if ? 2 : 1; + +- score = sk->sk_family == PF_INET ? 2 : 1; ++ if (sk->sk_family == PF_INET) ++ score++; + if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id()) + score++; + } +diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c +index bd7fd9b1f24c8..655f0d8a13d36 100644 +--- a/net/ipv4/udp.c ++++ b/net/ipv4/udp.c +@@ -390,7 +390,8 @@ static int compute_score(struct sock *sk, struct net *net, + dif, sdif); + if (!dev_match) + return -1; +- score += 4; ++ if (sk->sk_bound_dev_if) ++ score += 4; + + if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id()) + score++; +diff --git a/net/ipv6/inet6_hashtables.c b/net/ipv6/inet6_hashtables.c +index 55c290d556059..67c9114835c84 100644 +--- a/net/ipv6/inet6_hashtables.c ++++ b/net/ipv6/inet6_hashtables.c +@@ -106,7 +106,7 @@ static inline int compute_score(struct sock *sk, struct net *net, + if (!inet_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif)) + return -1; + +- score = 1; ++ score = sk->sk_bound_dev_if ? 2 : 1; + if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id()) + score++; + } +diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c +index 1943ae5103eb6..bae6b51a9bd46 100644 +--- a/net/ipv6/udp.c ++++ b/net/ipv6/udp.c +@@ -133,7 +133,8 @@ static int compute_score(struct sock *sk, struct net *net, + dev_match = udp_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif); + if (!dev_match) + return -1; +- score++; ++ if (sk->sk_bound_dev_if) ++ score++; + + if (READ_ONCE(sk->sk_incoming_cpu) == raw_smp_processor_id()) + score++; +diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c +index 8434da3c0487a..0886267ea81ef 100644 +--- a/net/netlink/af_netlink.c ++++ b/net/netlink/af_netlink.c +@@ -586,7 +586,10 @@ static int netlink_insert(struct sock *sk, u32 portid) + + /* We need to ensure that the socket is hashed and visible. */ + smp_wmb(); +- nlk_sk(sk)->bound = portid; ++ /* Paired with lockless reads from netlink_bind(), ++ * netlink_connect() and netlink_sendmsg(). ++ */ ++ WRITE_ONCE(nlk_sk(sk)->bound, portid); + + err: + release_sock(sk); +@@ -1004,7 +1007,8 @@ static int netlink_bind(struct socket *sock, struct sockaddr *addr, + if (nlk->ngroups < BITS_PER_LONG) + groups &= (1UL << nlk->ngroups) - 1; + +- bound = nlk->bound; ++ /* Paired with WRITE_ONCE() in netlink_insert() */ ++ bound = READ_ONCE(nlk->bound); + if (bound) { + /* Ensure nlk->portid is up-to-date. */ + smp_rmb(); +@@ -1090,8 +1094,9 @@ static int netlink_connect(struct socket *sock, struct sockaddr *addr, + + /* No need for barriers here as we return to user-space without + * using any of the bound attributes. ++ * Paired with WRITE_ONCE() in netlink_insert(). + */ +- if (!nlk->bound) ++ if (!READ_ONCE(nlk->bound)) + err = netlink_autobind(sock); + + if (err == 0) { +@@ -1880,7 +1885,8 @@ static int netlink_sendmsg(struct socket *sock, struct msghdr *msg, size_t len) + dst_group = nlk->dst_group; + } + +- if (!nlk->bound) { ++ /* Paired with WRITE_ONCE() in netlink_insert() */ ++ if (!READ_ONCE(nlk->bound)) { + err = netlink_autobind(sock); + if (err) + goto out; +diff --git a/net/sched/sch_fifo.c b/net/sched/sch_fifo.c +index a579a4131d22d..e1040421b7979 100644 +--- a/net/sched/sch_fifo.c ++++ b/net/sched/sch_fifo.c +@@ -233,6 +233,9 @@ int fifo_set_limit(struct Qdisc *q, unsigned int limit) + if (strncmp(q->ops->id + 1, "fifo", 4) != 0) + return 0; + ++ if (!q->ops->change) ++ return 0; ++ + nla = kmalloc(nla_attr_size(sizeof(struct tc_fifo_qopt)), GFP_KERNEL); + if (nla) { + nla->nla_type = RTM_NEWQDISC; +diff --git a/net/sched/sch_taprio.c b/net/sched/sch_taprio.c +index cb5e5220da552..93899559ba6d2 100644 +--- a/net/sched/sch_taprio.c ++++ b/net/sched/sch_taprio.c +@@ -1630,6 +1630,10 @@ static void taprio_destroy(struct Qdisc *sch) + list_del(&q->taprio_list); + spin_unlock(&taprio_list_lock); + ++ /* Note that taprio_reset() might not be called if an error ++ * happens in qdisc_create(), after taprio_init() has been called. ++ */ ++ hrtimer_cancel(&q->advance_timer); + + taprio_disable_offload(dev, q, NULL); + +diff --git a/net/sunrpc/auth_gss/svcauth_gss.c b/net/sunrpc/auth_gss/svcauth_gss.c +index e22f2d65457da..f5111d62972d3 100644 +--- a/net/sunrpc/auth_gss/svcauth_gss.c ++++ b/net/sunrpc/auth_gss/svcauth_gss.c +@@ -643,7 +643,7 @@ static bool gss_check_seq_num(const struct svc_rqst *rqstp, struct rsc *rsci, + } + __set_bit(seq_num % GSS_SEQ_WIN, sd->sd_win); + goto ok; +- } else if (seq_num <= sd->sd_max - GSS_SEQ_WIN) { ++ } else if (seq_num + GSS_SEQ_WIN <= sd->sd_max) { + goto toolow; + } + if (__test_and_set_bit(seq_num % GSS_SEQ_WIN, sd->sd_win)) +diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c +index dcfdf6a322dc4..c679a79aef513 100644 +--- a/tools/perf/pmu-events/jevents.c ++++ b/tools/perf/pmu-events/jevents.c +@@ -1100,12 +1100,13 @@ static int process_one_file(const char *fpath, const struct stat *sb, + */ + int main(int argc, char *argv[]) + { +- int rc, ret = 0; ++ int rc, ret = 0, empty_map = 0; + int maxfds; + char ldirname[PATH_MAX]; + const char *arch; + const char *output_file; + const char *start_dirname; ++ char *err_string_ext = ""; + struct stat stbuf; + + prog = basename(argv[0]); +@@ -1133,7 +1134,8 @@ int main(int argc, char *argv[]) + /* If architecture does not have any event lists, bail out */ + if (stat(ldirname, &stbuf) < 0) { + pr_info("%s: Arch %s has no PMU event lists\n", prog, arch); +- goto empty_map; ++ empty_map = 1; ++ goto err_close_eventsfp; + } + + /* Include pmu-events.h first */ +@@ -1150,75 +1152,60 @@ int main(int argc, char *argv[]) + */ + + maxfds = get_maxfds(); +- mapfile = NULL; + rc = nftw(ldirname, preprocess_arch_std_files, maxfds, 0); +- if (rc && verbose) { +- pr_info("%s: Error preprocessing arch standard files %s\n", +- prog, ldirname); +- goto empty_map; +- } else if (rc < 0) { +- /* Make build fail */ +- fclose(eventsfp); +- free_arch_std_events(); +- return 1; +- } else if (rc) { +- goto empty_map; +- } ++ if (rc) ++ goto err_processing_std_arch_event_dir; + + rc = nftw(ldirname, process_one_file, maxfds, 0); +- if (rc && verbose) { +- pr_info("%s: Error walking file tree %s\n", prog, ldirname); +- goto empty_map; +- } else if (rc < 0) { +- /* Make build fail */ +- fclose(eventsfp); +- free_arch_std_events(); +- ret = 1; +- goto out_free_mapfile; +- } else if (rc) { +- goto empty_map; +- } ++ if (rc) ++ goto err_processing_dir; + + sprintf(ldirname, "%s/test", start_dirname); + + rc = nftw(ldirname, process_one_file, maxfds, 0); +- if (rc && verbose) { +- pr_info("%s: Error walking file tree %s rc=%d for test\n", +- prog, ldirname, rc); +- goto empty_map; +- } else if (rc < 0) { +- /* Make build fail */ +- free_arch_std_events(); +- ret = 1; +- goto out_free_mapfile; +- } else if (rc) { +- goto empty_map; +- } ++ if (rc) ++ goto err_processing_dir; + + if (close_table) + print_events_table_suffix(eventsfp); + + if (!mapfile) { + pr_info("%s: No CPU->JSON mapping?\n", prog); +- goto empty_map; ++ empty_map = 1; ++ goto err_close_eventsfp; + } + +- if (process_mapfile(eventsfp, mapfile)) { ++ rc = process_mapfile(eventsfp, mapfile); ++ fclose(eventsfp); ++ if (rc) { + pr_info("%s: Error processing mapfile %s\n", prog, mapfile); + /* Make build fail */ +- fclose(eventsfp); +- free_arch_std_events(); + ret = 1; ++ goto err_out; + } + ++ free_arch_std_events(); ++ free(mapfile); ++ return 0; + +- goto out_free_mapfile; +- +-empty_map: ++err_processing_std_arch_event_dir: ++ err_string_ext = " for std arch event"; ++err_processing_dir: ++ if (verbose) { ++ pr_info("%s: Error walking file tree %s%s\n", prog, ldirname, ++ err_string_ext); ++ empty_map = 1; ++ } else if (rc < 0) { ++ ret = 1; ++ } else { ++ empty_map = 1; ++ } ++err_close_eventsfp: + fclose(eventsfp); +- create_empty_mapping(output_file); ++ if (empty_map) ++ create_empty_mapping(output_file); ++err_out: + free_arch_std_events(); +-out_free_mapfile: + free(mapfile); + return ret; + }
