commit: c006e3c68a07765a9f1aa4d9a1a6b3df0e0a417c Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Fri Jan 30 11:01:48 2015 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Fri Jan 30 11:01:48 2015 +0000 URL: http://sources.gentoo.org/gitweb/?p=proj/linux-patches.git;a=commit;h=c006e3c6
Linux patch 3.18.5 --- 0000_README | 4 + 1004_linux-3.18.5.patch | 3915 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 3919 insertions(+) diff --git a/0000_README b/0000_README index 52cb186..f8b4dcb 100644 --- a/0000_README +++ b/0000_README @@ -59,6 +59,10 @@ Patch: 1003_linux-3.18.4.patch From: http://www.kernel.org Desc: Linux 3.18.4 +Patch: 1004_linux-3.18.5.patch +From: http://www.kernel.org +Desc: Linux 3.18.5 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1004_linux-3.18.5.patch b/1004_linux-3.18.5.patch new file mode 100644 index 0000000..2a470c7 --- /dev/null +++ b/1004_linux-3.18.5.patch @@ -0,0 +1,3915 @@ +diff --git a/Makefile b/Makefile +index 4e9328491c1e..6276fcaabf21 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 18 +-SUBLEVEL = 4 ++SUBLEVEL = 5 + EXTRAVERSION = + NAME = Diseased Newt + +diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi +index d238676a9107..e4d3aecc4ed2 100644 +--- a/arch/arm/boot/dts/imx25.dtsi ++++ b/arch/arm/boot/dts/imx25.dtsi +@@ -369,7 +369,7 @@ + compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + #pwm-cells = <2>; + reg = <0x53fa0000 0x4000>; +- clocks = <&clks 106>, <&clks 36>; ++ clocks = <&clks 106>, <&clks 52>; + clock-names = "ipg", "per"; + interrupts = <36>; + }; +@@ -388,7 +388,7 @@ + compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + #pwm-cells = <2>; + reg = <0x53fa8000 0x4000>; +- clocks = <&clks 107>, <&clks 36>; ++ clocks = <&clks 107>, <&clks 52>; + clock-names = "ipg", "per"; + interrupts = <41>; + }; +@@ -429,7 +429,7 @@ + pwm4: pwm@53fc8000 { + compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + reg = <0x53fc8000 0x4000>; +- clocks = <&clks 108>, <&clks 36>; ++ clocks = <&clks 108>, <&clks 52>; + clock-names = "ipg", "per"; + interrupts = <42>; + }; +@@ -476,7 +476,7 @@ + compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + #pwm-cells = <2>; + reg = <0x53fe0000 0x4000>; +- clocks = <&clks 105>, <&clks 36>; ++ clocks = <&clks 105>, <&clks 52>; + clock-names = "ipg", "per"; + interrupts = <26>; + }; +diff --git a/arch/arm/crypto/aes_glue.c b/arch/arm/crypto/aes_glue.c +index 3003fa1f6fb4..0409b8f89782 100644 +--- a/arch/arm/crypto/aes_glue.c ++++ b/arch/arm/crypto/aes_glue.c +@@ -93,6 +93,6 @@ module_exit(aes_fini); + + MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm (ASM)"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("aes"); +-MODULE_ALIAS("aes-asm"); ++MODULE_ALIAS_CRYPTO("aes"); ++MODULE_ALIAS_CRYPTO("aes-asm"); + MODULE_AUTHOR("David McCullough <ucde...@gmail.com>"); +diff --git a/arch/arm/crypto/sha1_glue.c b/arch/arm/crypto/sha1_glue.c +index 84f2a756588b..e31b0440c613 100644 +--- a/arch/arm/crypto/sha1_glue.c ++++ b/arch/arm/crypto/sha1_glue.c +@@ -171,5 +171,5 @@ module_exit(sha1_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm (ARM)"); +-MODULE_ALIAS("sha1"); ++MODULE_ALIAS_CRYPTO("sha1"); + MODULE_AUTHOR("David McCullough <ucde...@gmail.com>"); +diff --git a/arch/arm/crypto/sha1_neon_glue.c b/arch/arm/crypto/sha1_neon_glue.c +index 6f1b411b1d55..0b0083757d47 100644 +--- a/arch/arm/crypto/sha1_neon_glue.c ++++ b/arch/arm/crypto/sha1_neon_glue.c +@@ -194,4 +194,4 @@ module_exit(sha1_neon_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, NEON accelerated"); +-MODULE_ALIAS("sha1"); ++MODULE_ALIAS_CRYPTO("sha1"); +diff --git a/arch/arm/crypto/sha512_neon_glue.c b/arch/arm/crypto/sha512_neon_glue.c +index 0d2758ff5e12..f3452c66059d 100644 +--- a/arch/arm/crypto/sha512_neon_glue.c ++++ b/arch/arm/crypto/sha512_neon_glue.c +@@ -301,5 +301,5 @@ module_exit(sha512_neon_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA512 Secure Hash Algorithm, NEON accelerated"); + +-MODULE_ALIAS("sha512"); +-MODULE_ALIAS("sha384"); ++MODULE_ALIAS_CRYPTO("sha512"); ++MODULE_ALIAS_CRYPTO("sha384"); +diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c +index c31f4c00b1fc..1163a3e9accd 100644 +--- a/arch/arm/mach-mvebu/coherency.c ++++ b/arch/arm/mach-mvebu/coherency.c +@@ -398,9 +398,14 @@ static int coherency_type(void) + return type; + } + ++/* ++ * As a precaution, we currently completely disable hardware I/O ++ * coherency, until enough testing is done with automatic I/O ++ * synchronization barriers to validate that it is a proper solution. ++ */ + int coherency_available(void) + { +- return coherency_type() != COHERENCY_FABRIC_TYPE_NONE; ++ return false; + } + + int __init coherency_init(void) +diff --git a/arch/arm64/crypto/aes-ce-ccm-glue.c b/arch/arm64/crypto/aes-ce-ccm-glue.c +index 9e6cdde9b43d..0156a268e163 100644 +--- a/arch/arm64/crypto/aes-ce-ccm-glue.c ++++ b/arch/arm64/crypto/aes-ce-ccm-glue.c +@@ -294,4 +294,4 @@ module_exit(aes_mod_exit); + MODULE_DESCRIPTION("Synchronous AES in CCM mode using ARMv8 Crypto Extensions"); + MODULE_AUTHOR("Ard Biesheuvel <ard.biesheu...@linaro.org>"); + MODULE_LICENSE("GPL v2"); +-MODULE_ALIAS("ccm(aes)"); ++MODULE_ALIAS_CRYPTO("ccm(aes)"); +diff --git a/arch/arm64/crypto/aes-glue.c b/arch/arm64/crypto/aes-glue.c +index 79cd911ef88c..5f63a791b2fb 100644 +--- a/arch/arm64/crypto/aes-glue.c ++++ b/arch/arm64/crypto/aes-glue.c +@@ -38,10 +38,10 @@ MODULE_DESCRIPTION("AES-ECB/CBC/CTR/XTS using ARMv8 Crypto Extensions"); + #define aes_xts_encrypt neon_aes_xts_encrypt + #define aes_xts_decrypt neon_aes_xts_decrypt + MODULE_DESCRIPTION("AES-ECB/CBC/CTR/XTS using ARMv8 NEON"); +-MODULE_ALIAS("ecb(aes)"); +-MODULE_ALIAS("cbc(aes)"); +-MODULE_ALIAS("ctr(aes)"); +-MODULE_ALIAS("xts(aes)"); ++MODULE_ALIAS_CRYPTO("ecb(aes)"); ++MODULE_ALIAS_CRYPTO("cbc(aes)"); ++MODULE_ALIAS_CRYPTO("ctr(aes)"); ++MODULE_ALIAS_CRYPTO("xts(aes)"); + #endif + + MODULE_AUTHOR("Ard Biesheuvel <ard.biesheu...@linaro.org>"); +diff --git a/arch/powerpc/crypto/sha1.c b/arch/powerpc/crypto/sha1.c +index f9e8b9491efc..b51da9132744 100644 +--- a/arch/powerpc/crypto/sha1.c ++++ b/arch/powerpc/crypto/sha1.c +@@ -154,4 +154,5 @@ module_exit(sha1_powerpc_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm"); + +-MODULE_ALIAS("sha1-powerpc"); ++MODULE_ALIAS_CRYPTO("sha1"); ++MODULE_ALIAS_CRYPTO("sha1-powerpc"); +diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c +index 23223cd63e54..1f272b24fc0b 100644 +--- a/arch/s390/crypto/aes_s390.c ++++ b/arch/s390/crypto/aes_s390.c +@@ -979,7 +979,7 @@ static void __exit aes_s390_fini(void) + module_init(aes_s390_init); + module_exit(aes_s390_fini); + +-MODULE_ALIAS("aes-all"); ++MODULE_ALIAS_CRYPTO("aes-all"); + + MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm"); + MODULE_LICENSE("GPL"); +diff --git a/arch/s390/crypto/des_s390.c b/arch/s390/crypto/des_s390.c +index 7acb77f7ef1a..9e05cc453a40 100644 +--- a/arch/s390/crypto/des_s390.c ++++ b/arch/s390/crypto/des_s390.c +@@ -619,8 +619,8 @@ static void __exit des_s390_exit(void) + module_init(des_s390_init); + module_exit(des_s390_exit); + +-MODULE_ALIAS("des"); +-MODULE_ALIAS("des3_ede"); ++MODULE_ALIAS_CRYPTO("des"); ++MODULE_ALIAS_CRYPTO("des3_ede"); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms"); +diff --git a/arch/s390/crypto/ghash_s390.c b/arch/s390/crypto/ghash_s390.c +index d43485d142e9..7940dc90e80b 100644 +--- a/arch/s390/crypto/ghash_s390.c ++++ b/arch/s390/crypto/ghash_s390.c +@@ -160,7 +160,7 @@ static void __exit ghash_mod_exit(void) + module_init(ghash_mod_init); + module_exit(ghash_mod_exit); + +-MODULE_ALIAS("ghash"); ++MODULE_ALIAS_CRYPTO("ghash"); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("GHASH Message Digest Algorithm, s390 implementation"); +diff --git a/arch/s390/crypto/sha1_s390.c b/arch/s390/crypto/sha1_s390.c +index a1b3a9dc9d8a..5b2bee323694 100644 +--- a/arch/s390/crypto/sha1_s390.c ++++ b/arch/s390/crypto/sha1_s390.c +@@ -103,6 +103,6 @@ static void __exit sha1_s390_fini(void) + module_init(sha1_s390_init); + module_exit(sha1_s390_fini); + +-MODULE_ALIAS("sha1"); ++MODULE_ALIAS_CRYPTO("sha1"); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm"); +diff --git a/arch/s390/crypto/sha256_s390.c b/arch/s390/crypto/sha256_s390.c +index 9b853809a492..b74ff158108c 100644 +--- a/arch/s390/crypto/sha256_s390.c ++++ b/arch/s390/crypto/sha256_s390.c +@@ -143,7 +143,7 @@ static void __exit sha256_s390_fini(void) + module_init(sha256_s390_init); + module_exit(sha256_s390_fini); + +-MODULE_ALIAS("sha256"); +-MODULE_ALIAS("sha224"); ++MODULE_ALIAS_CRYPTO("sha256"); ++MODULE_ALIAS_CRYPTO("sha224"); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA256 and SHA224 Secure Hash Algorithm"); +diff --git a/arch/s390/crypto/sha512_s390.c b/arch/s390/crypto/sha512_s390.c +index 32a81383b69c..0c36989ba182 100644 +--- a/arch/s390/crypto/sha512_s390.c ++++ b/arch/s390/crypto/sha512_s390.c +@@ -86,7 +86,7 @@ static struct shash_alg sha512_alg = { + } + }; + +-MODULE_ALIAS("sha512"); ++MODULE_ALIAS_CRYPTO("sha512"); + + static int sha384_init(struct shash_desc *desc) + { +@@ -126,7 +126,7 @@ static struct shash_alg sha384_alg = { + } + }; + +-MODULE_ALIAS("sha384"); ++MODULE_ALIAS_CRYPTO("sha384"); + + static int __init init(void) + { +diff --git a/arch/sparc/crypto/aes_glue.c b/arch/sparc/crypto/aes_glue.c +index df922f52d76d..705408766ab0 100644 +--- a/arch/sparc/crypto/aes_glue.c ++++ b/arch/sparc/crypto/aes_glue.c +@@ -499,6 +499,6 @@ module_exit(aes_sparc64_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("AES Secure Hash Algorithm, sparc64 aes opcode accelerated"); + +-MODULE_ALIAS("aes"); ++MODULE_ALIAS_CRYPTO("aes"); + + #include "crop_devid.c" +diff --git a/arch/sparc/crypto/camellia_glue.c b/arch/sparc/crypto/camellia_glue.c +index 888f6260b4ec..641f55cb61c3 100644 +--- a/arch/sparc/crypto/camellia_glue.c ++++ b/arch/sparc/crypto/camellia_glue.c +@@ -322,6 +322,6 @@ module_exit(camellia_sparc64_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Camellia Cipher Algorithm, sparc64 camellia opcode accelerated"); + +-MODULE_ALIAS("aes"); ++MODULE_ALIAS_CRYPTO("aes"); + + #include "crop_devid.c" +diff --git a/arch/sparc/crypto/crc32c_glue.c b/arch/sparc/crypto/crc32c_glue.c +index 5162fad912ce..d1064e46efe8 100644 +--- a/arch/sparc/crypto/crc32c_glue.c ++++ b/arch/sparc/crypto/crc32c_glue.c +@@ -176,6 +176,6 @@ module_exit(crc32c_sparc64_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated"); + +-MODULE_ALIAS("crc32c"); ++MODULE_ALIAS_CRYPTO("crc32c"); + + #include "crop_devid.c" +diff --git a/arch/sparc/crypto/des_glue.c b/arch/sparc/crypto/des_glue.c +index 3065bc61f9d3..d11500972994 100644 +--- a/arch/sparc/crypto/des_glue.c ++++ b/arch/sparc/crypto/des_glue.c +@@ -532,6 +532,6 @@ module_exit(des_sparc64_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms, sparc64 des opcode accelerated"); + +-MODULE_ALIAS("des"); ++MODULE_ALIAS_CRYPTO("des"); + + #include "crop_devid.c" +diff --git a/arch/sparc/crypto/md5_glue.c b/arch/sparc/crypto/md5_glue.c +index 09a9ea1dfb69..64c7ff5f72a9 100644 +--- a/arch/sparc/crypto/md5_glue.c ++++ b/arch/sparc/crypto/md5_glue.c +@@ -185,6 +185,6 @@ module_exit(md5_sparc64_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("MD5 Secure Hash Algorithm, sparc64 md5 opcode accelerated"); + +-MODULE_ALIAS("md5"); ++MODULE_ALIAS_CRYPTO("md5"); + + #include "crop_devid.c" +diff --git a/arch/sparc/crypto/sha1_glue.c b/arch/sparc/crypto/sha1_glue.c +index 6cd5f29e1e0d..1b3e47accc74 100644 +--- a/arch/sparc/crypto/sha1_glue.c ++++ b/arch/sparc/crypto/sha1_glue.c +@@ -180,6 +180,6 @@ module_exit(sha1_sparc64_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated"); + +-MODULE_ALIAS("sha1"); ++MODULE_ALIAS_CRYPTO("sha1"); + + #include "crop_devid.c" +diff --git a/arch/sparc/crypto/sha256_glue.c b/arch/sparc/crypto/sha256_glue.c +index 04f555ab2680..41f27cca2a22 100644 +--- a/arch/sparc/crypto/sha256_glue.c ++++ b/arch/sparc/crypto/sha256_glue.c +@@ -237,7 +237,7 @@ module_exit(sha256_sparc64_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 opcode accelerated"); + +-MODULE_ALIAS("sha224"); +-MODULE_ALIAS("sha256"); ++MODULE_ALIAS_CRYPTO("sha224"); ++MODULE_ALIAS_CRYPTO("sha256"); + + #include "crop_devid.c" +diff --git a/arch/sparc/crypto/sha512_glue.c b/arch/sparc/crypto/sha512_glue.c +index f04d1994d19a..9fff88541b8c 100644 +--- a/arch/sparc/crypto/sha512_glue.c ++++ b/arch/sparc/crypto/sha512_glue.c +@@ -222,7 +222,7 @@ module_exit(sha512_sparc64_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 opcode accelerated"); + +-MODULE_ALIAS("sha384"); +-MODULE_ALIAS("sha512"); ++MODULE_ALIAS_CRYPTO("sha384"); ++MODULE_ALIAS_CRYPTO("sha512"); + + #include "crop_devid.c" +diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig +index 41a503c15862..3635fff7b32d 100644 +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -856,7 +856,7 @@ source "kernel/Kconfig.preempt" + + config X86_UP_APIC + bool "Local APIC support on uniprocessors" +- depends on X86_32 && !SMP && !X86_32_NON_STANDARD && !PCI_MSI ++ depends on X86_32 && !SMP && !X86_32_NON_STANDARD + ---help--- + A local APIC (Advanced Programmable Interrupt Controller) is an + integrated interrupt controller in the CPU. If you have a single-CPU +@@ -867,6 +867,10 @@ config X86_UP_APIC + performance counters), and the NMI watchdog which detects hard + lockups. + ++config X86_UP_APIC_MSI ++ def_bool y ++ select X86_UP_APIC if X86_32 && !SMP && !X86_32_NON_STANDARD && PCI_MSI ++ + config X86_UP_IOAPIC + bool "IO-APIC support on uniprocessors" + depends on X86_UP_APIC +diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c +index 30dd59a9f0b4..0c33a7c67ea5 100644 +--- a/arch/x86/boot/compressed/misc.c ++++ b/arch/x86/boot/compressed/misc.c +@@ -361,6 +361,8 @@ asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap, + unsigned long output_len, + unsigned long run_size) + { ++ unsigned char *output_orig = output; ++ + real_mode = rmode; + + sanitize_boot_params(real_mode); +@@ -409,7 +411,12 @@ asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap, + debug_putstr("\nDecompressing Linux... "); + decompress(input_data, input_len, NULL, NULL, output, NULL, error); + parse_elf(output); +- handle_relocations(output, output_len); ++ /* ++ * 32-bit always performs relocations. 64-bit relocations are only ++ * needed if kASLR has chosen a different load address. ++ */ ++ if (!IS_ENABLED(CONFIG_X86_64) || output != output_orig) ++ handle_relocations(output, output_len); + debug_putstr("done.\nBooting the kernel.\n"); + return output; + } +diff --git a/arch/x86/crypto/aes_glue.c b/arch/x86/crypto/aes_glue.c +index aafe8ce0d65d..e26984f7ab8d 100644 +--- a/arch/x86/crypto/aes_glue.c ++++ b/arch/x86/crypto/aes_glue.c +@@ -66,5 +66,5 @@ module_exit(aes_fini); + + MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, asm optimized"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("aes"); +-MODULE_ALIAS("aes-asm"); ++MODULE_ALIAS_CRYPTO("aes"); ++MODULE_ALIAS_CRYPTO("aes-asm"); +diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c +index 888950f29fd9..70fece226d17 100644 +--- a/arch/x86/crypto/aesni-intel_glue.c ++++ b/arch/x86/crypto/aesni-intel_glue.c +@@ -1550,4 +1550,4 @@ module_exit(aesni_exit); + + MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("aes"); ++MODULE_ALIAS_CRYPTO("aes"); +diff --git a/arch/x86/crypto/blowfish_glue.c b/arch/x86/crypto/blowfish_glue.c +index 8af519ed73d1..17c05531dfd1 100644 +--- a/arch/x86/crypto/blowfish_glue.c ++++ b/arch/x86/crypto/blowfish_glue.c +@@ -478,5 +478,5 @@ module_exit(fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Blowfish Cipher Algorithm, asm optimized"); +-MODULE_ALIAS("blowfish"); +-MODULE_ALIAS("blowfish-asm"); ++MODULE_ALIAS_CRYPTO("blowfish"); ++MODULE_ALIAS_CRYPTO("blowfish-asm"); +diff --git a/arch/x86/crypto/camellia_aesni_avx2_glue.c b/arch/x86/crypto/camellia_aesni_avx2_glue.c +index 4209a76fcdaa..9a07fafe3831 100644 +--- a/arch/x86/crypto/camellia_aesni_avx2_glue.c ++++ b/arch/x86/crypto/camellia_aesni_avx2_glue.c +@@ -582,5 +582,5 @@ module_exit(camellia_aesni_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Camellia Cipher Algorithm, AES-NI/AVX2 optimized"); +-MODULE_ALIAS("camellia"); +-MODULE_ALIAS("camellia-asm"); ++MODULE_ALIAS_CRYPTO("camellia"); ++MODULE_ALIAS_CRYPTO("camellia-asm"); +diff --git a/arch/x86/crypto/camellia_aesni_avx_glue.c b/arch/x86/crypto/camellia_aesni_avx_glue.c +index 87a041a10f4a..ed38d959add6 100644 +--- a/arch/x86/crypto/camellia_aesni_avx_glue.c ++++ b/arch/x86/crypto/camellia_aesni_avx_glue.c +@@ -574,5 +574,5 @@ module_exit(camellia_aesni_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Camellia Cipher Algorithm, AES-NI/AVX optimized"); +-MODULE_ALIAS("camellia"); +-MODULE_ALIAS("camellia-asm"); ++MODULE_ALIAS_CRYPTO("camellia"); ++MODULE_ALIAS_CRYPTO("camellia-asm"); +diff --git a/arch/x86/crypto/camellia_glue.c b/arch/x86/crypto/camellia_glue.c +index c171dcbf192d..5c8b6266a394 100644 +--- a/arch/x86/crypto/camellia_glue.c ++++ b/arch/x86/crypto/camellia_glue.c +@@ -1725,5 +1725,5 @@ module_exit(fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Camellia Cipher Algorithm, asm optimized"); +-MODULE_ALIAS("camellia"); +-MODULE_ALIAS("camellia-asm"); ++MODULE_ALIAS_CRYPTO("camellia"); ++MODULE_ALIAS_CRYPTO("camellia-asm"); +diff --git a/arch/x86/crypto/cast5_avx_glue.c b/arch/x86/crypto/cast5_avx_glue.c +index e57e20ab5e0b..60ada677a928 100644 +--- a/arch/x86/crypto/cast5_avx_glue.c ++++ b/arch/x86/crypto/cast5_avx_glue.c +@@ -491,4 +491,4 @@ module_exit(cast5_exit); + + MODULE_DESCRIPTION("Cast5 Cipher Algorithm, AVX optimized"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("cast5"); ++MODULE_ALIAS_CRYPTO("cast5"); +diff --git a/arch/x86/crypto/cast6_avx_glue.c b/arch/x86/crypto/cast6_avx_glue.c +index 09f3677393e4..0160f68a57ff 100644 +--- a/arch/x86/crypto/cast6_avx_glue.c ++++ b/arch/x86/crypto/cast6_avx_glue.c +@@ -611,4 +611,4 @@ module_exit(cast6_exit); + + MODULE_DESCRIPTION("Cast6 Cipher Algorithm, AVX optimized"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("cast6"); ++MODULE_ALIAS_CRYPTO("cast6"); +diff --git a/arch/x86/crypto/crc32-pclmul_glue.c b/arch/x86/crypto/crc32-pclmul_glue.c +index 9d014a74ef96..1937fc1d8763 100644 +--- a/arch/x86/crypto/crc32-pclmul_glue.c ++++ b/arch/x86/crypto/crc32-pclmul_glue.c +@@ -197,5 +197,5 @@ module_exit(crc32_pclmul_mod_fini); + MODULE_AUTHOR("Alexander Boyko <alexander_bo...@xyratex.com>"); + MODULE_LICENSE("GPL"); + +-MODULE_ALIAS("crc32"); +-MODULE_ALIAS("crc32-pclmul"); ++MODULE_ALIAS_CRYPTO("crc32"); ++MODULE_ALIAS_CRYPTO("crc32-pclmul"); +diff --git a/arch/x86/crypto/crc32c-intel_glue.c b/arch/x86/crypto/crc32c-intel_glue.c +index 6812ad98355c..28640c3d6af7 100644 +--- a/arch/x86/crypto/crc32c-intel_glue.c ++++ b/arch/x86/crypto/crc32c-intel_glue.c +@@ -280,5 +280,5 @@ MODULE_AUTHOR("Austin Zhang <austin.zh...@intel.com>, Kent Liu <kent.liu@intel.c + MODULE_DESCRIPTION("CRC32c (Castagnoli) optimization using Intel Hardware."); + MODULE_LICENSE("GPL"); + +-MODULE_ALIAS("crc32c"); +-MODULE_ALIAS("crc32c-intel"); ++MODULE_ALIAS_CRYPTO("crc32c"); ++MODULE_ALIAS_CRYPTO("crc32c-intel"); +diff --git a/arch/x86/crypto/crct10dif-pclmul_glue.c b/arch/x86/crypto/crct10dif-pclmul_glue.c +index 7845d7fd54c0..b6c67bf30fdf 100644 +--- a/arch/x86/crypto/crct10dif-pclmul_glue.c ++++ b/arch/x86/crypto/crct10dif-pclmul_glue.c +@@ -147,5 +147,5 @@ MODULE_AUTHOR("Tim Chen <tim.c.c...@linux.intel.com>"); + MODULE_DESCRIPTION("T10 DIF CRC calculation accelerated with PCLMULQDQ."); + MODULE_LICENSE("GPL"); + +-MODULE_ALIAS("crct10dif"); +-MODULE_ALIAS("crct10dif-pclmul"); ++MODULE_ALIAS_CRYPTO("crct10dif"); ++MODULE_ALIAS_CRYPTO("crct10dif-pclmul"); +diff --git a/arch/x86/crypto/des3_ede_glue.c b/arch/x86/crypto/des3_ede_glue.c +index 0e9c0668fe4e..38a14f818ef1 100644 +--- a/arch/x86/crypto/des3_ede_glue.c ++++ b/arch/x86/crypto/des3_ede_glue.c +@@ -502,8 +502,8 @@ module_exit(des3_ede_x86_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Triple DES EDE Cipher Algorithm, asm optimized"); +-MODULE_ALIAS("des3_ede"); +-MODULE_ALIAS("des3_ede-asm"); +-MODULE_ALIAS("des"); +-MODULE_ALIAS("des-asm"); ++MODULE_ALIAS_CRYPTO("des3_ede"); ++MODULE_ALIAS_CRYPTO("des3_ede-asm"); ++MODULE_ALIAS_CRYPTO("des"); ++MODULE_ALIAS_CRYPTO("des-asm"); + MODULE_AUTHOR("Jussi Kivilinna <jussi.kivili...@iki.fi>"); +diff --git a/arch/x86/crypto/fpu.c b/arch/x86/crypto/fpu.c +index 98d7a188f46b..f368ba261739 100644 +--- a/arch/x86/crypto/fpu.c ++++ b/arch/x86/crypto/fpu.c +@@ -17,6 +17,7 @@ + #include <linux/kernel.h> + #include <linux/module.h> + #include <linux/slab.h> ++#include <linux/crypto.h> + #include <asm/i387.h> + + struct crypto_fpu_ctx { +@@ -159,3 +160,5 @@ void __exit crypto_fpu_exit(void) + { + crypto_unregister_template(&crypto_fpu_tmpl); + } ++ ++MODULE_ALIAS_CRYPTO("fpu"); +diff --git a/arch/x86/crypto/ghash-clmulni-intel_glue.c b/arch/x86/crypto/ghash-clmulni-intel_glue.c +index 88bb7ba8b175..8253d85aa165 100644 +--- a/arch/x86/crypto/ghash-clmulni-intel_glue.c ++++ b/arch/x86/crypto/ghash-clmulni-intel_glue.c +@@ -341,4 +341,4 @@ module_exit(ghash_pclmulqdqni_mod_exit); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("GHASH Message Digest Algorithm, " + "acclerated by PCLMULQDQ-NI"); +-MODULE_ALIAS("ghash"); ++MODULE_ALIAS_CRYPTO("ghash"); +diff --git a/arch/x86/crypto/salsa20_glue.c b/arch/x86/crypto/salsa20_glue.c +index 5e8e67739bb5..399a29d067d6 100644 +--- a/arch/x86/crypto/salsa20_glue.c ++++ b/arch/x86/crypto/salsa20_glue.c +@@ -119,5 +119,5 @@ module_exit(fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION ("Salsa20 stream cipher algorithm (optimized assembly version)"); +-MODULE_ALIAS("salsa20"); +-MODULE_ALIAS("salsa20-asm"); ++MODULE_ALIAS_CRYPTO("salsa20"); ++MODULE_ALIAS_CRYPTO("salsa20-asm"); +diff --git a/arch/x86/crypto/serpent_avx2_glue.c b/arch/x86/crypto/serpent_avx2_glue.c +index 2fae489b1524..437e47a4d302 100644 +--- a/arch/x86/crypto/serpent_avx2_glue.c ++++ b/arch/x86/crypto/serpent_avx2_glue.c +@@ -558,5 +558,5 @@ module_exit(fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Serpent Cipher Algorithm, AVX2 optimized"); +-MODULE_ALIAS("serpent"); +-MODULE_ALIAS("serpent-asm"); ++MODULE_ALIAS_CRYPTO("serpent"); ++MODULE_ALIAS_CRYPTO("serpent-asm"); +diff --git a/arch/x86/crypto/serpent_avx_glue.c b/arch/x86/crypto/serpent_avx_glue.c +index ff4870870972..7e217398b4eb 100644 +--- a/arch/x86/crypto/serpent_avx_glue.c ++++ b/arch/x86/crypto/serpent_avx_glue.c +@@ -617,4 +617,4 @@ module_exit(serpent_exit); + + MODULE_DESCRIPTION("Serpent Cipher Algorithm, AVX optimized"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("serpent"); ++MODULE_ALIAS_CRYPTO("serpent"); +diff --git a/arch/x86/crypto/serpent_sse2_glue.c b/arch/x86/crypto/serpent_sse2_glue.c +index 8c95f8637306..bf025adaea01 100644 +--- a/arch/x86/crypto/serpent_sse2_glue.c ++++ b/arch/x86/crypto/serpent_sse2_glue.c +@@ -618,4 +618,4 @@ module_exit(serpent_sse2_exit); + + MODULE_DESCRIPTION("Serpent Cipher Algorithm, SSE2 optimized"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("serpent"); ++MODULE_ALIAS_CRYPTO("serpent"); +diff --git a/arch/x86/crypto/sha-mb/sha1_mb.c b/arch/x86/crypto/sha-mb/sha1_mb.c +index 99eefd812958..d42c9b7fadcf 100644 +--- a/arch/x86/crypto/sha-mb/sha1_mb.c ++++ b/arch/x86/crypto/sha-mb/sha1_mb.c +@@ -932,4 +932,4 @@ module_exit(sha1_mb_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, multi buffer accelerated"); + +-MODULE_ALIAS("sha1"); ++MODULE_ALIAS_CRYPTO("sha1"); +diff --git a/arch/x86/crypto/sha1_ssse3_glue.c b/arch/x86/crypto/sha1_ssse3_glue.c +index 74d16ef707c7..6c20fe04a738 100644 +--- a/arch/x86/crypto/sha1_ssse3_glue.c ++++ b/arch/x86/crypto/sha1_ssse3_glue.c +@@ -278,4 +278,4 @@ module_exit(sha1_ssse3_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, Supplemental SSE3 accelerated"); + +-MODULE_ALIAS("sha1"); ++MODULE_ALIAS_CRYPTO("sha1"); +diff --git a/arch/x86/crypto/sha256_ssse3_glue.c b/arch/x86/crypto/sha256_ssse3_glue.c +index f248546da1ca..4dc100d82902 100644 +--- a/arch/x86/crypto/sha256_ssse3_glue.c ++++ b/arch/x86/crypto/sha256_ssse3_glue.c +@@ -318,5 +318,5 @@ module_exit(sha256_ssse3_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm, Supplemental SSE3 accelerated"); + +-MODULE_ALIAS("sha256"); +-MODULE_ALIAS("sha224"); ++MODULE_ALIAS_CRYPTO("sha256"); ++MODULE_ALIAS_CRYPTO("sha224"); +diff --git a/arch/x86/crypto/sha512_ssse3_glue.c b/arch/x86/crypto/sha512_ssse3_glue.c +index 8626b03e83b7..26a5898a6f26 100644 +--- a/arch/x86/crypto/sha512_ssse3_glue.c ++++ b/arch/x86/crypto/sha512_ssse3_glue.c +@@ -326,5 +326,5 @@ module_exit(sha512_ssse3_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA512 Secure Hash Algorithm, Supplemental SSE3 accelerated"); + +-MODULE_ALIAS("sha512"); +-MODULE_ALIAS("sha384"); ++MODULE_ALIAS_CRYPTO("sha512"); ++MODULE_ALIAS_CRYPTO("sha384"); +diff --git a/arch/x86/crypto/twofish_avx_glue.c b/arch/x86/crypto/twofish_avx_glue.c +index 4e3c665be129..1ac531ea9bcc 100644 +--- a/arch/x86/crypto/twofish_avx_glue.c ++++ b/arch/x86/crypto/twofish_avx_glue.c +@@ -579,4 +579,4 @@ module_exit(twofish_exit); + + MODULE_DESCRIPTION("Twofish Cipher Algorithm, AVX optimized"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("twofish"); ++MODULE_ALIAS_CRYPTO("twofish"); +diff --git a/arch/x86/crypto/twofish_glue.c b/arch/x86/crypto/twofish_glue.c +index 0a5202303501..77e06c2da83d 100644 +--- a/arch/x86/crypto/twofish_glue.c ++++ b/arch/x86/crypto/twofish_glue.c +@@ -96,5 +96,5 @@ module_exit(fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION ("Twofish Cipher Algorithm, asm optimized"); +-MODULE_ALIAS("twofish"); +-MODULE_ALIAS("twofish-asm"); ++MODULE_ALIAS_CRYPTO("twofish"); ++MODULE_ALIAS_CRYPTO("twofish-asm"); +diff --git a/arch/x86/crypto/twofish_glue_3way.c b/arch/x86/crypto/twofish_glue_3way.c +index 13e63b3e1dfb..56d8a08ee479 100644 +--- a/arch/x86/crypto/twofish_glue_3way.c ++++ b/arch/x86/crypto/twofish_glue_3way.c +@@ -495,5 +495,5 @@ module_exit(fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Twofish Cipher Algorithm, 3-way parallel asm optimized"); +-MODULE_ALIAS("twofish"); +-MODULE_ALIAS("twofish-asm"); ++MODULE_ALIAS_CRYPTO("twofish"); ++MODULE_ALIAS_CRYPTO("twofish-asm"); +diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h +index 50d033a8947d..a94b82e8f156 100644 +--- a/arch/x86/include/asm/desc.h ++++ b/arch/x86/include/asm/desc.h +@@ -251,7 +251,8 @@ static inline void native_load_tls(struct thread_struct *t, unsigned int cpu) + gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]; + } + +-#define _LDT_empty(info) \ ++/* This intentionally ignores lm, since 32-bit apps don't have that field. */ ++#define LDT_empty(info) \ + ((info)->base_addr == 0 && \ + (info)->limit == 0 && \ + (info)->contents == 0 && \ +@@ -261,11 +262,18 @@ static inline void native_load_tls(struct thread_struct *t, unsigned int cpu) + (info)->seg_not_present == 1 && \ + (info)->useable == 0) + +-#ifdef CONFIG_X86_64 +-#define LDT_empty(info) (_LDT_empty(info) && ((info)->lm == 0)) +-#else +-#define LDT_empty(info) (_LDT_empty(info)) +-#endif ++/* Lots of programs expect an all-zero user_desc to mean "no segment at all". */ ++static inline bool LDT_zero(const struct user_desc *info) ++{ ++ return (info->base_addr == 0 && ++ info->limit == 0 && ++ info->contents == 0 && ++ info->read_exec_only == 0 && ++ info->seg_32bit == 0 && ++ info->limit_in_pages == 0 && ++ info->seg_not_present == 0 && ++ info->useable == 0); ++} + + static inline void clear_LDT(void) + { +diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c +index a450373e8e91..939155ffdece 100644 +--- a/arch/x86/kernel/cpu/mshyperv.c ++++ b/arch/x86/kernel/cpu/mshyperv.c +@@ -107,6 +107,7 @@ static struct clocksource hyperv_cs = { + .rating = 400, /* use this when running on Hyperv*/ + .read = read_hv_clock, + .mask = CLOCKSOURCE_MASK(64), ++ .flags = CLOCK_SOURCE_IS_CONTINUOUS, + }; + + static void __init ms_hyperv_init_platform(void) +diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c +index 922d28581024..37907756fc41 100644 +--- a/arch/x86/kernel/irq.c ++++ b/arch/x86/kernel/irq.c +@@ -127,7 +127,7 @@ int arch_show_interrupts(struct seq_file *p, int prec) + seq_printf(p, " Machine check polls\n"); + #endif + #if IS_ENABLED(CONFIG_HYPERV) || defined(CONFIG_XEN) +- seq_printf(p, "%*s: ", prec, "THR"); ++ seq_printf(p, "%*s: ", prec, "HYP"); + for_each_online_cpu(j) + seq_printf(p, "%10u ", irq_stats(j)->irq_hv_callback_count); + seq_printf(p, " Hypervisor callback interrupts\n"); +diff --git a/arch/x86/kernel/tls.c b/arch/x86/kernel/tls.c +index 4e942f31b1a7..7fc5e843f247 100644 +--- a/arch/x86/kernel/tls.c ++++ b/arch/x86/kernel/tls.c +@@ -29,7 +29,28 @@ static int get_free_idx(void) + + static bool tls_desc_okay(const struct user_desc *info) + { +- if (LDT_empty(info)) ++ /* ++ * For historical reasons (i.e. no one ever documented how any ++ * of the segmentation APIs work), user programs can and do ++ * assume that a struct user_desc that's all zeros except for ++ * entry_number means "no segment at all". This never actually ++ * worked. In fact, up to Linux 3.19, a struct user_desc like ++ * this would create a 16-bit read-write segment with base and ++ * limit both equal to zero. ++ * ++ * That was close enough to "no segment at all" until we ++ * hardened this function to disallow 16-bit TLS segments. Fix ++ * it up by interpreting these zeroed segments the way that they ++ * were almost certainly intended to be interpreted. ++ * ++ * The correct way to ask for "no segment at all" is to specify ++ * a user_desc that satisfies LDT_empty. To keep everything ++ * working, we accept both. ++ * ++ * Note that there's a similar kludge in modify_ldt -- look at ++ * the distinction between modes 1 and 0x11. ++ */ ++ if (LDT_empty(info) || LDT_zero(info)) + return true; + + /* +@@ -71,7 +92,7 @@ static void set_tls_desc(struct task_struct *p, int idx, + cpu = get_cpu(); + + while (n-- > 0) { +- if (LDT_empty(info)) ++ if (LDT_empty(info) || LDT_zero(info)) + desc->a = desc->b = 0; + else + fill_ldt(desc, info); +diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c +index b7e50bba3bbb..505449700e0c 100644 +--- a/arch/x86/kernel/tsc.c ++++ b/arch/x86/kernel/tsc.c +@@ -617,7 +617,7 @@ static unsigned long quick_pit_calibrate(void) + goto success; + } + } +- pr_err("Fast TSC calibration failed\n"); ++ pr_info("Fast TSC calibration failed\n"); + return 0; + + success: +diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c +index 22e7ed9e6d8e..c7327a7761ca 100644 +--- a/arch/x86/kvm/emulate.c ++++ b/arch/x86/kvm/emulate.c +@@ -2345,7 +2345,7 @@ static int em_sysenter(struct x86_emulate_ctxt *ctxt) + * Not recognized on AMD in compat mode (but is recognized in legacy + * mode). + */ +- if ((ctxt->mode == X86EMUL_MODE_PROT32) && (efer & EFER_LMA) ++ if ((ctxt->mode != X86EMUL_MODE_PROT64) && (efer & EFER_LMA) + && !vendor_intel(ctxt)) + return emulate_ud(ctxt); + +@@ -2358,25 +2358,13 @@ static int em_sysenter(struct x86_emulate_ctxt *ctxt) + setup_syscalls_segments(ctxt, &cs, &ss); + + ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data); +- switch (ctxt->mode) { +- case X86EMUL_MODE_PROT32: +- if ((msr_data & 0xfffc) == 0x0) +- return emulate_gp(ctxt, 0); +- break; +- case X86EMUL_MODE_PROT64: +- if (msr_data == 0x0) +- return emulate_gp(ctxt, 0); +- break; +- default: +- break; +- } ++ if ((msr_data & 0xfffc) == 0x0) ++ return emulate_gp(ctxt, 0); + + ctxt->eflags &= ~(EFLG_VM | EFLG_IF); +- cs_sel = (u16)msr_data; +- cs_sel &= ~SELECTOR_RPL_MASK; ++ cs_sel = (u16)msr_data & ~SELECTOR_RPL_MASK; + ss_sel = cs_sel + 8; +- ss_sel &= ~SELECTOR_RPL_MASK; +- if (ctxt->mode == X86EMUL_MODE_PROT64 || (efer & EFER_LMA)) { ++ if (efer & EFER_LMA) { + cs.d = 0; + cs.l = 1; + } +@@ -2385,10 +2373,11 @@ static int em_sysenter(struct x86_emulate_ctxt *ctxt) + ops->set_segment(ctxt, ss_sel, &ss, 0, VCPU_SREG_SS); + + ops->get_msr(ctxt, MSR_IA32_SYSENTER_EIP, &msr_data); +- ctxt->_eip = msr_data; ++ ctxt->_eip = (efer & EFER_LMA) ? msr_data : (u32)msr_data; + + ops->get_msr(ctxt, MSR_IA32_SYSENTER_ESP, &msr_data); +- *reg_write(ctxt, VCPU_REGS_RSP) = msr_data; ++ *reg_write(ctxt, VCPU_REGS_RSP) = (efer & EFER_LMA) ? msr_data : ++ (u32)msr_data; + + return X86EMUL_CONTINUE; + } +@@ -3788,8 +3777,8 @@ static const struct opcode group5[] = { + }; + + static const struct opcode group6[] = { +- DI(Prot, sldt), +- DI(Prot, str), ++ DI(Prot | DstMem, sldt), ++ DI(Prot | DstMem, str), + II(Prot | Priv | SrcMem16, em_lldt, lldt), + II(Prot | Priv | SrcMem16, em_ltr, ltr), + N, N, N, N, +diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c +index 37c1435889ce..d0583eb61a5d 100644 +--- a/arch/x86/pci/i386.c ++++ b/arch/x86/pci/i386.c +@@ -216,7 +216,7 @@ static void pcibios_allocate_bridge_resources(struct pci_dev *dev) + continue; + if (r->parent) /* Already allocated */ + continue; +- if (!r->start || pci_claim_resource(dev, idx) < 0) { ++ if (!r->start || pci_claim_bridge_resource(dev, idx) < 0) { + /* + * Something is wrong with the region. + * Invalidate the resource to prevent +diff --git a/crypto/842.c b/crypto/842.c +index 65c7a89cfa09..b48f4f108c47 100644 +--- a/crypto/842.c ++++ b/crypto/842.c +@@ -180,3 +180,4 @@ module_exit(nx842_mod_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("842 Compression Algorithm"); ++MODULE_ALIAS_CRYPTO("842"); +diff --git a/crypto/aes_generic.c b/crypto/aes_generic.c +index fd0d6b454975..3dd101144a58 100644 +--- a/crypto/aes_generic.c ++++ b/crypto/aes_generic.c +@@ -1474,4 +1474,5 @@ module_exit(aes_fini); + + MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm"); + MODULE_LICENSE("Dual BSD/GPL"); +-MODULE_ALIAS("aes"); ++MODULE_ALIAS_CRYPTO("aes"); ++MODULE_ALIAS_CRYPTO("aes-generic"); +diff --git a/crypto/algapi.c b/crypto/algapi.c +index e8d3a7dca8c4..71a8143e23b1 100644 +--- a/crypto/algapi.c ++++ b/crypto/algapi.c +@@ -509,8 +509,8 @@ static struct crypto_template *__crypto_lookup_template(const char *name) + + struct crypto_template *crypto_lookup_template(const char *name) + { +- return try_then_request_module(__crypto_lookup_template(name), "%s", +- name); ++ return try_then_request_module(__crypto_lookup_template(name), ++ "crypto-%s", name); + } + EXPORT_SYMBOL_GPL(crypto_lookup_template); + +diff --git a/crypto/ansi_cprng.c b/crypto/ansi_cprng.c +index 666f1962a160..6f5bebc9bf01 100644 +--- a/crypto/ansi_cprng.c ++++ b/crypto/ansi_cprng.c +@@ -476,4 +476,5 @@ module_param(dbg, int, 0); + MODULE_PARM_DESC(dbg, "Boolean to enable debugging (0/1 == off/on)"); + module_init(prng_mod_init); + module_exit(prng_mod_fini); +-MODULE_ALIAS("stdrng"); ++MODULE_ALIAS_CRYPTO("stdrng"); ++MODULE_ALIAS_CRYPTO("ansi_cprng"); +diff --git a/crypto/anubis.c b/crypto/anubis.c +index 008c8a4fb67c..4bb187c2a902 100644 +--- a/crypto/anubis.c ++++ b/crypto/anubis.c +@@ -704,3 +704,4 @@ module_exit(anubis_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Anubis Cryptographic Algorithm"); ++MODULE_ALIAS_CRYPTO("anubis"); +diff --git a/crypto/api.c b/crypto/api.c +index a2b39c5f3649..2a81e98a0021 100644 +--- a/crypto/api.c ++++ b/crypto/api.c +@@ -216,11 +216,11 @@ struct crypto_alg *crypto_larval_lookup(const char *name, u32 type, u32 mask) + + alg = crypto_alg_lookup(name, type, mask); + if (!alg) { +- request_module("%s", name); ++ request_module("crypto-%s", name); + + if (!((type ^ CRYPTO_ALG_NEED_FALLBACK) & mask & + CRYPTO_ALG_NEED_FALLBACK)) +- request_module("%s-all", name); ++ request_module("crypto-%s-all", name); + + alg = crypto_alg_lookup(name, type, mask); + } +diff --git a/crypto/arc4.c b/crypto/arc4.c +index 5a772c3657d5..f1a81925558f 100644 +--- a/crypto/arc4.c ++++ b/crypto/arc4.c +@@ -166,3 +166,4 @@ module_exit(arc4_exit); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("ARC4 Cipher Algorithm"); + MODULE_AUTHOR("Jon Oberheide <j...@oberheide.org>"); ++MODULE_ALIAS_CRYPTO("arc4"); +diff --git a/crypto/authenc.c b/crypto/authenc.c +index e1223559d5df..78fb16cab13f 100644 +--- a/crypto/authenc.c ++++ b/crypto/authenc.c +@@ -721,3 +721,4 @@ module_exit(crypto_authenc_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Simple AEAD wrapper for IPsec"); ++MODULE_ALIAS_CRYPTO("authenc"); +diff --git a/crypto/authencesn.c b/crypto/authencesn.c +index 4be0dd4373a9..024bff2344fc 100644 +--- a/crypto/authencesn.c ++++ b/crypto/authencesn.c +@@ -814,3 +814,4 @@ module_exit(crypto_authenc_esn_module_exit); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Steffen Klassert <steffen.klass...@secunet.com>"); + MODULE_DESCRIPTION("AEAD wrapper for IPsec with extended sequence numbers"); ++MODULE_ALIAS_CRYPTO("authencesn"); +diff --git a/crypto/blowfish_generic.c b/crypto/blowfish_generic.c +index 8baf5447d35b..87b392a77a93 100644 +--- a/crypto/blowfish_generic.c ++++ b/crypto/blowfish_generic.c +@@ -138,4 +138,5 @@ module_exit(blowfish_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Blowfish Cipher Algorithm"); +-MODULE_ALIAS("blowfish"); ++MODULE_ALIAS_CRYPTO("blowfish"); ++MODULE_ALIAS_CRYPTO("blowfish-generic"); +diff --git a/crypto/camellia_generic.c b/crypto/camellia_generic.c +index 26bcd7a2d6b4..a02286bf319e 100644 +--- a/crypto/camellia_generic.c ++++ b/crypto/camellia_generic.c +@@ -1098,4 +1098,5 @@ module_exit(camellia_fini); + + MODULE_DESCRIPTION("Camellia Cipher Algorithm"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("camellia"); ++MODULE_ALIAS_CRYPTO("camellia"); ++MODULE_ALIAS_CRYPTO("camellia-generic"); +diff --git a/crypto/cast5_generic.c b/crypto/cast5_generic.c +index 5558f630a0eb..df5c72629383 100644 +--- a/crypto/cast5_generic.c ++++ b/crypto/cast5_generic.c +@@ -549,4 +549,5 @@ module_exit(cast5_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Cast5 Cipher Algorithm"); +-MODULE_ALIAS("cast5"); ++MODULE_ALIAS_CRYPTO("cast5"); ++MODULE_ALIAS_CRYPTO("cast5-generic"); +diff --git a/crypto/cast6_generic.c b/crypto/cast6_generic.c +index de732528a430..058c8d755d03 100644 +--- a/crypto/cast6_generic.c ++++ b/crypto/cast6_generic.c +@@ -291,4 +291,5 @@ module_exit(cast6_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Cast6 Cipher Algorithm"); +-MODULE_ALIAS("cast6"); ++MODULE_ALIAS_CRYPTO("cast6"); ++MODULE_ALIAS_CRYPTO("cast6-generic"); +diff --git a/crypto/cbc.c b/crypto/cbc.c +index 61ac42e1e32b..780ee27b2d43 100644 +--- a/crypto/cbc.c ++++ b/crypto/cbc.c +@@ -289,3 +289,4 @@ module_exit(crypto_cbc_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("CBC block cipher algorithm"); ++MODULE_ALIAS_CRYPTO("cbc"); +diff --git a/crypto/ccm.c b/crypto/ccm.c +index 1df84217f7c9..003bbbd21a2b 100644 +--- a/crypto/ccm.c ++++ b/crypto/ccm.c +@@ -879,5 +879,6 @@ module_exit(crypto_ccm_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Counter with CBC MAC"); +-MODULE_ALIAS("ccm_base"); +-MODULE_ALIAS("rfc4309"); ++MODULE_ALIAS_CRYPTO("ccm_base"); ++MODULE_ALIAS_CRYPTO("rfc4309"); ++MODULE_ALIAS_CRYPTO("ccm"); +diff --git a/crypto/chainiv.c b/crypto/chainiv.c +index 9c294c8f9a07..63c17d5992f7 100644 +--- a/crypto/chainiv.c ++++ b/crypto/chainiv.c +@@ -359,3 +359,4 @@ module_exit(chainiv_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Chain IV Generator"); ++MODULE_ALIAS_CRYPTO("chainiv"); +diff --git a/crypto/cmac.c b/crypto/cmac.c +index 50880cf17fad..7a8bfbd548f6 100644 +--- a/crypto/cmac.c ++++ b/crypto/cmac.c +@@ -313,3 +313,4 @@ module_exit(crypto_cmac_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("CMAC keyed hash algorithm"); ++MODULE_ALIAS_CRYPTO("cmac"); +diff --git a/crypto/crc32.c b/crypto/crc32.c +index 9d1c41569898..187ded28cb0b 100644 +--- a/crypto/crc32.c ++++ b/crypto/crc32.c +@@ -156,3 +156,4 @@ module_exit(crc32_mod_fini); + MODULE_AUTHOR("Alexander Boyko <alexander_bo...@xyratex.com>"); + MODULE_DESCRIPTION("CRC32 calculations wrapper for lib/crc32"); + MODULE_LICENSE("GPL"); ++MODULE_ALIAS_CRYPTO("crc32"); +diff --git a/crypto/crc32c_generic.c b/crypto/crc32c_generic.c +index d9c7beba8e50..06f1b60f02b2 100644 +--- a/crypto/crc32c_generic.c ++++ b/crypto/crc32c_generic.c +@@ -170,5 +170,6 @@ module_exit(crc32c_mod_fini); + MODULE_AUTHOR("Clay Haapala <chaap...@cisco.com>"); + MODULE_DESCRIPTION("CRC32c (Castagnoli) calculations wrapper for lib/crc32c"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("crc32c"); ++MODULE_ALIAS_CRYPTO("crc32c"); ++MODULE_ALIAS_CRYPTO("crc32c-generic"); + MODULE_SOFTDEP("pre: crc32c"); +diff --git a/crypto/crct10dif_generic.c b/crypto/crct10dif_generic.c +index 877e7114ec5c..c1229614c7e3 100644 +--- a/crypto/crct10dif_generic.c ++++ b/crypto/crct10dif_generic.c +@@ -124,4 +124,5 @@ module_exit(crct10dif_mod_fini); + MODULE_AUTHOR("Tim Chen <tim.c.c...@linux.intel.com>"); + MODULE_DESCRIPTION("T10 DIF CRC calculation."); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("crct10dif"); ++MODULE_ALIAS_CRYPTO("crct10dif"); ++MODULE_ALIAS_CRYPTO("crct10dif-generic"); +diff --git a/crypto/cryptd.c b/crypto/cryptd.c +index e592c90abebb..650afac10fd7 100644 +--- a/crypto/cryptd.c ++++ b/crypto/cryptd.c +@@ -955,3 +955,4 @@ module_exit(cryptd_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Software async crypto daemon"); ++MODULE_ALIAS_CRYPTO("cryptd"); +diff --git a/crypto/crypto_null.c b/crypto/crypto_null.c +index 1dc54bb95a87..a20319132e33 100644 +--- a/crypto/crypto_null.c ++++ b/crypto/crypto_null.c +@@ -145,9 +145,9 @@ static struct crypto_alg null_algs[3] = { { + .coa_decompress = null_compress } } + } }; + +-MODULE_ALIAS("compress_null"); +-MODULE_ALIAS("digest_null"); +-MODULE_ALIAS("cipher_null"); ++MODULE_ALIAS_CRYPTO("compress_null"); ++MODULE_ALIAS_CRYPTO("digest_null"); ++MODULE_ALIAS_CRYPTO("cipher_null"); + + static int __init crypto_null_mod_init(void) + { +diff --git a/crypto/ctr.c b/crypto/ctr.c +index f2b94f27bb2c..2386f7313952 100644 +--- a/crypto/ctr.c ++++ b/crypto/ctr.c +@@ -466,4 +466,5 @@ module_exit(crypto_ctr_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("CTR Counter block mode"); +-MODULE_ALIAS("rfc3686"); ++MODULE_ALIAS_CRYPTO("rfc3686"); ++MODULE_ALIAS_CRYPTO("ctr"); +diff --git a/crypto/cts.c b/crypto/cts.c +index 133f0874c95e..bd9405820e8a 100644 +--- a/crypto/cts.c ++++ b/crypto/cts.c +@@ -351,3 +351,4 @@ module_exit(crypto_cts_module_exit); + + MODULE_LICENSE("Dual BSD/GPL"); + MODULE_DESCRIPTION("CTS-CBC CipherText Stealing for CBC"); ++MODULE_ALIAS_CRYPTO("cts"); +diff --git a/crypto/deflate.c b/crypto/deflate.c +index b57d70eb156b..95d8d37c5021 100644 +--- a/crypto/deflate.c ++++ b/crypto/deflate.c +@@ -222,4 +222,4 @@ module_exit(deflate_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Deflate Compression Algorithm for IPCOMP"); + MODULE_AUTHOR("James Morris <jmor...@intercode.com.au>"); +- ++MODULE_ALIAS_CRYPTO("deflate"); +diff --git a/crypto/des_generic.c b/crypto/des_generic.c +index 298d464ab7d2..a71720544d11 100644 +--- a/crypto/des_generic.c ++++ b/crypto/des_generic.c +@@ -983,8 +983,6 @@ static struct crypto_alg des_algs[2] = { { + .cia_decrypt = des3_ede_decrypt } } + } }; + +-MODULE_ALIAS("des3_ede"); +- + static int __init des_generic_mod_init(void) + { + return crypto_register_algs(des_algs, ARRAY_SIZE(des_algs)); +@@ -1001,4 +999,7 @@ module_exit(des_generic_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("DES & Triple DES EDE Cipher Algorithms"); + MODULE_AUTHOR("Dag Arne Osvik <d...@osvik.no>"); +-MODULE_ALIAS("des"); ++MODULE_ALIAS_CRYPTO("des"); ++MODULE_ALIAS_CRYPTO("des-generic"); ++MODULE_ALIAS_CRYPTO("des3_ede"); ++MODULE_ALIAS_CRYPTO("des3_ede-generic"); +diff --git a/crypto/ecb.c b/crypto/ecb.c +index 935cfef4aa84..12011aff0971 100644 +--- a/crypto/ecb.c ++++ b/crypto/ecb.c +@@ -185,3 +185,4 @@ module_exit(crypto_ecb_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("ECB block cipher algorithm"); ++MODULE_ALIAS_CRYPTO("ecb"); +diff --git a/crypto/eseqiv.c b/crypto/eseqiv.c +index bf7ab4a89493..f116fae766f8 100644 +--- a/crypto/eseqiv.c ++++ b/crypto/eseqiv.c +@@ -267,3 +267,4 @@ module_exit(eseqiv_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Encrypted Sequence Number IV Generator"); ++MODULE_ALIAS_CRYPTO("eseqiv"); +diff --git a/crypto/fcrypt.c b/crypto/fcrypt.c +index 021d7fec6bc8..77286ea28865 100644 +--- a/crypto/fcrypt.c ++++ b/crypto/fcrypt.c +@@ -420,3 +420,4 @@ module_exit(fcrypt_mod_fini); + MODULE_LICENSE("Dual BSD/GPL"); + MODULE_DESCRIPTION("FCrypt Cipher Algorithm"); + MODULE_AUTHOR("David Howells <dhowe...@redhat.com>"); ++MODULE_ALIAS_CRYPTO("fcrypt"); +diff --git a/crypto/gcm.c b/crypto/gcm.c +index 276cdac567b6..2e403f6138c1 100644 +--- a/crypto/gcm.c ++++ b/crypto/gcm.c +@@ -1441,6 +1441,7 @@ module_exit(crypto_gcm_module_exit); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Galois/Counter Mode"); + MODULE_AUTHOR("Mikko Herranen <m...@iki.fi>"); +-MODULE_ALIAS("gcm_base"); +-MODULE_ALIAS("rfc4106"); +-MODULE_ALIAS("rfc4543"); ++MODULE_ALIAS_CRYPTO("gcm_base"); ++MODULE_ALIAS_CRYPTO("rfc4106"); ++MODULE_ALIAS_CRYPTO("rfc4543"); ++MODULE_ALIAS_CRYPTO("gcm"); +diff --git a/crypto/ghash-generic.c b/crypto/ghash-generic.c +index 9d3f0c69a86f..bac70995e064 100644 +--- a/crypto/ghash-generic.c ++++ b/crypto/ghash-generic.c +@@ -172,4 +172,5 @@ module_exit(ghash_mod_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("GHASH Message Digest Algorithm"); +-MODULE_ALIAS("ghash"); ++MODULE_ALIAS_CRYPTO("ghash"); ++MODULE_ALIAS_CRYPTO("ghash-generic"); +diff --git a/crypto/hmac.c b/crypto/hmac.c +index e392219ddc61..72e38c098bb3 100644 +--- a/crypto/hmac.c ++++ b/crypto/hmac.c +@@ -268,3 +268,4 @@ module_exit(hmac_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("HMAC hash algorithm"); ++MODULE_ALIAS_CRYPTO("hmac"); +diff --git a/crypto/khazad.c b/crypto/khazad.c +index 60e7cd66facc..873eb5ded6d7 100644 +--- a/crypto/khazad.c ++++ b/crypto/khazad.c +@@ -880,3 +880,4 @@ module_exit(khazad_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Khazad Cryptographic Algorithm"); ++MODULE_ALIAS_CRYPTO("khazad"); +diff --git a/crypto/krng.c b/crypto/krng.c +index a2d2b72fc135..0224841b6579 100644 +--- a/crypto/krng.c ++++ b/crypto/krng.c +@@ -62,4 +62,5 @@ module_exit(krng_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Kernel Random Number Generator"); +-MODULE_ALIAS("stdrng"); ++MODULE_ALIAS_CRYPTO("stdrng"); ++MODULE_ALIAS_CRYPTO("krng"); +diff --git a/crypto/lrw.c b/crypto/lrw.c +index ba42acc4deba..6f9908a7ebcb 100644 +--- a/crypto/lrw.c ++++ b/crypto/lrw.c +@@ -400,3 +400,4 @@ module_exit(crypto_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("LRW block cipher mode"); ++MODULE_ALIAS_CRYPTO("lrw"); +diff --git a/crypto/lz4.c b/crypto/lz4.c +index 34d072b72a73..aefbceaf3104 100644 +--- a/crypto/lz4.c ++++ b/crypto/lz4.c +@@ -104,3 +104,4 @@ module_exit(lz4_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("LZ4 Compression Algorithm"); ++MODULE_ALIAS_CRYPTO("lz4"); +diff --git a/crypto/lz4hc.c b/crypto/lz4hc.c +index 9218b3fed5e3..a1d3b5bd3d85 100644 +--- a/crypto/lz4hc.c ++++ b/crypto/lz4hc.c +@@ -104,3 +104,4 @@ module_exit(lz4hc_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("LZ4HC Compression Algorithm"); ++MODULE_ALIAS_CRYPTO("lz4hc"); +diff --git a/crypto/lzo.c b/crypto/lzo.c +index a8ff2f778dc4..4b3e92525dac 100644 +--- a/crypto/lzo.c ++++ b/crypto/lzo.c +@@ -107,3 +107,4 @@ module_exit(lzo_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("LZO Compression Algorithm"); ++MODULE_ALIAS_CRYPTO("lzo"); +diff --git a/crypto/mcryptd.c b/crypto/mcryptd.c +index b39fbd530102..a8e870444ea9 100644 +--- a/crypto/mcryptd.c ++++ b/crypto/mcryptd.c +@@ -703,3 +703,4 @@ module_exit(mcryptd_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Software async multibuffer crypto daemon"); ++MODULE_ALIAS_CRYPTO("mcryptd"); +diff --git a/crypto/md4.c b/crypto/md4.c +index 0477a6a01d58..3515af425cc9 100644 +--- a/crypto/md4.c ++++ b/crypto/md4.c +@@ -255,4 +255,4 @@ module_exit(md4_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("MD4 Message Digest Algorithm"); +- ++MODULE_ALIAS_CRYPTO("md4"); +diff --git a/crypto/md5.c b/crypto/md5.c +index 7febeaab923b..36f5e5b103f3 100644 +--- a/crypto/md5.c ++++ b/crypto/md5.c +@@ -168,3 +168,4 @@ module_exit(md5_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("MD5 Message Digest Algorithm"); ++MODULE_ALIAS_CRYPTO("md5"); +diff --git a/crypto/michael_mic.c b/crypto/michael_mic.c +index 079b761bc70d..46195e0d0f4d 100644 +--- a/crypto/michael_mic.c ++++ b/crypto/michael_mic.c +@@ -184,3 +184,4 @@ module_exit(michael_mic_exit); + MODULE_LICENSE("GPL v2"); + MODULE_DESCRIPTION("Michael MIC"); + MODULE_AUTHOR("Jouni Malinen <j...@w1.fi>"); ++MODULE_ALIAS_CRYPTO("michael_mic"); +diff --git a/crypto/pcbc.c b/crypto/pcbc.c +index d1b8bdfb5855..f654965f0933 100644 +--- a/crypto/pcbc.c ++++ b/crypto/pcbc.c +@@ -295,3 +295,4 @@ module_exit(crypto_pcbc_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("PCBC block cipher algorithm"); ++MODULE_ALIAS_CRYPTO("pcbc"); +diff --git a/crypto/pcrypt.c b/crypto/pcrypt.c +index 309d345ead95..c305d4112735 100644 +--- a/crypto/pcrypt.c ++++ b/crypto/pcrypt.c +@@ -565,3 +565,4 @@ module_exit(pcrypt_exit); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Steffen Klassert <steffen.klass...@secunet.com>"); + MODULE_DESCRIPTION("Parallel crypto wrapper"); ++MODULE_ALIAS_CRYPTO("pcrypt"); +diff --git a/crypto/rmd128.c b/crypto/rmd128.c +index 8a0f68b7f257..049486ede938 100644 +--- a/crypto/rmd128.c ++++ b/crypto/rmd128.c +@@ -327,3 +327,4 @@ module_exit(rmd128_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Adrian-Ken Rueegsegger <k...@codelabs.ch>"); + MODULE_DESCRIPTION("RIPEMD-128 Message Digest"); ++MODULE_ALIAS_CRYPTO("rmd128"); +diff --git a/crypto/rmd160.c b/crypto/rmd160.c +index 525d7bb752cf..de585e51d455 100644 +--- a/crypto/rmd160.c ++++ b/crypto/rmd160.c +@@ -371,3 +371,4 @@ module_exit(rmd160_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Adrian-Ken Rueegsegger <k...@codelabs.ch>"); + MODULE_DESCRIPTION("RIPEMD-160 Message Digest"); ++MODULE_ALIAS_CRYPTO("rmd160"); +diff --git a/crypto/rmd256.c b/crypto/rmd256.c +index 69293d9b56e0..4ec02a754e09 100644 +--- a/crypto/rmd256.c ++++ b/crypto/rmd256.c +@@ -346,3 +346,4 @@ module_exit(rmd256_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Adrian-Ken Rueegsegger <k...@codelabs.ch>"); + MODULE_DESCRIPTION("RIPEMD-256 Message Digest"); ++MODULE_ALIAS_CRYPTO("rmd256"); +diff --git a/crypto/rmd320.c b/crypto/rmd320.c +index 09f97dfdfbba..770f2cb369f8 100644 +--- a/crypto/rmd320.c ++++ b/crypto/rmd320.c +@@ -395,3 +395,4 @@ module_exit(rmd320_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Adrian-Ken Rueegsegger <k...@codelabs.ch>"); + MODULE_DESCRIPTION("RIPEMD-320 Message Digest"); ++MODULE_ALIAS_CRYPTO("rmd320"); +diff --git a/crypto/salsa20_generic.c b/crypto/salsa20_generic.c +index 9a4770c02284..f550b5d94630 100644 +--- a/crypto/salsa20_generic.c ++++ b/crypto/salsa20_generic.c +@@ -248,4 +248,5 @@ module_exit(salsa20_generic_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION ("Salsa20 stream cipher algorithm"); +-MODULE_ALIAS("salsa20"); ++MODULE_ALIAS_CRYPTO("salsa20"); ++MODULE_ALIAS_CRYPTO("salsa20-generic"); +diff --git a/crypto/seed.c b/crypto/seed.c +index 9c904d6d2151..c6ba8438be43 100644 +--- a/crypto/seed.c ++++ b/crypto/seed.c +@@ -476,3 +476,4 @@ module_exit(seed_fini); + MODULE_DESCRIPTION("SEED Cipher Algorithm"); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Hye-Shik Chang <pe...@freebsd.org>, Kim Hyun <h...@kisa.or.kr>"); ++MODULE_ALIAS_CRYPTO("seed"); +diff --git a/crypto/seqiv.c b/crypto/seqiv.c +index ee190fcedcd2..9daa854cc485 100644 +--- a/crypto/seqiv.c ++++ b/crypto/seqiv.c +@@ -362,3 +362,4 @@ module_exit(seqiv_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Sequence Number IV Generator"); ++MODULE_ALIAS_CRYPTO("seqiv"); +diff --git a/crypto/serpent_generic.c b/crypto/serpent_generic.c +index 7ddbd7e88859..94970a794975 100644 +--- a/crypto/serpent_generic.c ++++ b/crypto/serpent_generic.c +@@ -665,5 +665,6 @@ module_exit(serpent_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Serpent and tnepres (kerneli compatible serpent reversed) Cipher Algorithm"); + MODULE_AUTHOR("Dag Arne Osvik <os...@ii.uib.no>"); +-MODULE_ALIAS("tnepres"); +-MODULE_ALIAS("serpent"); ++MODULE_ALIAS_CRYPTO("tnepres"); ++MODULE_ALIAS_CRYPTO("serpent"); ++MODULE_ALIAS_CRYPTO("serpent-generic"); +diff --git a/crypto/sha1_generic.c b/crypto/sha1_generic.c +index 7bb047432782..a3e50c37eb6f 100644 +--- a/crypto/sha1_generic.c ++++ b/crypto/sha1_generic.c +@@ -153,4 +153,5 @@ module_exit(sha1_generic_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm"); + +-MODULE_ALIAS("sha1"); ++MODULE_ALIAS_CRYPTO("sha1"); ++MODULE_ALIAS_CRYPTO("sha1-generic"); +diff --git a/crypto/sha256_generic.c b/crypto/sha256_generic.c +index 65e7b76b057f..b001ff5c2efc 100644 +--- a/crypto/sha256_generic.c ++++ b/crypto/sha256_generic.c +@@ -384,5 +384,7 @@ module_exit(sha256_generic_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm"); + +-MODULE_ALIAS("sha224"); +-MODULE_ALIAS("sha256"); ++MODULE_ALIAS_CRYPTO("sha224"); ++MODULE_ALIAS_CRYPTO("sha224-generic"); ++MODULE_ALIAS_CRYPTO("sha256"); ++MODULE_ALIAS_CRYPTO("sha256-generic"); +diff --git a/crypto/sha512_generic.c b/crypto/sha512_generic.c +index 95db67197cd9..1c3c3767e079 100644 +--- a/crypto/sha512_generic.c ++++ b/crypto/sha512_generic.c +@@ -288,5 +288,7 @@ module_exit(sha512_generic_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("SHA-512 and SHA-384 Secure Hash Algorithms"); + +-MODULE_ALIAS("sha384"); +-MODULE_ALIAS("sha512"); ++MODULE_ALIAS_CRYPTO("sha384"); ++MODULE_ALIAS_CRYPTO("sha384-generic"); ++MODULE_ALIAS_CRYPTO("sha512"); ++MODULE_ALIAS_CRYPTO("sha512-generic"); +diff --git a/crypto/tea.c b/crypto/tea.c +index 0a572323ee4a..b70b441c7d1e 100644 +--- a/crypto/tea.c ++++ b/crypto/tea.c +@@ -270,8 +270,9 @@ static void __exit tea_mod_fini(void) + crypto_unregister_algs(tea_algs, ARRAY_SIZE(tea_algs)); + } + +-MODULE_ALIAS("xtea"); +-MODULE_ALIAS("xeta"); ++MODULE_ALIAS_CRYPTO("tea"); ++MODULE_ALIAS_CRYPTO("xtea"); ++MODULE_ALIAS_CRYPTO("xeta"); + + module_init(tea_mod_init); + module_exit(tea_mod_fini); +diff --git a/crypto/tgr192.c b/crypto/tgr192.c +index 3c7af0d1ff7a..321bc6ff2a9d 100644 +--- a/crypto/tgr192.c ++++ b/crypto/tgr192.c +@@ -676,8 +676,9 @@ static void __exit tgr192_mod_fini(void) + crypto_unregister_shashes(tgr_algs, ARRAY_SIZE(tgr_algs)); + } + +-MODULE_ALIAS("tgr160"); +-MODULE_ALIAS("tgr128"); ++MODULE_ALIAS_CRYPTO("tgr192"); ++MODULE_ALIAS_CRYPTO("tgr160"); ++MODULE_ALIAS_CRYPTO("tgr128"); + + module_init(tgr192_mod_init); + module_exit(tgr192_mod_fini); +diff --git a/crypto/twofish_generic.c b/crypto/twofish_generic.c +index 2d5000552d0f..ebf7a3efb572 100644 +--- a/crypto/twofish_generic.c ++++ b/crypto/twofish_generic.c +@@ -211,4 +211,5 @@ module_exit(twofish_mod_fini); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION ("Twofish Cipher Algorithm"); +-MODULE_ALIAS("twofish"); ++MODULE_ALIAS_CRYPTO("twofish"); ++MODULE_ALIAS_CRYPTO("twofish-generic"); +diff --git a/crypto/vmac.c b/crypto/vmac.c +index d84c24bd7ff7..df76a816cfb2 100644 +--- a/crypto/vmac.c ++++ b/crypto/vmac.c +@@ -713,3 +713,4 @@ module_exit(vmac_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("VMAC hash algorithm"); ++MODULE_ALIAS_CRYPTO("vmac"); +diff --git a/crypto/wp512.c b/crypto/wp512.c +index ec64e7762fbb..7ee5a043a988 100644 +--- a/crypto/wp512.c ++++ b/crypto/wp512.c +@@ -1167,8 +1167,9 @@ static void __exit wp512_mod_fini(void) + crypto_unregister_shashes(wp_algs, ARRAY_SIZE(wp_algs)); + } + +-MODULE_ALIAS("wp384"); +-MODULE_ALIAS("wp256"); ++MODULE_ALIAS_CRYPTO("wp512"); ++MODULE_ALIAS_CRYPTO("wp384"); ++MODULE_ALIAS_CRYPTO("wp256"); + + module_init(wp512_mod_init); + module_exit(wp512_mod_fini); +diff --git a/crypto/xcbc.c b/crypto/xcbc.c +index a5fbdf3738cf..df90b332554c 100644 +--- a/crypto/xcbc.c ++++ b/crypto/xcbc.c +@@ -286,3 +286,4 @@ module_exit(crypto_xcbc_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("XCBC keyed hash algorithm"); ++MODULE_ALIAS_CRYPTO("xcbc"); +diff --git a/crypto/xts.c b/crypto/xts.c +index ca1608f44cb5..f6fd43f100c8 100644 +--- a/crypto/xts.c ++++ b/crypto/xts.c +@@ -362,3 +362,4 @@ module_exit(crypto_module_exit); + + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("XTS block cipher mode"); ++MODULE_ALIAS_CRYPTO("xts"); +diff --git a/crypto/zlib.c b/crypto/zlib.c +index c9ee681d57fd..0eefa9d237ac 100644 +--- a/crypto/zlib.c ++++ b/crypto/zlib.c +@@ -378,3 +378,4 @@ module_exit(zlib_mod_fini); + MODULE_LICENSE("GPL"); + MODULE_DESCRIPTION("Zlib Compression Algorithm"); + MODULE_AUTHOR("Sony Corporation"); ++MODULE_ALIAS_CRYPTO("zlib"); +diff --git a/drivers/acpi/device_pm.c b/drivers/acpi/device_pm.c +index 93b71420a046..6341e668f362 100644 +--- a/drivers/acpi/device_pm.c ++++ b/drivers/acpi/device_pm.c +@@ -680,13 +680,21 @@ static int acpi_device_wakeup(struct acpi_device *adev, u32 target_state, + if (error) + return error; + ++ if (adev->wakeup.flags.enabled) ++ return 0; ++ + res = acpi_enable_gpe(wakeup->gpe_device, wakeup->gpe_number); +- if (ACPI_FAILURE(res)) { ++ if (ACPI_SUCCESS(res)) { ++ adev->wakeup.flags.enabled = 1; ++ } else { + acpi_disable_wakeup_device_power(adev); + return -EIO; + } + } else { +- acpi_disable_gpe(wakeup->gpe_device, wakeup->gpe_number); ++ if (adev->wakeup.flags.enabled) { ++ acpi_disable_gpe(wakeup->gpe_device, wakeup->gpe_number); ++ adev->wakeup.flags.enabled = 0; ++ } + acpi_disable_wakeup_device_power(adev); + } + return 0; +diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c +index 0f8538f238b6..0ffd3c930bed 100644 +--- a/drivers/ata/ahci_xgene.c ++++ b/drivers/ata/ahci_xgene.c +@@ -188,7 +188,7 @@ static unsigned int xgene_ahci_read_id(struct ata_device *dev, + * + * Clear reserved bit 8 (DEVSLP bit) as we don't support DEVSLP + */ +- id[ATA_ID_FEATURE_SUPP] &= ~(1 << 8); ++ id[ATA_ID_FEATURE_SUPP] &= cpu_to_le16(~(1 << 8)); + + return 0; + } +diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c +index c5ba15af87d3..485f7eab0d4b 100644 +--- a/drivers/ata/libata-core.c ++++ b/drivers/ata/libata-core.c +@@ -4740,7 +4740,10 @@ static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) + return NULL; + + for (i = 0, tag = ap->last_tag + 1; i < max_queue; i++, tag++) { +- tag = tag < max_queue ? tag : 0; ++ if (ap->flags & ATA_FLAG_LOWTAG) ++ tag = i; ++ else ++ tag = tag < max_queue ? tag : 0; + + /* the last tag is reserved for internal command. */ + if (tag == ATA_TAG_INTERNAL) +diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c +index db90aa35cb71..2e86e3b85266 100644 +--- a/drivers/ata/libata-sff.c ++++ b/drivers/ata/libata-sff.c +@@ -1333,7 +1333,19 @@ void ata_sff_flush_pio_task(struct ata_port *ap) + DPRINTK("ENTER\n"); + + cancel_delayed_work_sync(&ap->sff_pio_task); ++ ++ /* ++ * We wanna reset the HSM state to IDLE. If we do so without ++ * grabbing the port lock, critical sections protected by it which ++ * expect the HSM state to stay stable may get surprised. For ++ * example, we may set IDLE in between the time ++ * __ata_sff_port_intr() checks for HSM_ST_IDLE and before it calls ++ * ata_sff_hsm_move() causing ata_sff_hsm_move() to BUG(). ++ */ ++ spin_lock_irq(ap->lock); + ap->hsm_task_state = HSM_ST_IDLE; ++ spin_unlock_irq(ap->lock); ++ + ap->sff_pio_task_link = NULL; + + if (ata_msg_ctl(ap)) +diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c +index 0bb2cabd2197..4ebaa1e7b2d3 100644 +--- a/drivers/ata/sata_dwc_460ex.c ++++ b/drivers/ata/sata_dwc_460ex.c +@@ -797,7 +797,7 @@ static int dma_dwc_init(struct sata_dwc_device *hsdev, int irq) + if (err) { + dev_err(host_pvt.dwc_dev, "%s: dma_request_interrupts returns" + " %d\n", __func__, err); +- goto error_out; ++ return err; + } + + /* Enabe DMA */ +@@ -808,11 +808,6 @@ static int dma_dwc_init(struct sata_dwc_device *hsdev, int irq) + sata_dma_regs); + + return 0; +- +-error_out: +- dma_dwc_exit(hsdev); +- +- return err; + } + + static int sata_dwc_scr_read(struct ata_link *link, unsigned int scr, u32 *val) +@@ -1662,7 +1657,7 @@ static int sata_dwc_probe(struct platform_device *ofdev) + char *ver = (char *)&versionr; + u8 *base = NULL; + int err = 0; +- int irq, rc; ++ int irq; + struct ata_host *host; + struct ata_port_info pi = sata_dwc_port_info[0]; + const struct ata_port_info *ppi[] = { &pi, NULL }; +@@ -1725,7 +1720,7 @@ static int sata_dwc_probe(struct platform_device *ofdev) + if (irq == NO_IRQ) { + dev_err(&ofdev->dev, "no SATA DMA irq\n"); + err = -ENODEV; +- goto error_out; ++ goto error_iomap; + } + + /* Get physical SATA DMA register base address */ +@@ -1734,14 +1729,16 @@ static int sata_dwc_probe(struct platform_device *ofdev) + dev_err(&ofdev->dev, "ioremap failed for AHBDMA register" + " address\n"); + err = -ENODEV; +- goto error_out; ++ goto error_iomap; + } + + /* Save dev for later use in dev_xxx() routines */ + host_pvt.dwc_dev = &ofdev->dev; + + /* Initialize AHB DMAC */ +- dma_dwc_init(hsdev, irq); ++ err = dma_dwc_init(hsdev, irq); ++ if (err) ++ goto error_dma_iomap; + + /* Enable SATA Interrupts */ + sata_dwc_enable_interrupts(hsdev); +@@ -1759,9 +1756,8 @@ static int sata_dwc_probe(struct platform_device *ofdev) + * device discovery process, invoking our port_start() handler & + * error_handler() to execute a dummy Softreset EH session + */ +- rc = ata_host_activate(host, irq, sata_dwc_isr, 0, &sata_dwc_sht); +- +- if (rc != 0) ++ err = ata_host_activate(host, irq, sata_dwc_isr, 0, &sata_dwc_sht); ++ if (err) + dev_err(&ofdev->dev, "failed to activate host"); + + dev_set_drvdata(&ofdev->dev, host); +@@ -1770,7 +1766,8 @@ static int sata_dwc_probe(struct platform_device *ofdev) + error_out: + /* Free SATA DMA resources */ + dma_dwc_exit(hsdev); +- ++error_dma_iomap: ++ iounmap((void __iomem *)host_pvt.sata_dma_regs); + error_iomap: + iounmap(base); + error_kmalloc: +@@ -1791,6 +1788,7 @@ static int sata_dwc_remove(struct platform_device *ofdev) + /* Free SATA DMA resources */ + dma_dwc_exit(hsdev); + ++ iounmap((void __iomem *)host_pvt.sata_dma_regs); + iounmap(hsdev->reg_base); + kfree(hsdev); + kfree(host); +diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c +index d81b20ddb527..ea655949023f 100644 +--- a/drivers/ata/sata_sil24.c ++++ b/drivers/ata/sata_sil24.c +@@ -246,7 +246,7 @@ enum { + /* host flags */ + SIL24_COMMON_FLAGS = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA | + ATA_FLAG_NCQ | ATA_FLAG_ACPI_SATA | +- ATA_FLAG_AN | ATA_FLAG_PMP, ++ ATA_FLAG_AN | ATA_FLAG_PMP | ATA_FLAG_LOWTAG, + SIL24_FLAG_PCIX_IRQ_WOC = (1 << 24), /* IRQ loss errata on PCI-X */ + + IRQ_STAT_4PORTS = 0xf, +diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c +index 26c3779d871d..d29f5ffdb0f4 100644 +--- a/drivers/bus/mvebu-mbus.c ++++ b/drivers/bus/mvebu-mbus.c +@@ -182,12 +182,25 @@ static void mvebu_mbus_disable_window(struct mvebu_mbus_state *mbus, + } + + /* Checks whether the given window number is available */ ++ ++/* On Armada XP, 375 and 38x the MBus window 13 has the remap ++ * capability, like windows 0 to 7. However, the mvebu-mbus driver ++ * isn't currently taking into account this special case, which means ++ * that when window 13 is actually used, the remap registers are left ++ * to 0, making the device using this MBus window unavailable. The ++ * quick fix for stable is to not use window 13. A follow up patch ++ * will correctly handle this window. ++*/ + static int mvebu_mbus_window_is_free(struct mvebu_mbus_state *mbus, + const int win) + { + void __iomem *addr = mbus->mbuswins_base + + mbus->soc->win_cfg_offset(win); + u32 ctrl = readl(addr + WIN_CTRL_OFF); ++ ++ if (win == 13) ++ return false; ++ + return !(ctrl & WIN_CTRL_ENABLE); + } + +diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c +index 9403061a2acc..83564c9cfdbe 100644 +--- a/drivers/clocksource/exynos_mct.c ++++ b/drivers/clocksource/exynos_mct.c +@@ -97,8 +97,8 @@ static void exynos4_mct_write(unsigned int value, unsigned long offset) + writel_relaxed(value, reg_base + offset); + + if (likely(offset >= EXYNOS4_MCT_L_BASE(0))) { +- stat_addr = (offset & ~EXYNOS4_MCT_L_MASK) + MCT_L_WSTAT_OFFSET; +- switch (offset & EXYNOS4_MCT_L_MASK) { ++ stat_addr = (offset & EXYNOS4_MCT_L_MASK) + MCT_L_WSTAT_OFFSET; ++ switch (offset & ~EXYNOS4_MCT_L_MASK) { + case MCT_L_TCON_OFFSET: + mask = 1 << 3; /* L_TCON write status */ + break; +diff --git a/drivers/crypto/padlock-aes.c b/drivers/crypto/padlock-aes.c +index 633ba945e153..c178ed8c3908 100644 +--- a/drivers/crypto/padlock-aes.c ++++ b/drivers/crypto/padlock-aes.c +@@ -563,4 +563,4 @@ MODULE_DESCRIPTION("VIA PadLock AES algorithm support"); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Michal Ludvig"); + +-MODULE_ALIAS("aes"); ++MODULE_ALIAS_CRYPTO("aes"); +diff --git a/drivers/crypto/padlock-sha.c b/drivers/crypto/padlock-sha.c +index bace885634f2..95f7d27ce491 100644 +--- a/drivers/crypto/padlock-sha.c ++++ b/drivers/crypto/padlock-sha.c +@@ -593,7 +593,7 @@ MODULE_DESCRIPTION("VIA PadLock SHA1/SHA256 algorithms support."); + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("Michal Ludvig"); + +-MODULE_ALIAS("sha1-all"); +-MODULE_ALIAS("sha256-all"); +-MODULE_ALIAS("sha1-padlock"); +-MODULE_ALIAS("sha256-padlock"); ++MODULE_ALIAS_CRYPTO("sha1-all"); ++MODULE_ALIAS_CRYPTO("sha256-all"); ++MODULE_ALIAS_CRYPTO("sha1-padlock"); ++MODULE_ALIAS_CRYPTO("sha256-padlock"); +diff --git a/drivers/crypto/qat/qat_common/adf_ctl_drv.c b/drivers/crypto/qat/qat_common/adf_ctl_drv.c +index 244d73378f0e..7ee93f881db6 100644 +--- a/drivers/crypto/qat/qat_common/adf_ctl_drv.c ++++ b/drivers/crypto/qat/qat_common/adf_ctl_drv.c +@@ -52,6 +52,7 @@ + #include <linux/pci.h> + #include <linux/cdev.h> + #include <linux/uaccess.h> ++#include <linux/crypto.h> + + #include "adf_accel_devices.h" + #include "adf_common_drv.h" +@@ -487,4 +488,4 @@ module_exit(adf_unregister_ctl_device_driver); + MODULE_LICENSE("Dual BSD/GPL"); + MODULE_AUTHOR("Intel"); + MODULE_DESCRIPTION("Intel(R) QuickAssist Technology"); +-MODULE_ALIAS("intel_qat"); ++MODULE_ALIAS_CRYPTO("intel_qat"); +diff --git a/drivers/crypto/ux500/cryp/cryp_core.c b/drivers/crypto/ux500/cryp/cryp_core.c +index 92105f3dc8e0..e4cea7c45142 100644 +--- a/drivers/crypto/ux500/cryp/cryp_core.c ++++ b/drivers/crypto/ux500/cryp/cryp_core.c +@@ -1810,7 +1810,7 @@ module_exit(ux500_cryp_mod_fini); + module_param(cryp_mode, int, 0); + + MODULE_DESCRIPTION("Driver for ST-Ericsson UX500 CRYP crypto engine."); +-MODULE_ALIAS("aes-all"); +-MODULE_ALIAS("des-all"); ++MODULE_ALIAS_CRYPTO("aes-all"); ++MODULE_ALIAS_CRYPTO("des-all"); + + MODULE_LICENSE("GPL"); +diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c +index 1c73f4fbc252..8e5e0187506f 100644 +--- a/drivers/crypto/ux500/hash/hash_core.c ++++ b/drivers/crypto/ux500/hash/hash_core.c +@@ -1995,7 +1995,7 @@ module_exit(ux500_hash_mod_fini); + MODULE_DESCRIPTION("Driver for ST-Ericsson UX500 HASH engine."); + MODULE_LICENSE("GPL"); + +-MODULE_ALIAS("sha1-all"); +-MODULE_ALIAS("sha256-all"); +-MODULE_ALIAS("hmac-sha1-all"); +-MODULE_ALIAS("hmac-sha256-all"); ++MODULE_ALIAS_CRYPTO("sha1-all"); ++MODULE_ALIAS_CRYPTO("sha256-all"); ++MODULE_ALIAS_CRYPTO("hmac-sha1-all"); ++MODULE_ALIAS_CRYPTO("hmac-sha256-all"); +diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c +index 2de5f5f4ba45..fd76933eed04 100644 +--- a/drivers/gpu/drm/i915/i915_gem.c ++++ b/drivers/gpu/drm/i915/i915_gem.c +@@ -5144,7 +5144,7 @@ static bool mutex_is_locked_by(struct mutex *mutex, struct task_struct *task) + if (!mutex_is_locked(mutex)) + return false; + +-#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_MUTEXES) ++#if defined(CONFIG_SMP) && !defined(CONFIG_DEBUG_MUTEXES) + return mutex->owner == task; + #else + /* Since UP may be pre-empted, we cannot assume that we own the lock */ +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index cadc3bcf1de2..31b96643b59c 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -10019,7 +10019,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, + if (obj->tiling_mode != work->old_fb_obj->tiling_mode) + /* vlv: DISPLAY_FLIP fails to change tiling */ + ring = NULL; +- } else if (IS_IVYBRIDGE(dev)) { ++ } else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) { + ring = &dev_priv->ring[BCS]; + } else if (INTEL_INFO(dev)->gen >= 7) { + ring = obj->ring; +diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c +index 850de57069be..121aff6a3b41 100644 +--- a/drivers/gpu/drm/radeon/radeon_asic.c ++++ b/drivers/gpu/drm/radeon/radeon_asic.c +@@ -333,6 +333,20 @@ static struct radeon_asic_ring r300_gfx_ring = { + .set_wptr = &r100_gfx_set_wptr, + }; + ++static struct radeon_asic_ring rv515_gfx_ring = { ++ .ib_execute = &r100_ring_ib_execute, ++ .emit_fence = &r300_fence_ring_emit, ++ .emit_semaphore = &r100_semaphore_ring_emit, ++ .cs_parse = &r300_cs_parse, ++ .ring_start = &rv515_ring_start, ++ .ring_test = &r100_ring_test, ++ .ib_test = &r100_ib_test, ++ .is_lockup = &r100_gpu_is_lockup, ++ .get_rptr = &r100_gfx_get_rptr, ++ .get_wptr = &r100_gfx_get_wptr, ++ .set_wptr = &r100_gfx_set_wptr, ++}; ++ + static struct radeon_asic r300_asic = { + .init = &r300_init, + .fini = &r300_fini, +@@ -748,7 +762,7 @@ static struct radeon_asic rv515_asic = { + .set_page = &rv370_pcie_gart_set_page, + }, + .ring = { +- [RADEON_RING_TYPE_GFX_INDEX] = &r300_gfx_ring ++ [RADEON_RING_TYPE_GFX_INDEX] = &rv515_gfx_ring + }, + .irq = { + .set = &rs600_irq_set, +@@ -814,7 +828,7 @@ static struct radeon_asic r520_asic = { + .set_page = &rv370_pcie_gart_set_page, + }, + .ring = { +- [RADEON_RING_TYPE_GFX_INDEX] = &r300_gfx_ring ++ [RADEON_RING_TYPE_GFX_INDEX] = &rv515_gfx_ring + }, + .irq = { + .set = &rs600_irq_set, +diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c +index 32522cc940a1..f7da8fe96a66 100644 +--- a/drivers/gpu/drm/radeon/radeon_pm.c ++++ b/drivers/gpu/drm/radeon/radeon_pm.c +@@ -1287,8 +1287,39 @@ dpm_failed: + return ret; + } + ++struct radeon_dpm_quirk { ++ u32 chip_vendor; ++ u32 chip_device; ++ u32 subsys_vendor; ++ u32 subsys_device; ++}; ++ ++/* cards with dpm stability problems */ ++static struct radeon_dpm_quirk radeon_dpm_quirk_list[] = { ++ /* TURKS - https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1386534 */ ++ { PCI_VENDOR_ID_ATI, 0x6759, 0x1682, 0x3195 }, ++ /* TURKS - https://bugzilla.kernel.org/show_bug.cgi?id=83731 */ ++ { PCI_VENDOR_ID_ATI, 0x6840, 0x1179, 0xfb81 }, ++ { 0, 0, 0, 0 }, ++}; ++ + int radeon_pm_init(struct radeon_device *rdev) + { ++ struct radeon_dpm_quirk *p = radeon_dpm_quirk_list; ++ bool disable_dpm = false; ++ ++ /* Apply dpm quirks */ ++ while (p && p->chip_device != 0) { ++ if (rdev->pdev->vendor == p->chip_vendor && ++ rdev->pdev->device == p->chip_device && ++ rdev->pdev->subsystem_vendor == p->subsys_vendor && ++ rdev->pdev->subsystem_device == p->subsys_device) { ++ disable_dpm = true; ++ break; ++ } ++ ++p; ++ } ++ + /* enable dpm on rv6xx+ */ + switch (rdev->family) { + case CHIP_RV610: +@@ -1344,6 +1375,8 @@ int radeon_pm_init(struct radeon_device *rdev) + (!(rdev->flags & RADEON_IS_IGP)) && + (!rdev->smc_fw)) + rdev->pm.pm_method = PM_METHOD_PROFILE; ++ else if (disable_dpm && (radeon_dpm == -1)) ++ rdev->pm.pm_method = PM_METHOD_PROFILE; + else if (radeon_dpm == 0) + rdev->pm.pm_method = PM_METHOD_PROFILE; + else +diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c +index 676e6c2ba90a..2b70d3eca8fd 100644 +--- a/drivers/gpu/drm/radeon/si_dpm.c ++++ b/drivers/gpu/drm/radeon/si_dpm.c +@@ -2908,6 +2908,22 @@ static int si_init_smc_spll_table(struct radeon_device *rdev) + return ret; + } + ++struct si_dpm_quirk { ++ u32 chip_vendor; ++ u32 chip_device; ++ u32 subsys_vendor; ++ u32 subsys_device; ++ u32 max_sclk; ++ u32 max_mclk; ++}; ++ ++/* cards with dpm stability problems */ ++static struct si_dpm_quirk si_dpm_quirk_list[] = { ++ /* PITCAIRN - https://bugs.freedesktop.org/show_bug.cgi?id=76490 */ ++ { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 }, ++ { 0, 0, 0, 0 }, ++}; ++ + static void si_apply_state_adjust_rules(struct radeon_device *rdev, + struct radeon_ps *rps) + { +@@ -2918,7 +2934,22 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, + u32 mclk, sclk; + u16 vddc, vddci; + u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; ++ u32 max_sclk = 0, max_mclk = 0; + int i; ++ struct si_dpm_quirk *p = si_dpm_quirk_list; ++ ++ /* Apply dpm quirks */ ++ while (p && p->chip_device != 0) { ++ if (rdev->pdev->vendor == p->chip_vendor && ++ rdev->pdev->device == p->chip_device && ++ rdev->pdev->subsystem_vendor == p->subsys_vendor && ++ rdev->pdev->subsystem_device == p->subsys_device) { ++ max_sclk = p->max_sclk; ++ max_mclk = p->max_mclk; ++ break; ++ } ++ ++p; ++ } + + if ((rdev->pm.dpm.new_active_crtc_count > 1) || + ni_dpm_vblank_too_short(rdev)) +@@ -2972,6 +3003,14 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, + if (ps->performance_levels[i].mclk > max_mclk_vddc) + ps->performance_levels[i].mclk = max_mclk_vddc; + } ++ if (max_mclk) { ++ if (ps->performance_levels[i].mclk > max_mclk) ++ ps->performance_levels[i].mclk = max_mclk; ++ } ++ if (max_sclk) { ++ if (ps->performance_levels[i].sclk > max_sclk) ++ ps->performance_levels[i].sclk = max_sclk; ++ } + } + + /* XXX validate the min clocks required for display */ +diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c +index cc4f9d80122e..fa22e5ba3d33 100644 +--- a/drivers/irqchip/irq-atmel-aic-common.c ++++ b/drivers/irqchip/irq-atmel-aic-common.c +@@ -28,7 +28,7 @@ + #define AT91_AIC_IRQ_MIN_PRIORITY 0 + #define AT91_AIC_IRQ_MAX_PRIORITY 7 + +-#define AT91_AIC_SRCTYPE GENMASK(7, 6) ++#define AT91_AIC_SRCTYPE GENMASK(6, 5) + #define AT91_AIC_SRCTYPE_LOW (0 << 5) + #define AT91_AIC_SRCTYPE_FALLING (1 << 5) + #define AT91_AIC_SRCTYPE_HIGH (2 << 5) +@@ -74,7 +74,7 @@ int aic_common_set_type(struct irq_data *d, unsigned type, unsigned *val) + return -EINVAL; + } + +- *val &= AT91_AIC_SRCTYPE; ++ *val &= ~AT91_AIC_SRCTYPE; + *val |= aic_type; + + return 0; +diff --git a/drivers/irqchip/irq-omap-intc.c b/drivers/irqchip/irq-omap-intc.c +index 28718d3e8281..c03f140acbae 100644 +--- a/drivers/irqchip/irq-omap-intc.c ++++ b/drivers/irqchip/irq-omap-intc.c +@@ -263,7 +263,7 @@ static int __init omap_init_irq_of(struct device_node *node) + return ret; + } + +-static int __init omap_init_irq_legacy(u32 base) ++static int __init omap_init_irq_legacy(u32 base, struct device_node *node) + { + int j, irq_base; + +@@ -277,7 +277,7 @@ static int __init omap_init_irq_legacy(u32 base) + irq_base = 0; + } + +- domain = irq_domain_add_legacy(NULL, omap_nr_irqs, irq_base, 0, ++ domain = irq_domain_add_legacy(node, omap_nr_irqs, irq_base, 0, + &irq_domain_simple_ops, NULL); + + omap_irq_soft_reset(); +@@ -301,10 +301,26 @@ static int __init omap_init_irq(u32 base, struct device_node *node) + { + int ret; + +- if (node) ++ /* ++ * FIXME legacy OMAP DMA driver sitting under arch/arm/plat-omap/dma.c ++ * depends is still not ready for linear IRQ domains; because of that ++ * we need to temporarily "blacklist" OMAP2 and OMAP3 devices from using ++ * linear IRQ Domain until that driver is finally fixed. ++ */ ++ if (of_device_is_compatible(node, "ti,omap2-intc") || ++ of_device_is_compatible(node, "ti,omap3-intc")) { ++ struct resource res; ++ ++ if (of_address_to_resource(node, 0, &res)) ++ return -ENOMEM; ++ ++ base = res.start; ++ ret = omap_init_irq_legacy(base, node); ++ } else if (node) { + ret = omap_init_irq_of(node); +- else +- ret = omap_init_irq_legacy(base); ++ } else { ++ ret = omap_init_irq_legacy(base, NULL); ++ } + + if (ret == 0) + omap_irq_enable_protection(); +diff --git a/drivers/md/dm-cache-metadata.c b/drivers/md/dm-cache-metadata.c +index 06709257adde..97e3a6c07e31 100644 +--- a/drivers/md/dm-cache-metadata.c ++++ b/drivers/md/dm-cache-metadata.c +@@ -94,6 +94,9 @@ struct cache_disk_superblock { + } __packed; + + struct dm_cache_metadata { ++ atomic_t ref_count; ++ struct list_head list; ++ + struct block_device *bdev; + struct dm_block_manager *bm; + struct dm_space_map *metadata_sm; +@@ -669,10 +672,10 @@ static void unpack_value(__le64 value_le, dm_oblock_t *block, unsigned *flags) + + /*----------------------------------------------------------------*/ + +-struct dm_cache_metadata *dm_cache_metadata_open(struct block_device *bdev, +- sector_t data_block_size, +- bool may_format_device, +- size_t policy_hint_size) ++static struct dm_cache_metadata *metadata_open(struct block_device *bdev, ++ sector_t data_block_size, ++ bool may_format_device, ++ size_t policy_hint_size) + { + int r; + struct dm_cache_metadata *cmd; +@@ -683,6 +686,7 @@ struct dm_cache_metadata *dm_cache_metadata_open(struct block_device *bdev, + return NULL; + } + ++ atomic_set(&cmd->ref_count, 1); + init_rwsem(&cmd->root_lock); + cmd->bdev = bdev; + cmd->data_block_size = data_block_size; +@@ -705,10 +709,95 @@ struct dm_cache_metadata *dm_cache_metadata_open(struct block_device *bdev, + return cmd; + } + ++/* ++ * We keep a little list of ref counted metadata objects to prevent two ++ * different target instances creating separate bufio instances. This is ++ * an issue if a table is reloaded before the suspend. ++ */ ++static DEFINE_MUTEX(table_lock); ++static LIST_HEAD(table); ++ ++static struct dm_cache_metadata *lookup(struct block_device *bdev) ++{ ++ struct dm_cache_metadata *cmd; ++ ++ list_for_each_entry(cmd, &table, list) ++ if (cmd->bdev == bdev) { ++ atomic_inc(&cmd->ref_count); ++ return cmd; ++ } ++ ++ return NULL; ++} ++ ++static struct dm_cache_metadata *lookup_or_open(struct block_device *bdev, ++ sector_t data_block_size, ++ bool may_format_device, ++ size_t policy_hint_size) ++{ ++ struct dm_cache_metadata *cmd, *cmd2; ++ ++ mutex_lock(&table_lock); ++ cmd = lookup(bdev); ++ mutex_unlock(&table_lock); ++ ++ if (cmd) ++ return cmd; ++ ++ cmd = metadata_open(bdev, data_block_size, may_format_device, policy_hint_size); ++ if (cmd) { ++ mutex_lock(&table_lock); ++ cmd2 = lookup(bdev); ++ if (cmd2) { ++ mutex_unlock(&table_lock); ++ __destroy_persistent_data_objects(cmd); ++ kfree(cmd); ++ return cmd2; ++ } ++ list_add(&cmd->list, &table); ++ mutex_unlock(&table_lock); ++ } ++ ++ return cmd; ++} ++ ++static bool same_params(struct dm_cache_metadata *cmd, sector_t data_block_size) ++{ ++ if (cmd->data_block_size != data_block_size) { ++ DMERR("data_block_size (%llu) different from that in metadata (%llu)\n", ++ (unsigned long long) data_block_size, ++ (unsigned long long) cmd->data_block_size); ++ return false; ++ } ++ ++ return true; ++} ++ ++struct dm_cache_metadata *dm_cache_metadata_open(struct block_device *bdev, ++ sector_t data_block_size, ++ bool may_format_device, ++ size_t policy_hint_size) ++{ ++ struct dm_cache_metadata *cmd = lookup_or_open(bdev, data_block_size, ++ may_format_device, policy_hint_size); ++ if (cmd && !same_params(cmd, data_block_size)) { ++ dm_cache_metadata_close(cmd); ++ return NULL; ++ } ++ ++ return cmd; ++} ++ + void dm_cache_metadata_close(struct dm_cache_metadata *cmd) + { +- __destroy_persistent_data_objects(cmd); +- kfree(cmd); ++ if (atomic_dec_and_test(&cmd->ref_count)) { ++ mutex_lock(&table_lock); ++ list_del(&cmd->list); ++ mutex_unlock(&table_lock); ++ ++ __destroy_persistent_data_objects(cmd); ++ kfree(cmd); ++ } + } + + /* +diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c +index da496cfb458d..3baed67cf26f 100644 +--- a/drivers/md/dm-cache-target.c ++++ b/drivers/md/dm-cache-target.c +@@ -222,7 +222,13 @@ struct cache { + struct list_head need_commit_migrations; + sector_t migration_threshold; + wait_queue_head_t migration_wait; +- atomic_t nr_migrations; ++ atomic_t nr_allocated_migrations; ++ ++ /* ++ * The number of in flight migrations that are performing ++ * background io. eg, promotion, writeback. ++ */ ++ atomic_t nr_io_migrations; + + wait_queue_head_t quiescing_wait; + atomic_t quiescing; +@@ -258,7 +264,6 @@ struct cache { + struct dm_deferred_set *all_io_ds; + + mempool_t *migration_pool; +- struct dm_cache_migration *next_migration; + + struct dm_cache_policy *policy; + unsigned policy_nr_args; +@@ -349,10 +354,31 @@ static void free_prison_cell(struct cache *cache, struct dm_bio_prison_cell *cel + dm_bio_prison_free_cell(cache->prison, cell); + } + ++static struct dm_cache_migration *alloc_migration(struct cache *cache) ++{ ++ struct dm_cache_migration *mg; ++ ++ mg = mempool_alloc(cache->migration_pool, GFP_NOWAIT); ++ if (mg) { ++ mg->cache = cache; ++ atomic_inc(&mg->cache->nr_allocated_migrations); ++ } ++ ++ return mg; ++} ++ ++static void free_migration(struct dm_cache_migration *mg) ++{ ++ if (atomic_dec_and_test(&mg->cache->nr_allocated_migrations)) ++ wake_up(&mg->cache->migration_wait); ++ ++ mempool_free(mg, mg->cache->migration_pool); ++} ++ + static int prealloc_data_structs(struct cache *cache, struct prealloc *p) + { + if (!p->mg) { +- p->mg = mempool_alloc(cache->migration_pool, GFP_NOWAIT); ++ p->mg = alloc_migration(cache); + if (!p->mg) + return -ENOMEM; + } +@@ -381,7 +407,7 @@ static void prealloc_free_structs(struct cache *cache, struct prealloc *p) + free_prison_cell(cache, p->cell1); + + if (p->mg) +- mempool_free(p->mg, cache->migration_pool); ++ free_migration(p->mg); + } + + static struct dm_cache_migration *prealloc_get_migration(struct prealloc *p) +@@ -817,24 +843,14 @@ static void remap_to_origin_then_cache(struct cache *cache, struct bio *bio, + * Migration covers moving data from the origin device to the cache, or + * vice versa. + *--------------------------------------------------------------*/ +-static void free_migration(struct dm_cache_migration *mg) +-{ +- mempool_free(mg, mg->cache->migration_pool); +-} +- +-static void inc_nr_migrations(struct cache *cache) ++static void inc_io_migrations(struct cache *cache) + { +- atomic_inc(&cache->nr_migrations); ++ atomic_inc(&cache->nr_io_migrations); + } + +-static void dec_nr_migrations(struct cache *cache) ++static void dec_io_migrations(struct cache *cache) + { +- atomic_dec(&cache->nr_migrations); +- +- /* +- * Wake the worker in case we're suspending the target. +- */ +- wake_up(&cache->migration_wait); ++ atomic_dec(&cache->nr_io_migrations); + } + + static void __cell_defer(struct cache *cache, struct dm_bio_prison_cell *cell, +@@ -857,11 +873,10 @@ static void cell_defer(struct cache *cache, struct dm_bio_prison_cell *cell, + wake_worker(cache); + } + +-static void cleanup_migration(struct dm_cache_migration *mg) ++static void free_io_migration(struct dm_cache_migration *mg) + { +- struct cache *cache = mg->cache; ++ dec_io_migrations(mg->cache); + free_migration(mg); +- dec_nr_migrations(cache); + } + + static void migration_failure(struct dm_cache_migration *mg) +@@ -886,7 +901,7 @@ static void migration_failure(struct dm_cache_migration *mg) + cell_defer(cache, mg->new_ocell, true); + } + +- cleanup_migration(mg); ++ free_io_migration(mg); + } + + static void migration_success_pre_commit(struct dm_cache_migration *mg) +@@ -897,7 +912,7 @@ static void migration_success_pre_commit(struct dm_cache_migration *mg) + if (mg->writeback) { + clear_dirty(cache, mg->old_oblock, mg->cblock); + cell_defer(cache, mg->old_ocell, false); +- cleanup_migration(mg); ++ free_io_migration(mg); + return; + + } else if (mg->demote) { +@@ -907,14 +922,14 @@ static void migration_success_pre_commit(struct dm_cache_migration *mg) + mg->old_oblock); + if (mg->promote) + cell_defer(cache, mg->new_ocell, true); +- cleanup_migration(mg); ++ free_io_migration(mg); + return; + } + } else { + if (dm_cache_insert_mapping(cache->cmd, mg->cblock, mg->new_oblock)) { + DMWARN_LIMIT("promotion failed; couldn't update on disk metadata"); + policy_remove_mapping(cache->policy, mg->new_oblock); +- cleanup_migration(mg); ++ free_io_migration(mg); + return; + } + } +@@ -947,7 +962,7 @@ static void migration_success_post_commit(struct dm_cache_migration *mg) + } else { + if (mg->invalidate) + policy_remove_mapping(cache->policy, mg->old_oblock); +- cleanup_migration(mg); ++ free_io_migration(mg); + } + + } else { +@@ -962,7 +977,7 @@ static void migration_success_post_commit(struct dm_cache_migration *mg) + bio_endio(mg->new_ocell->holder, 0); + cell_defer(cache, mg->new_ocell, false); + } +- cleanup_migration(mg); ++ free_io_migration(mg); + } + } + +@@ -1178,7 +1193,7 @@ static void promote(struct cache *cache, struct prealloc *structs, + mg->new_ocell = cell; + mg->start_jiffies = jiffies; + +- inc_nr_migrations(cache); ++ inc_io_migrations(cache); + quiesce_migration(mg); + } + +@@ -1201,7 +1216,7 @@ static void writeback(struct cache *cache, struct prealloc *structs, + mg->new_ocell = NULL; + mg->start_jiffies = jiffies; + +- inc_nr_migrations(cache); ++ inc_io_migrations(cache); + quiesce_migration(mg); + } + +@@ -1227,7 +1242,7 @@ static void demote_then_promote(struct cache *cache, struct prealloc *structs, + mg->new_ocell = new_ocell; + mg->start_jiffies = jiffies; + +- inc_nr_migrations(cache); ++ inc_io_migrations(cache); + quiesce_migration(mg); + } + +@@ -1254,7 +1269,7 @@ static void invalidate(struct cache *cache, struct prealloc *structs, + mg->new_ocell = NULL; + mg->start_jiffies = jiffies; + +- inc_nr_migrations(cache); ++ inc_io_migrations(cache); + quiesce_migration(mg); + } + +@@ -1320,7 +1335,7 @@ static void process_discard_bio(struct cache *cache, struct bio *bio) + + static bool spare_migration_bandwidth(struct cache *cache) + { +- sector_t current_volume = (atomic_read(&cache->nr_migrations) + 1) * ++ sector_t current_volume = (atomic_read(&cache->nr_io_migrations) + 1) * + cache->sectors_per_block; + return current_volume < cache->migration_threshold; + } +@@ -1670,7 +1685,7 @@ static void stop_quiescing(struct cache *cache) + + static void wait_for_migrations(struct cache *cache) + { +- wait_event(cache->migration_wait, !atomic_read(&cache->nr_migrations)); ++ wait_event(cache->migration_wait, !atomic_read(&cache->nr_allocated_migrations)); + } + + static void stop_worker(struct cache *cache) +@@ -1782,9 +1797,6 @@ static void destroy(struct cache *cache) + { + unsigned i; + +- if (cache->next_migration) +- mempool_free(cache->next_migration, cache->migration_pool); +- + if (cache->migration_pool) + mempool_destroy(cache->migration_pool); + +@@ -2292,7 +2304,8 @@ static int cache_create(struct cache_args *ca, struct cache **result) + INIT_LIST_HEAD(&cache->quiesced_migrations); + INIT_LIST_HEAD(&cache->completed_migrations); + INIT_LIST_HEAD(&cache->need_commit_migrations); +- atomic_set(&cache->nr_migrations, 0); ++ atomic_set(&cache->nr_allocated_migrations, 0); ++ atomic_set(&cache->nr_io_migrations, 0); + init_waitqueue_head(&cache->migration_wait); + + init_waitqueue_head(&cache->quiescing_wait); +@@ -2351,8 +2364,6 @@ static int cache_create(struct cache_args *ca, struct cache **result) + goto bad; + } + +- cache->next_migration = NULL; +- + cache->need_tick_bio = true; + cache->sized = false; + cache->invalidate = false; +diff --git a/drivers/media/pci/cx23885/cx23885-cards.c b/drivers/media/pci/cx23885/cx23885-cards.c +index 88c257d1161b..377818887ed2 100644 +--- a/drivers/media/pci/cx23885/cx23885-cards.c ++++ b/drivers/media/pci/cx23885/cx23885-cards.c +@@ -614,7 +614,7 @@ struct cx23885_board cx23885_boards[] = { + .portb = CX23885_MPEG_DVB, + }, + [CX23885_BOARD_HAUPPAUGE_HVR4400] = { +- .name = "Hauppauge WinTV-HVR4400", ++ .name = "Hauppauge WinTV-HVR4400/HVR5500", + .porta = CX23885_ANALOG_VIDEO, + .portb = CX23885_MPEG_DVB, + .portc = CX23885_MPEG_DVB, +@@ -622,6 +622,10 @@ struct cx23885_board cx23885_boards[] = { + .tuner_addr = 0x60, /* 0xc0 >> 1 */ + .tuner_bus = 1, + }, ++ [CX23885_BOARD_HAUPPAUGE_STARBURST] = { ++ .name = "Hauppauge WinTV Starburst", ++ .portb = CX23885_MPEG_DVB, ++ }, + [CX23885_BOARD_AVERMEDIA_HC81R] = { + .name = "AVerTV Hybrid Express Slim HC81R", + .tuner_type = TUNER_XC2028, +@@ -910,19 +914,19 @@ struct cx23885_subid cx23885_subids[] = { + }, { + .subvendor = 0x0070, + .subdevice = 0xc108, +- .card = CX23885_BOARD_HAUPPAUGE_HVR4400, ++ .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */ + }, { + .subvendor = 0x0070, + .subdevice = 0xc138, +- .card = CX23885_BOARD_HAUPPAUGE_HVR4400, ++ .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ + }, { + .subvendor = 0x0070, + .subdevice = 0xc12a, +- .card = CX23885_BOARD_HAUPPAUGE_HVR4400, ++ .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */ + }, { + .subvendor = 0x0070, + .subdevice = 0xc1f8, +- .card = CX23885_BOARD_HAUPPAUGE_HVR4400, ++ .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */ + }, { + .subvendor = 0x1461, + .subdevice = 0xd939, +@@ -1495,8 +1499,9 @@ void cx23885_gpio_setup(struct cx23885_dev *dev) + cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/ + break; + case CX23885_BOARD_HAUPPAUGE_HVR4400: ++ case CX23885_BOARD_HAUPPAUGE_STARBURST: + /* GPIO-8 tda10071 demod reset */ +- /* GPIO-9 si2165 demod reset */ ++ /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/ + + /* Put the parts into reset and back */ + cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1); +@@ -1760,6 +1765,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) + case CX23885_BOARD_HAUPPAUGE_HVR1850: + case CX23885_BOARD_HAUPPAUGE_HVR1290: + case CX23885_BOARD_HAUPPAUGE_HVR4400: ++ case CX23885_BOARD_HAUPPAUGE_STARBURST: + case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE: + if (dev->i2c_bus[0].i2c_rc == 0) + hauppauge_eeprom(dev, eeprom+0xc0); +@@ -1864,6 +1870,11 @@ void cx23885_card_setup(struct cx23885_dev *dev) + ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */ + ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; + break; ++ case CX23885_BOARD_HAUPPAUGE_STARBURST: ++ ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */ ++ ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ ++ ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO; ++ break; + case CX23885_BOARD_DVBSKY_T9580: + ts1->gen_ctrl_val = 0x5; /* Parallel */ + ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */ +diff --git a/drivers/media/pci/cx23885/cx23885-dvb.c b/drivers/media/pci/cx23885/cx23885-dvb.c +index 4cb90317ff45..a8d207929295 100644 +--- a/drivers/media/pci/cx23885/cx23885-dvb.c ++++ b/drivers/media/pci/cx23885/cx23885-dvb.c +@@ -1586,6 +1586,17 @@ static int dvb_register(struct cx23885_tsport *port) + break; + } + break; ++ case CX23885_BOARD_HAUPPAUGE_STARBURST: ++ i2c_bus = &dev->i2c_bus[0]; ++ fe0->dvb.frontend = dvb_attach(tda10071_attach, ++ &hauppauge_tda10071_config, ++ &i2c_bus->i2c_adap); ++ if (fe0->dvb.frontend != NULL) { ++ dvb_attach(a8293_attach, fe0->dvb.frontend, ++ &i2c_bus->i2c_adap, ++ &hauppauge_a8293_config); ++ } ++ break; + case CX23885_BOARD_DVBSKY_T9580: + i2c_bus = &dev->i2c_bus[0]; + i2c_bus2 = &dev->i2c_bus[1]; +diff --git a/drivers/media/pci/cx23885/cx23885.h b/drivers/media/pci/cx23885/cx23885.h +index 6c35e6115969..a33bead82ecc 100644 +--- a/drivers/media/pci/cx23885/cx23885.h ++++ b/drivers/media/pci/cx23885/cx23885.h +@@ -93,6 +93,7 @@ + #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 + #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 + #define CX23885_BOARD_DVBSKY_T9580 45 ++#define CX23885_BOARD_HAUPPAUGE_STARBURST 52 + + #define GPIO_0 0x00000001 + #define GPIO_1 0x00000002 +diff --git a/drivers/media/v4l2-core/videobuf2-core.c b/drivers/media/v4l2-core/videobuf2-core.c +index f2e43de3dd87..ea36447c74f9 100644 +--- a/drivers/media/v4l2-core/videobuf2-core.c ++++ b/drivers/media/v4l2-core/videobuf2-core.c +@@ -3142,27 +3142,26 @@ static int vb2_thread(void *data) + prequeue--; + } else { + call_void_qop(q, wait_finish, q); +- ret = vb2_internal_dqbuf(q, &fileio->b, 0); ++ if (!threadio->stop) ++ ret = vb2_internal_dqbuf(q, &fileio->b, 0); + call_void_qop(q, wait_prepare, q); + dprintk(5, "file io: vb2_dqbuf result: %d\n", ret); + } +- if (threadio->stop) +- break; +- if (ret) ++ if (ret || threadio->stop) + break; + try_to_freeze(); + + vb = q->bufs[fileio->b.index]; + if (!(fileio->b.flags & V4L2_BUF_FLAG_ERROR)) +- ret = threadio->fnc(vb, threadio->priv); +- if (ret) +- break; ++ if (threadio->fnc(vb, threadio->priv)) ++ break; + call_void_qop(q, wait_finish, q); + if (set_timestamp) + v4l2_get_timestamp(&fileio->b.timestamp); +- ret = vb2_internal_qbuf(q, &fileio->b); ++ if (!threadio->stop) ++ ret = vb2_internal_qbuf(q, &fileio->b); + call_void_qop(q, wait_prepare, q); +- if (ret) ++ if (ret || threadio->stop) + break; + } + +@@ -3231,11 +3230,11 @@ int vb2_thread_stop(struct vb2_queue *q) + threadio->stop = true; + vb2_internal_streamoff(q, q->type); + call_void_qop(q, wait_prepare, q); ++ err = kthread_stop(threadio->thread); + q->fileio = NULL; + fileio->req.count = 0; + vb2_reqbufs(q, &fileio->req); + kfree(fileio); +- err = kthread_stop(threadio->thread); + threadio->thread = NULL; + kfree(threadio); + q->fileio = NULL; +diff --git a/drivers/mfd/rtsx_usb.c b/drivers/mfd/rtsx_usb.c +index 9cf98d142d9a..c2474cf6bfef 100644 +--- a/drivers/mfd/rtsx_usb.c ++++ b/drivers/mfd/rtsx_usb.c +@@ -681,21 +681,9 @@ static void rtsx_usb_disconnect(struct usb_interface *intf) + #ifdef CONFIG_PM + static int rtsx_usb_suspend(struct usb_interface *intf, pm_message_t message) + { +- struct rtsx_ucr *ucr = +- (struct rtsx_ucr *)usb_get_intfdata(intf); +- + dev_dbg(&intf->dev, "%s called with pm message 0x%04x\n", + __func__, message.event); + +- /* +- * Call to make sure LED is off during suspend to save more power. +- * It is NOT a permanent state and could be turned on anytime later. +- * Thus no need to call turn_on when resunming. +- */ +- mutex_lock(&ucr->dev_mutex); +- rtsx_usb_turn_off_led(ucr); +- mutex_unlock(&ucr->dev_mutex); +- + return 0; + } + +diff --git a/drivers/mfd/tps65218.c b/drivers/mfd/tps65218.c +index 0d256cb002eb..d6b764349f9d 100644 +--- a/drivers/mfd/tps65218.c ++++ b/drivers/mfd/tps65218.c +@@ -125,10 +125,21 @@ int tps65218_clear_bits(struct tps65218 *tps, unsigned int reg, + } + EXPORT_SYMBOL_GPL(tps65218_clear_bits); + ++static const struct regmap_range tps65218_yes_ranges[] = { ++ regmap_reg_range(TPS65218_REG_INT1, TPS65218_REG_INT2), ++ regmap_reg_range(TPS65218_REG_STATUS, TPS65218_REG_STATUS), ++}; ++ ++static const struct regmap_access_table tps65218_volatile_table = { ++ .yes_ranges = tps65218_yes_ranges, ++ .n_yes_ranges = ARRAY_SIZE(tps65218_yes_ranges), ++}; ++ + static struct regmap_config tps65218_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .cache_type = REGCACHE_RBTREE, ++ .volatile_table = &tps65218_volatile_table, + }; + + static const struct regmap_irq tps65218_irqs[] = { +@@ -193,6 +204,7 @@ static struct regmap_irq_chip tps65218_irq_chip = { + + .num_regs = 2, + .mask_base = TPS65218_REG_INT_MASK1, ++ .status_base = TPS65218_REG_INT1, + }; + + static const struct of_device_id of_tps65218_match_table[] = { +diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c +index 2cfe5012e4e5..4b008c9c738d 100644 +--- a/drivers/net/can/dev.c ++++ b/drivers/net/can/dev.c +@@ -729,10 +729,14 @@ static int can_changelink(struct net_device *dev, + if (dev->flags & IFF_UP) + return -EBUSY; + cm = nla_data(data[IFLA_CAN_CTRLMODE]); +- if (cm->flags & ~priv->ctrlmode_supported) ++ ++ /* check whether changed bits are allowed to be modified */ ++ if (cm->mask & ~priv->ctrlmode_supported) + return -EOPNOTSUPP; ++ ++ /* clear bits to be modified and copy the flag values */ + priv->ctrlmode &= ~cm->mask; +- priv->ctrlmode |= cm->flags; ++ priv->ctrlmode |= (cm->flags & cm->mask); + + /* CAN_CTRLMODE_FD can only be set when driver supports FD */ + if (priv->ctrlmode & CAN_CTRLMODE_FD) +diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c +index d7bc462aafdc..244529881be9 100644 +--- a/drivers/net/can/m_can/m_can.c ++++ b/drivers/net/can/m_can/m_can.c +@@ -955,6 +955,11 @@ static struct net_device *alloc_m_can_dev(void) + priv->can.data_bittiming_const = &m_can_data_bittiming_const; + priv->can.do_set_mode = m_can_set_mode; + priv->can.do_get_berr_counter = m_can_get_berr_counter; ++ ++ /* CAN_CTRLMODE_FD_NON_ISO is fixed with M_CAN IP v3.0.1 */ ++ priv->can.ctrlmode = CAN_CTRLMODE_FD_NON_ISO; ++ ++ /* CAN_CTRLMODE_FD_NON_ISO can not be changed with M_CAN IP v3.0.1 */ + priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK | + CAN_CTRLMODE_LISTENONLY | + CAN_CTRLMODE_BERR_REPORTING | +diff --git a/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h b/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h +index 1354c68f6468..be0527734170 100644 +--- a/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h ++++ b/drivers/net/wireless/iwlwifi/mvm/fw-api-scan.h +@@ -672,6 +672,7 @@ struct iwl_scan_channel_opt { + * @IWL_MVM_LMAC_SCAN_FLAG_FRAGMENTED: all passive scans will be fragmented + * @IWL_MVM_LMAC_SCAN_FLAGS_RRM_ENABLED: insert WFA vendor-specific TPC report + * and DS parameter set IEs into probe requests. ++ * @IWL_MVM_LMAC_SCAN_FLAG_MATCH: Send match found notification on matches + */ + enum iwl_mvm_lmac_scan_flags { + IWL_MVM_LMAC_SCAN_FLAG_PASS_ALL = BIT(0), +@@ -681,6 +682,7 @@ enum iwl_mvm_lmac_scan_flags { + IWL_MVM_LMAC_SCAN_FLAG_MULTIPLE_SSIDS = BIT(4), + IWL_MVM_LMAC_SCAN_FLAG_FRAGMENTED = BIT(5), + IWL_MVM_LMAC_SCAN_FLAGS_RRM_ENABLED = BIT(6), ++ IWL_MVM_LMAC_SCAN_FLAG_MATCH = BIT(9), + }; + + enum iwl_scan_priority { +diff --git a/drivers/net/wireless/iwlwifi/mvm/scan.c b/drivers/net/wireless/iwlwifi/mvm/scan.c +index 7554f7053830..886b64710443 100644 +--- a/drivers/net/wireless/iwlwifi/mvm/scan.c ++++ b/drivers/net/wireless/iwlwifi/mvm/scan.c +@@ -1334,6 +1334,7 @@ int iwl_mvm_unified_sched_scan_lmac(struct iwl_mvm *mvm, + IWL_DEBUG_SCAN(mvm, + "Sending scheduled scan with filtering, n_match_sets %d\n", + req->n_match_sets); ++ flags |= IWL_MVM_LMAC_SCAN_FLAG_MATCH; + } else { + IWL_DEBUG_SCAN(mvm, + "Sending Scheduled scan without filtering\n"); +diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c +index 73aef51a28f0..8fb16188cd82 100644 +--- a/drivers/pci/bus.c ++++ b/drivers/pci/bus.c +@@ -228,6 +228,49 @@ int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res, + } + EXPORT_SYMBOL(pci_bus_alloc_resource); + ++/* ++ * The @idx resource of @dev should be a PCI-PCI bridge window. If this ++ * resource fits inside a window of an upstream bridge, do nothing. If it ++ * overlaps an upstream window but extends outside it, clip the resource so ++ * it fits completely inside. ++ */ ++bool pci_bus_clip_resource(struct pci_dev *dev, int idx) ++{ ++ struct pci_bus *bus = dev->bus; ++ struct resource *res = &dev->resource[idx]; ++ struct resource orig_res = *res; ++ struct resource *r; ++ int i; ++ ++ pci_bus_for_each_resource(bus, r, i) { ++ resource_size_t start, end; ++ ++ if (!r) ++ continue; ++ ++ if (resource_type(res) != resource_type(r)) ++ continue; ++ ++ start = max(r->start, res->start); ++ end = min(r->end, res->end); ++ ++ if (start > end) ++ continue; /* no overlap */ ++ ++ if (res->start == start && res->end == end) ++ return false; /* no change */ ++ ++ res->start = start; ++ res->end = end; ++ dev_printk(KERN_DEBUG, &dev->dev, "%pR clipped to %pR\n", ++ &orig_res, res); ++ ++ return true; ++ } ++ ++ return false; ++} ++ + void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { } + + /** +diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c +index 625a4ace10b4..0190d1ee36b7 100644 +--- a/drivers/pci/pci.c ++++ b/drivers/pci/pci.c +@@ -3280,7 +3280,8 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe) + { + struct pci_dev *pdev; + +- if (pci_is_root_bus(dev->bus) || dev->subordinate || !dev->bus->self) ++ if (pci_is_root_bus(dev->bus) || dev->subordinate || ++ !dev->bus->self || dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) + return -ENOTTY; + + list_for_each_entry(pdev, &dev->bus->devices, bus_list) +@@ -3314,7 +3315,8 @@ static int pci_dev_reset_slot_function(struct pci_dev *dev, int probe) + { + struct pci_dev *pdev; + +- if (dev->subordinate || !dev->slot) ++ if (dev->subordinate || !dev->slot || ++ dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) + return -ENOTTY; + + list_for_each_entry(pdev, &dev->bus->devices, bus_list) +@@ -3566,6 +3568,20 @@ int pci_try_reset_function(struct pci_dev *dev) + } + EXPORT_SYMBOL_GPL(pci_try_reset_function); + ++/* Do any devices on or below this bus prevent a bus reset? */ ++static bool pci_bus_resetable(struct pci_bus *bus) ++{ ++ struct pci_dev *dev; ++ ++ list_for_each_entry(dev, &bus->devices, bus_list) { ++ if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || ++ (dev->subordinate && !pci_bus_resetable(dev->subordinate))) ++ return false; ++ } ++ ++ return true; ++} ++ + /* Lock devices from the top of the tree down */ + static void pci_bus_lock(struct pci_bus *bus) + { +@@ -3616,6 +3632,22 @@ unlock: + return 0; + } + ++/* Do any devices on or below this slot prevent a bus reset? */ ++static bool pci_slot_resetable(struct pci_slot *slot) ++{ ++ struct pci_dev *dev; ++ ++ list_for_each_entry(dev, &slot->bus->devices, bus_list) { ++ if (!dev->slot || dev->slot != slot) ++ continue; ++ if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || ++ (dev->subordinate && !pci_bus_resetable(dev->subordinate))) ++ return false; ++ } ++ ++ return true; ++} ++ + /* Lock devices from the top of the tree down */ + static void pci_slot_lock(struct pci_slot *slot) + { +@@ -3737,7 +3769,7 @@ static int pci_slot_reset(struct pci_slot *slot, int probe) + { + int rc; + +- if (!slot) ++ if (!slot || !pci_slot_resetable(slot)) + return -ENOTTY; + + if (!probe) +@@ -3829,7 +3861,7 @@ EXPORT_SYMBOL_GPL(pci_try_reset_slot); + + static int pci_bus_reset(struct pci_bus *bus, int probe) + { +- if (!bus->self) ++ if (!bus->self || !pci_bus_resetable(bus)) + return -ENOTTY; + + if (probe) +diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h +index 4a3902d8e6fe..b5defca86795 100644 +--- a/drivers/pci/pci.h ++++ b/drivers/pci/pci.h +@@ -208,6 +208,7 @@ void __pci_bus_size_bridges(struct pci_bus *bus, + void __pci_bus_assign_resources(const struct pci_bus *bus, + struct list_head *realloc_head, + struct list_head *fail_head); ++bool pci_bus_clip_resource(struct pci_dev *dev, int idx); + + /** + * pci_ari_enabled - query ARI forwarding status +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index 90acb32c85b1..b72e2cdfd59a 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -3008,6 +3008,20 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_REALTEK, 0x8169, + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MELLANOX, PCI_ANY_ID, + quirk_broken_intx_masking); + ++static void quirk_no_bus_reset(struct pci_dev *dev) ++{ ++ dev->dev_flags |= PCI_DEV_FLAGS_NO_BUS_RESET; ++} ++ ++/* ++ * Atheros AR93xx chips do not behave after a bus reset. The device will ++ * throw a Link Down error on AER-capable systems and regardless of AER, ++ * config space of the device is never accessible again and typically ++ * causes the system to hang or reset when access is attempted. ++ * http://www.spinics.net/lists/linux-pci/msg34797.html ++ */ ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset); ++ + #ifdef CONFIG_ACPI + /* + * Apple: Shutdown Cactus Ridge Thunderbolt controller. +diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c +index 0482235eee92..e3e17f3c0f0f 100644 +--- a/drivers/pci/setup-bus.c ++++ b/drivers/pci/setup-bus.c +@@ -530,9 +530,8 @@ EXPORT_SYMBOL(pci_setup_cardbus); + config space writes, so it's quite possible that an I/O window of + the bridge will have some undesirable address (e.g. 0) after the + first write. Ditto 64-bit prefetchable MMIO. */ +-static void pci_setup_bridge_io(struct pci_bus *bus) ++static void pci_setup_bridge_io(struct pci_dev *bridge) + { +- struct pci_dev *bridge = bus->self; + struct resource *res; + struct pci_bus_region region; + unsigned long io_mask; +@@ -545,7 +544,7 @@ static void pci_setup_bridge_io(struct pci_bus *bus) + io_mask = PCI_IO_1K_RANGE_MASK; + + /* Set up the top and bottom of the PCI I/O segment for this bus. */ +- res = bus->resource[0]; ++ res = &bridge->resource[PCI_BRIDGE_RESOURCES + 0]; + pcibios_resource_to_bus(bridge->bus, ®ion, res); + if (res->flags & IORESOURCE_IO) { + pci_read_config_word(bridge, PCI_IO_BASE, &l); +@@ -568,15 +567,14 @@ static void pci_setup_bridge_io(struct pci_bus *bus) + pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16); + } + +-static void pci_setup_bridge_mmio(struct pci_bus *bus) ++static void pci_setup_bridge_mmio(struct pci_dev *bridge) + { +- struct pci_dev *bridge = bus->self; + struct resource *res; + struct pci_bus_region region; + u32 l; + + /* Set up the top and bottom of the PCI Memory segment for this bus. */ +- res = bus->resource[1]; ++ res = &bridge->resource[PCI_BRIDGE_RESOURCES + 1]; + pcibios_resource_to_bus(bridge->bus, ®ion, res); + if (res->flags & IORESOURCE_MEM) { + l = (region.start >> 16) & 0xfff0; +@@ -588,9 +586,8 @@ static void pci_setup_bridge_mmio(struct pci_bus *bus) + pci_write_config_dword(bridge, PCI_MEMORY_BASE, l); + } + +-static void pci_setup_bridge_mmio_pref(struct pci_bus *bus) ++static void pci_setup_bridge_mmio_pref(struct pci_dev *bridge) + { +- struct pci_dev *bridge = bus->self; + struct resource *res; + struct pci_bus_region region; + u32 l, bu, lu; +@@ -602,7 +599,7 @@ static void pci_setup_bridge_mmio_pref(struct pci_bus *bus) + + /* Set up PREF base/limit. */ + bu = lu = 0; +- res = bus->resource[2]; ++ res = &bridge->resource[PCI_BRIDGE_RESOURCES + 2]; + pcibios_resource_to_bus(bridge->bus, ®ion, res); + if (res->flags & IORESOURCE_PREFETCH) { + l = (region.start >> 16) & 0xfff0; +@@ -630,13 +627,13 @@ static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type) + &bus->busn_res); + + if (type & IORESOURCE_IO) +- pci_setup_bridge_io(bus); ++ pci_setup_bridge_io(bridge); + + if (type & IORESOURCE_MEM) +- pci_setup_bridge_mmio(bus); ++ pci_setup_bridge_mmio(bridge); + + if (type & IORESOURCE_PREFETCH) +- pci_setup_bridge_mmio_pref(bus); ++ pci_setup_bridge_mmio_pref(bridge); + + pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl); + } +@@ -649,6 +646,41 @@ void pci_setup_bridge(struct pci_bus *bus) + __pci_setup_bridge(bus, type); + } + ++ ++int pci_claim_bridge_resource(struct pci_dev *bridge, int i) ++{ ++ if (i < PCI_BRIDGE_RESOURCES || i > PCI_BRIDGE_RESOURCE_END) ++ return 0; ++ ++ if (pci_claim_resource(bridge, i) == 0) ++ return 0; /* claimed the window */ ++ ++ if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI) ++ return 0; ++ ++ if (!pci_bus_clip_resource(bridge, i)) ++ return -EINVAL; /* clipping didn't change anything */ ++ ++ switch (i - PCI_BRIDGE_RESOURCES) { ++ case 0: ++ pci_setup_bridge_io(bridge); ++ break; ++ case 1: ++ pci_setup_bridge_mmio(bridge); ++ break; ++ case 2: ++ pci_setup_bridge_mmio_pref(bridge); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (pci_claim_resource(bridge, i) == 0) ++ return 0; /* claimed a smaller window */ ++ ++ return -EINVAL; ++} ++ + /* Check whether the bridge supports optional I/O and + prefetchable memory ranges. If not, the respective + base/limit registers must be read-only and read as 0. */ +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index e4f65510c87e..89dca77ca038 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -1801,14 +1801,15 @@ void pinctrl_unregister(struct pinctrl_dev *pctldev) + if (pctldev == NULL) + return; + +- mutex_lock(&pinctrldev_list_mutex); + mutex_lock(&pctldev->mutex); +- + pinctrl_remove_device_debugfs(pctldev); ++ mutex_unlock(&pctldev->mutex); + + if (!IS_ERR(pctldev->p)) + pinctrl_put(pctldev->p); + ++ mutex_lock(&pinctrldev_list_mutex); ++ mutex_lock(&pctldev->mutex); + /* TODO: check that no pinmuxes are still active? */ + list_del(&pctldev->node); + /* Destroy descriptor tree */ +diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c +index e730935fa457..ed7017df065d 100644 +--- a/drivers/pinctrl/qcom/pinctrl-msm.c ++++ b/drivers/pinctrl/qcom/pinctrl-msm.c +@@ -865,10 +865,10 @@ static int msm_ps_hold_restart(struct notifier_block *nb, unsigned long action, + + static void msm_pinctrl_setup_pm_reset(struct msm_pinctrl *pctrl) + { +- int i = 0; ++ int i; + const struct msm_function *func = pctrl->soc->functions; + +- for (; i <= pctrl->soc->nfunctions; i++) ++ for (i = 0; i < pctrl->soc->nfunctions; i++) + if (!strcmp(func[i].name, "ps_hold")) { + pctrl->restart_nb.notifier_call = msm_ps_hold_restart; + pctrl->restart_nb.priority = 128; +diff --git a/drivers/s390/crypto/ap_bus.c b/drivers/s390/crypto/ap_bus.c +index 99485415dcc2..91e97ec01418 100644 +--- a/drivers/s390/crypto/ap_bus.c ++++ b/drivers/s390/crypto/ap_bus.c +@@ -44,6 +44,7 @@ + #include <linux/hrtimer.h> + #include <linux/ktime.h> + #include <asm/facility.h> ++#include <linux/crypto.h> + + #include "ap_bus.h" + +@@ -71,7 +72,7 @@ MODULE_AUTHOR("IBM Corporation"); + MODULE_DESCRIPTION("Adjunct Processor Bus driver, " \ + "Copyright IBM Corp. 2006, 2012"); + MODULE_LICENSE("GPL"); +-MODULE_ALIAS("z90crypt"); ++MODULE_ALIAS_CRYPTO("z90crypt"); + + /* + * Module parameter +diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c +index 2a9578c116b7..c3bdca7bf1e9 100644 +--- a/drivers/scsi/ipr.c ++++ b/drivers/scsi/ipr.c +@@ -683,6 +683,7 @@ static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd, + ipr_reinit_ipr_cmnd(ipr_cmd); + ipr_cmd->u.scratch = 0; + ipr_cmd->sibling = NULL; ++ ipr_cmd->eh_comp = NULL; + ipr_cmd->fast_done = fast_done; + init_timer(&ipr_cmd->timer); + } +@@ -848,6 +849,8 @@ static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd) + + scsi_dma_unmap(ipr_cmd->scsi_cmd); + scsi_cmd->scsi_done(scsi_cmd); ++ if (ipr_cmd->eh_comp) ++ complete(ipr_cmd->eh_comp); + list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q); + } + +@@ -4853,6 +4856,84 @@ static int ipr_slave_alloc(struct scsi_device *sdev) + return rc; + } + ++/** ++ * ipr_match_lun - Match function for specified LUN ++ * @ipr_cmd: ipr command struct ++ * @device: device to match (sdev) ++ * ++ * Returns: ++ * 1 if command matches sdev / 0 if command does not match sdev ++ **/ ++static int ipr_match_lun(struct ipr_cmnd *ipr_cmd, void *device) ++{ ++ if (ipr_cmd->scsi_cmd && ipr_cmd->scsi_cmd->device == device) ++ return 1; ++ return 0; ++} ++ ++/** ++ * ipr_wait_for_ops - Wait for matching commands to complete ++ * @ipr_cmd: ipr command struct ++ * @device: device to match (sdev) ++ * @match: match function to use ++ * ++ * Returns: ++ * SUCCESS / FAILED ++ **/ ++static int ipr_wait_for_ops(struct ipr_ioa_cfg *ioa_cfg, void *device, ++ int (*match)(struct ipr_cmnd *, void *)) ++{ ++ struct ipr_cmnd *ipr_cmd; ++ int wait; ++ unsigned long flags; ++ struct ipr_hrr_queue *hrrq; ++ signed long timeout = IPR_ABORT_TASK_TIMEOUT; ++ DECLARE_COMPLETION_ONSTACK(comp); ++ ++ ENTER; ++ do { ++ wait = 0; ++ ++ for_each_hrrq(hrrq, ioa_cfg) { ++ spin_lock_irqsave(hrrq->lock, flags); ++ list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) { ++ if (match(ipr_cmd, device)) { ++ ipr_cmd->eh_comp = ∁ ++ wait++; ++ } ++ } ++ spin_unlock_irqrestore(hrrq->lock, flags); ++ } ++ ++ if (wait) { ++ timeout = wait_for_completion_timeout(&comp, timeout); ++ ++ if (!timeout) { ++ wait = 0; ++ ++ for_each_hrrq(hrrq, ioa_cfg) { ++ spin_lock_irqsave(hrrq->lock, flags); ++ list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) { ++ if (match(ipr_cmd, device)) { ++ ipr_cmd->eh_comp = NULL; ++ wait++; ++ } ++ } ++ spin_unlock_irqrestore(hrrq->lock, flags); ++ } ++ ++ if (wait) ++ dev_err(&ioa_cfg->pdev->dev, "Timed out waiting for aborted commands\n"); ++ LEAVE; ++ return wait ? FAILED : SUCCESS; ++ } ++ } ++ } while (wait); ++ ++ LEAVE; ++ return SUCCESS; ++} ++ + static int ipr_eh_host_reset(struct scsi_cmnd *cmd) + { + struct ipr_ioa_cfg *ioa_cfg; +@@ -5072,11 +5153,17 @@ static int __ipr_eh_dev_reset(struct scsi_cmnd *scsi_cmd) + static int ipr_eh_dev_reset(struct scsi_cmnd *cmd) + { + int rc; ++ struct ipr_ioa_cfg *ioa_cfg; ++ ++ ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata; + + spin_lock_irq(cmd->device->host->host_lock); + rc = __ipr_eh_dev_reset(cmd); + spin_unlock_irq(cmd->device->host->host_lock); + ++ if (rc == SUCCESS) ++ rc = ipr_wait_for_ops(ioa_cfg, cmd->device, ipr_match_lun); ++ + return rc; + } + +@@ -5254,13 +5341,18 @@ static int ipr_eh_abort(struct scsi_cmnd *scsi_cmd) + { + unsigned long flags; + int rc; ++ struct ipr_ioa_cfg *ioa_cfg; + + ENTER; + ++ ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata; ++ + spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags); + rc = ipr_cancel_op(scsi_cmd); + spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags); + ++ if (rc == SUCCESS) ++ rc = ipr_wait_for_ops(ioa_cfg, scsi_cmd->device, ipr_match_lun); + LEAVE; + return rc; + } +diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h +index d0201ceb4aac..fa82c003bc32 100644 +--- a/drivers/scsi/ipr.h ++++ b/drivers/scsi/ipr.h +@@ -1608,6 +1608,7 @@ struct ipr_cmnd { + struct scsi_device *sdev; + } u; + ++ struct completion *eh_comp; + struct ipr_hrr_queue *hrrq; + struct ipr_ioa_cfg *ioa_cfg; + }; +diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c +index 9df5d6ec7eec..f3a9d831d0f9 100644 +--- a/drivers/xen/swiotlb-xen.c ++++ b/drivers/xen/swiotlb-xen.c +@@ -449,7 +449,7 @@ static void xen_unmap_single(struct device *hwdev, dma_addr_t dev_addr, + + /* NOTE: We use dev_addr here, not paddr! */ + if (is_xen_swiotlb_buffer(dev_addr)) { +- swiotlb_tbl_unmap_single(hwdev, dev_addr, size, dir); ++ swiotlb_tbl_unmap_single(hwdev, paddr, size, dir); + return; + } + +diff --git a/fs/cifs/ioctl.c b/fs/cifs/ioctl.c +index 45cb59bcc791..8b7898b7670f 100644 +--- a/fs/cifs/ioctl.c ++++ b/fs/cifs/ioctl.c +@@ -86,21 +86,16 @@ static long cifs_ioctl_clone(unsigned int xid, struct file *dst_file, + } + + src_inode = file_inode(src_file.file); ++ rc = -EINVAL; ++ if (S_ISDIR(src_inode->i_mode)) ++ goto out_fput; + + /* + * Note: cifs case is easier than btrfs since server responsible for + * checks for proper open modes and file type and if it wants + * server could even support copy of range where source = target + */ +- +- /* so we do not deadlock racing two ioctls on same files */ +- if (target_inode < src_inode) { +- mutex_lock_nested(&target_inode->i_mutex, I_MUTEX_PARENT); +- mutex_lock_nested(&src_inode->i_mutex, I_MUTEX_CHILD); +- } else { +- mutex_lock_nested(&src_inode->i_mutex, I_MUTEX_PARENT); +- mutex_lock_nested(&target_inode->i_mutex, I_MUTEX_CHILD); +- } ++ lock_two_nondirectories(target_inode, src_inode); + + /* determine range to clone */ + rc = -EINVAL; +@@ -124,13 +119,7 @@ static long cifs_ioctl_clone(unsigned int xid, struct file *dst_file, + out_unlock: + /* although unlocking in the reverse order from locking is not + strictly necessary here it is a little cleaner to be consistent */ +- if (target_inode < src_inode) { +- mutex_unlock(&src_inode->i_mutex); +- mutex_unlock(&target_inode->i_mutex); +- } else { +- mutex_unlock(&target_inode->i_mutex); +- mutex_unlock(&src_inode->i_mutex); +- } ++ unlock_two_nondirectories(src_inode, target_inode); + out_fput: + fdput(src_file); + out_drop_write: +diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h +index f34a0835aa4f..8de31d472fad 100644 +--- a/include/acpi/acpi_bus.h ++++ b/include/acpi/acpi_bus.h +@@ -312,6 +312,7 @@ struct acpi_device_wakeup_flags { + u8 valid:1; /* Can successfully enable wakeup? */ + u8 run_wake:1; /* Run-Wake GPE devices */ + u8 notifier_present:1; /* Wake-up notify handler has been installed */ ++ u8 enabled:1; /* Enabled for wakeup */ + }; + + struct acpi_device_wakeup_context { +diff --git a/include/linux/crypto.h b/include/linux/crypto.h +index d45e949699ea..dc34dfc766b5 100644 +--- a/include/linux/crypto.h ++++ b/include/linux/crypto.h +@@ -26,6 +26,19 @@ + #include <linux/uaccess.h> + + /* ++ * Autoloaded crypto modules should only use a prefixed name to avoid allowing ++ * arbitrary modules to be loaded. Loading from userspace may still need the ++ * unprefixed names, so retains those aliases as well. ++ * This uses __MODULE_INFO directly instead of MODULE_ALIAS because pre-4.3 ++ * gcc (e.g. avr32 toolchain) uses __LINE__ for uniqueness, and this macro ++ * expands twice on the same line. Instead, use a separate base name for the ++ * alias. ++ */ ++#define MODULE_ALIAS_CRYPTO(name) \ ++ __MODULE_INFO(alias, alias_userspace, name); \ ++ __MODULE_INFO(alias, alias_crypto, "crypto-" name) ++ ++/* + * Algorithm masks and types. + */ + #define CRYPTO_ALG_TYPE_MASK 0x0000000f +diff --git a/include/linux/libata.h b/include/linux/libata.h +index bd5fefeaf548..fe0bf8dc83bb 100644 +--- a/include/linux/libata.h ++++ b/include/linux/libata.h +@@ -230,6 +230,7 @@ enum { + ATA_FLAG_SW_ACTIVITY = (1 << 22), /* driver supports sw activity + * led */ + ATA_FLAG_NO_DIPM = (1 << 23), /* host not happy with DIPM */ ++ ATA_FLAG_LOWTAG = (1 << 24), /* host wants lowest available tag */ + + /* bits 24:31 of ap->flags are reserved for LLD specific flags */ + +diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h +index 7ea069cd3257..4b3736f7065c 100644 +--- a/include/linux/pagemap.h ++++ b/include/linux/pagemap.h +@@ -251,7 +251,7 @@ pgoff_t page_cache_prev_hole(struct address_space *mapping, + #define FGP_NOWAIT 0x00000020 + + struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset, +- int fgp_flags, gfp_t cache_gfp_mask, gfp_t radix_gfp_mask); ++ int fgp_flags, gfp_t cache_gfp_mask); + + /** + * find_get_page - find and get a page reference +@@ -266,13 +266,13 @@ struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset, + static inline struct page *find_get_page(struct address_space *mapping, + pgoff_t offset) + { +- return pagecache_get_page(mapping, offset, 0, 0, 0); ++ return pagecache_get_page(mapping, offset, 0, 0); + } + + static inline struct page *find_get_page_flags(struct address_space *mapping, + pgoff_t offset, int fgp_flags) + { +- return pagecache_get_page(mapping, offset, fgp_flags, 0, 0); ++ return pagecache_get_page(mapping, offset, fgp_flags, 0); + } + + /** +@@ -292,7 +292,7 @@ static inline struct page *find_get_page_flags(struct address_space *mapping, + static inline struct page *find_lock_page(struct address_space *mapping, + pgoff_t offset) + { +- return pagecache_get_page(mapping, offset, FGP_LOCK, 0, 0); ++ return pagecache_get_page(mapping, offset, FGP_LOCK, 0); + } + + /** +@@ -319,7 +319,7 @@ static inline struct page *find_or_create_page(struct address_space *mapping, + { + return pagecache_get_page(mapping, offset, + FGP_LOCK|FGP_ACCESSED|FGP_CREAT, +- gfp_mask, gfp_mask & GFP_RECLAIM_MASK); ++ gfp_mask); + } + + /** +@@ -340,8 +340,7 @@ static inline struct page *grab_cache_page_nowait(struct address_space *mapping, + { + return pagecache_get_page(mapping, index, + FGP_LOCK|FGP_CREAT|FGP_NOFS|FGP_NOWAIT, +- mapping_gfp_mask(mapping), +- GFP_NOFS); ++ mapping_gfp_mask(mapping)); + } + + struct page *find_get_entry(struct address_space *mapping, pgoff_t offset); +diff --git a/include/linux/pci.h b/include/linux/pci.h +index 4c8ac5fcc224..2882c13c6391 100644 +--- a/include/linux/pci.h ++++ b/include/linux/pci.h +@@ -175,6 +175,8 @@ enum pci_dev_flags { + PCI_DEV_FLAGS_DMA_ALIAS_DEVFN = (__force pci_dev_flags_t) (1 << 4), + /* Use a PCIe-to-PCI bridge alias even if !pci_is_pcie */ + PCI_DEV_FLAG_PCIE_BRIDGE_ALIAS = (__force pci_dev_flags_t) (1 << 5), ++ /* Do not use bus resets for device */ ++ PCI_DEV_FLAGS_NO_BUS_RESET = (__force pci_dev_flags_t) (1 << 6), + }; + + enum pci_irq_reroute_variant { +@@ -1062,6 +1064,7 @@ resource_size_t pcibios_retrieve_fw_addr(struct pci_dev *dev, int idx); + void pci_bus_assign_resources(const struct pci_bus *bus); + void pci_bus_size_bridges(struct pci_bus *bus); + int pci_claim_resource(struct pci_dev *, int); ++int pci_claim_bridge_resource(struct pci_dev *bridge, int i); + void pci_assign_unassigned_resources(void); + void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge); + void pci_assign_unassigned_bus_resources(struct pci_bus *bus); +diff --git a/include/linux/time.h b/include/linux/time.h +index 8c42cf8d2444..5989b0ead1ec 100644 +--- a/include/linux/time.h ++++ b/include/linux/time.h +@@ -99,6 +99,19 @@ static inline bool timespec_valid_strict(const struct timespec *ts) + return true; + } + ++static inline bool timeval_valid(const struct timeval *tv) ++{ ++ /* Dates before 1970 are bogus */ ++ if (tv->tv_sec < 0) ++ return false; ++ ++ /* Can't have more microseconds then a second */ ++ if (tv->tv_usec < 0 || tv->tv_usec >= USEC_PER_SEC) ++ return false; ++ ++ return true; ++} ++ + extern struct timespec timespec_trunc(struct timespec t, unsigned gran); + + #define CURRENT_TIME (current_kernel_time()) +diff --git a/include/uapi/linux/can/netlink.h b/include/uapi/linux/can/netlink.h +index 3e4323a3918d..94ffe0c83ce7 100644 +--- a/include/uapi/linux/can/netlink.h ++++ b/include/uapi/linux/can/netlink.h +@@ -98,6 +98,7 @@ struct can_ctrlmode { + #define CAN_CTRLMODE_BERR_REPORTING 0x10 /* Bus-error reporting */ + #define CAN_CTRLMODE_FD 0x20 /* CAN FD mode */ + #define CAN_CTRLMODE_PRESUME_ACK 0x40 /* Ignore missing CAN ACKs */ ++#define CAN_CTRLMODE_FD_NON_ISO 0x80 /* CAN FD in non-ISO mode */ + + /* + * CAN device statistics +diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c +index 87a346fd6d61..28bf91c60a0b 100644 +--- a/kernel/time/ntp.c ++++ b/kernel/time/ntp.c +@@ -633,6 +633,13 @@ int ntp_validate_timex(struct timex *txc) + if ((txc->modes & ADJ_SETOFFSET) && (!capable(CAP_SYS_TIME))) + return -EPERM; + ++ if (txc->modes & ADJ_FREQUENCY) { ++ if (LONG_MIN / PPM_SCALE > txc->freq) ++ return -EINVAL; ++ if (LONG_MAX / PPM_SCALE < txc->freq) ++ return -EINVAL; ++ } ++ + return 0; + } + +diff --git a/kernel/time/time.c b/kernel/time/time.c +index a9ae20fb0b11..22d5d3b73970 100644 +--- a/kernel/time/time.c ++++ b/kernel/time/time.c +@@ -196,6 +196,10 @@ SYSCALL_DEFINE2(settimeofday, struct timeval __user *, tv, + if (tv) { + if (copy_from_user(&user_tv, tv, sizeof(*tv))) + return -EFAULT; ++ ++ if (!timeval_valid(&user_tv)) ++ return -EINVAL; ++ + new_ts.tv_sec = user_tv.tv_sec; + new_ts.tv_nsec = user_tv.tv_usec * NSEC_PER_USEC; + } +diff --git a/kernel/workqueue.c b/kernel/workqueue.c +index 09b685daee3d..66940a53d128 100644 +--- a/kernel/workqueue.c ++++ b/kernel/workqueue.c +@@ -1841,17 +1841,11 @@ static void pool_mayday_timeout(unsigned long __pool) + * spin_lock_irq(pool->lock) which may be released and regrabbed + * multiple times. Does GFP_KERNEL allocations. Called only from + * manager. +- * +- * Return: +- * %false if no action was taken and pool->lock stayed locked, %true +- * otherwise. + */ +-static bool maybe_create_worker(struct worker_pool *pool) ++static void maybe_create_worker(struct worker_pool *pool) + __releases(&pool->lock) + __acquires(&pool->lock) + { +- if (!need_to_create_worker(pool)) +- return false; + restart: + spin_unlock_irq(&pool->lock); + +@@ -1877,7 +1871,6 @@ restart: + */ + if (need_to_create_worker(pool)) + goto restart; +- return true; + } + + /** +@@ -1897,16 +1890,14 @@ restart: + * multiple times. Does GFP_KERNEL allocations. + * + * Return: +- * %false if the pool don't need management and the caller can safely start +- * processing works, %true indicates that the function released pool->lock +- * and reacquired it to perform some management function and that the +- * conditions that the caller verified while holding the lock before +- * calling the function might no longer be true. ++ * %false if the pool doesn't need management and the caller can safely ++ * start processing works, %true if management function was performed and ++ * the conditions that the caller verified before calling the function may ++ * no longer be true. + */ + static bool manage_workers(struct worker *worker) + { + struct worker_pool *pool = worker->pool; +- bool ret = false; + + /* + * Anyone who successfully grabs manager_arb wins the arbitration +@@ -1919,12 +1910,12 @@ static bool manage_workers(struct worker *worker) + * actual management, the pool may stall indefinitely. + */ + if (!mutex_trylock(&pool->manager_arb)) +- return ret; ++ return false; + +- ret |= maybe_create_worker(pool); ++ maybe_create_worker(pool); + + mutex_unlock(&pool->manager_arb); +- return ret; ++ return true; + } + + /** +diff --git a/mm/filemap.c b/mm/filemap.c +index 14b4642279f1..37beab98b416 100644 +--- a/mm/filemap.c ++++ b/mm/filemap.c +@@ -1046,8 +1046,7 @@ EXPORT_SYMBOL(find_lock_entry); + * @mapping: the address_space to search + * @offset: the page index + * @fgp_flags: PCG flags +- * @cache_gfp_mask: gfp mask to use for the page cache data page allocation +- * @radix_gfp_mask: gfp mask to use for radix tree node allocation ++ * @gfp_mask: gfp mask to use for the page cache data page allocation + * + * Looks up the page cache slot at @mapping & @offset. + * +@@ -1056,11 +1055,9 @@ EXPORT_SYMBOL(find_lock_entry); + * FGP_ACCESSED: the page will be marked accessed + * FGP_LOCK: Page is return locked + * FGP_CREAT: If page is not present then a new page is allocated using +- * @cache_gfp_mask and added to the page cache and the VM's LRU +- * list. If radix tree nodes are allocated during page cache +- * insertion then @radix_gfp_mask is used. The page is returned +- * locked and with an increased refcount. Otherwise, %NULL is +- * returned. ++ * @gfp_mask and added to the page cache and the VM's LRU ++ * list. The page is returned locked and with an increased ++ * refcount. Otherwise, %NULL is returned. + * + * If FGP_LOCK or FGP_CREAT are specified then the function may sleep even + * if the GFP flags specified for FGP_CREAT are atomic. +@@ -1068,7 +1065,7 @@ EXPORT_SYMBOL(find_lock_entry); + * If there is a page cache page, it is returned with an increased refcount. + */ + struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset, +- int fgp_flags, gfp_t cache_gfp_mask, gfp_t radix_gfp_mask) ++ int fgp_flags, gfp_t gfp_mask) + { + struct page *page; + +@@ -1105,13 +1102,11 @@ no_page: + if (!page && (fgp_flags & FGP_CREAT)) { + int err; + if ((fgp_flags & FGP_WRITE) && mapping_cap_account_dirty(mapping)) +- cache_gfp_mask |= __GFP_WRITE; +- if (fgp_flags & FGP_NOFS) { +- cache_gfp_mask &= ~__GFP_FS; +- radix_gfp_mask &= ~__GFP_FS; +- } ++ gfp_mask |= __GFP_WRITE; ++ if (fgp_flags & FGP_NOFS) ++ gfp_mask &= ~__GFP_FS; + +- page = __page_cache_alloc(cache_gfp_mask); ++ page = __page_cache_alloc(gfp_mask); + if (!page) + return NULL; + +@@ -1122,7 +1117,8 @@ no_page: + if (fgp_flags & FGP_ACCESSED) + __SetPageReferenced(page); + +- err = add_to_page_cache_lru(page, mapping, offset, radix_gfp_mask); ++ err = add_to_page_cache_lru(page, mapping, offset, ++ gfp_mask & GFP_RECLAIM_MASK); + if (unlikely(err)) { + page_cache_release(page); + page = NULL; +@@ -2443,8 +2439,7 @@ struct page *grab_cache_page_write_begin(struct address_space *mapping, + fgp_flags |= FGP_NOFS; + + page = pagecache_get_page(mapping, index, fgp_flags, +- mapping_gfp_mask(mapping), +- GFP_KERNEL); ++ mapping_gfp_mask(mapping)); + if (page) + wait_for_stable_page(page); + +diff --git a/net/netfilter/ipvs/ip_vs_ftp.c b/net/netfilter/ipvs/ip_vs_ftp.c +index 1d5341f3761d..5d3daae98bf0 100644 +--- a/net/netfilter/ipvs/ip_vs_ftp.c ++++ b/net/netfilter/ipvs/ip_vs_ftp.c +@@ -183,6 +183,8 @@ static int ip_vs_ftp_out(struct ip_vs_app *app, struct ip_vs_conn *cp, + struct nf_conn *ct; + struct net *net; + ++ *diff = 0; ++ + #ifdef CONFIG_IP_VS_IPV6 + /* This application helper doesn't work with IPv6 yet, + * so turn this into a no-op for IPv6 packets +@@ -191,8 +193,6 @@ static int ip_vs_ftp_out(struct ip_vs_app *app, struct ip_vs_conn *cp, + return 1; + #endif + +- *diff = 0; +- + /* Only useful for established sessions */ + if (cp->state != IP_VS_TCP_S_ESTABLISHED) + return 1; +@@ -322,6 +322,9 @@ static int ip_vs_ftp_in(struct ip_vs_app *app, struct ip_vs_conn *cp, + struct ip_vs_conn *n_cp; + struct net *net; + ++ /* no diff required for incoming packets */ ++ *diff = 0; ++ + #ifdef CONFIG_IP_VS_IPV6 + /* This application helper doesn't work with IPv6 yet, + * so turn this into a no-op for IPv6 packets +@@ -330,9 +333,6 @@ static int ip_vs_ftp_in(struct ip_vs_app *app, struct ip_vs_conn *cp, + return 1; + #endif + +- /* no diff required for incoming packets */ +- *diff = 0; +- + /* Only useful for established sessions */ + if (cp->state != IP_VS_TCP_S_ESTABLISHED) + return 1; +diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c +index 5016a6929085..c5880124ec0d 100644 +--- a/net/netfilter/nf_conntrack_core.c ++++ b/net/netfilter/nf_conntrack_core.c +@@ -611,16 +611,15 @@ __nf_conntrack_confirm(struct sk_buff *skb) + */ + NF_CT_ASSERT(!nf_ct_is_confirmed(ct)); + pr_debug("Confirming conntrack %p\n", ct); +- /* We have to check the DYING flag inside the lock to prevent +- a race against nf_ct_get_next_corpse() possibly called from +- user context, else we insert an already 'dead' hash, blocking +- further use of that particular connection -JM */ ++ /* We have to check the DYING flag after unlink to prevent ++ * a race against nf_ct_get_next_corpse() possibly called from ++ * user context, else we insert an already 'dead' hash, blocking ++ * further use of that particular connection -JM. ++ */ ++ nf_ct_del_from_dying_or_unconfirmed_list(ct); + +- if (unlikely(nf_ct_is_dying(ct))) { +- nf_conntrack_double_unlock(hash, reply_hash); +- local_bh_enable(); +- return NF_ACCEPT; +- } ++ if (unlikely(nf_ct_is_dying(ct))) ++ goto out; + + /* See if there's one in the list already, including reverse: + NAT could have grabbed it without realizing, since we're +@@ -636,8 +635,6 @@ __nf_conntrack_confirm(struct sk_buff *skb) + zone == nf_ct_zone(nf_ct_tuplehash_to_ctrack(h))) + goto out; + +- nf_ct_del_from_dying_or_unconfirmed_list(ct); +- + /* Timer relative to confirmation time, not original + setting time, otherwise we'd get timer wrap in + weird delay cases. */ +@@ -673,6 +670,7 @@ __nf_conntrack_confirm(struct sk_buff *skb) + return NF_ACCEPT; + + out: ++ nf_ct_add_to_dying_list(ct); + nf_conntrack_double_unlock(hash, reply_hash); + NF_CT_STAT_INC(net, insert_failed); + local_bh_enable(); +diff --git a/net/netfilter/nf_tables_api.c b/net/netfilter/nf_tables_api.c +index 66e8425dbfe7..71b574c7bde9 100644 +--- a/net/netfilter/nf_tables_api.c ++++ b/net/netfilter/nf_tables_api.c +@@ -713,16 +713,12 @@ static int nft_flush_table(struct nft_ctx *ctx) + struct nft_chain *chain, *nc; + struct nft_set *set, *ns; + +- list_for_each_entry_safe(chain, nc, &ctx->table->chains, list) { ++ list_for_each_entry(chain, &ctx->table->chains, list) { + ctx->chain = chain; + + err = nft_delrule_by_chain(ctx); + if (err < 0) + goto out; +- +- err = nft_delchain(ctx); +- if (err < 0) +- goto out; + } + + list_for_each_entry_safe(set, ns, &ctx->table->sets, list) { +@@ -735,6 +731,14 @@ static int nft_flush_table(struct nft_ctx *ctx) + goto out; + } + ++ list_for_each_entry_safe(chain, nc, &ctx->table->chains, list) { ++ ctx->chain = chain; ++ ++ err = nft_delchain(ctx); ++ if (err < 0) ++ goto out; ++ } ++ + err = nft_deltable(ctx); + out: + return err; +diff --git a/net/netfilter/nfnetlink.c b/net/netfilter/nfnetlink.c +index 13c2e17bbe27..1aa7049c93f5 100644 +--- a/net/netfilter/nfnetlink.c ++++ b/net/netfilter/nfnetlink.c +@@ -321,7 +321,8 @@ replay: + nlh = nlmsg_hdr(skb); + err = 0; + +- if (nlh->nlmsg_len < NLMSG_HDRLEN) { ++ if (nlmsg_len(nlh) < sizeof(struct nfgenmsg) || ++ skb->len < nlh->nlmsg_len) { + err = -EINVAL; + goto ack; + } +@@ -469,7 +470,7 @@ static int nfnetlink_bind(int group) + int type; + + if (group <= NFNLGRP_NONE || group > NFNLGRP_MAX) +- return -EINVAL; ++ return 0; + + type = nfnl_group2type[group]; + +diff --git a/scripts/recordmcount.pl b/scripts/recordmcount.pl +index d4b665610d67..1f9f08ae60c1 100755 +--- a/scripts/recordmcount.pl ++++ b/scripts/recordmcount.pl +@@ -255,7 +255,6 @@ if ($arch eq "x86_64") { + # force flags for this arch + $ld .= " -m shlelf_linux"; + $objcopy .= " -O elf32-sh-linux"; +- $cc .= " -m32"; + + } elsif ($arch eq "powerpc") { + $local_regex = "^[0-9a-fA-F]+\\s+t\\s+(\\.?\\S+)"; +diff --git a/security/keys/gc.c b/security/keys/gc.c +index 9609a7f0faea..c7952375ac53 100644 +--- a/security/keys/gc.c ++++ b/security/keys/gc.c +@@ -148,12 +148,12 @@ static noinline void key_gc_unused_keys(struct list_head *keys) + if (test_bit(KEY_FLAG_INSTANTIATED, &key->flags)) + atomic_dec(&key->user->nikeys); + +- key_user_put(key->user); +- + /* now throw away the key memory */ + if (key->type->destroy) + key->type->destroy(key); + ++ key_user_put(key->user); ++ + kfree(key->description); + + #ifdef KEY_DEBUGGING +diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c +index 6e354d326858..a712d754431c 100644 +--- a/sound/usb/mixer.c ++++ b/sound/usb/mixer.c +@@ -909,6 +909,7 @@ static void volume_control_quirks(struct usb_mixer_elem_info *cval, + case USB_ID(0x046d, 0x0807): /* Logitech Webcam C500 */ + case USB_ID(0x046d, 0x0808): + case USB_ID(0x046d, 0x0809): ++ case USB_ID(0x046d, 0x0819): /* Logitech Webcam C210 */ + case USB_ID(0x046d, 0x081b): /* HD Webcam c310 */ + case USB_ID(0x046d, 0x081d): /* HD Webcam c510 */ + case USB_ID(0x046d, 0x0825): /* HD Webcam c270 */
