Kévin Redon has uploaded this change for review. ( https://gerrit.osmocom.org/13053
Change subject: switch UART debug to SIM7 ...................................................................... switch UART debug to SIM7 SERCOM7 will mainly be used for the SIM7 interface. only if SIM7 is not present, the UART can be remapped to UART_debug. Change-Id: Idfbd067b4b0e2034337732da2ff5b7cfef8fe4ae --- M sysmoOCTSIM/atmel_start_config.atstart M sysmoOCTSIM/atmel_start_pins.h M sysmoOCTSIM/config/hpl_sercom_config.h M sysmoOCTSIM/driver_init.c M sysmoOCTSIM/driver_init.h M sysmoOCTSIM/examples/driver_examples.c M sysmoOCTSIM/examples/driver_examples.h M sysmoOCTSIM/main.c 8 files changed, 149 insertions(+), 190 deletions(-) git pull ssh://gerrit.osmocom.org:29418/osmo-ccid-firmware refs/changes/53/13053/1 diff --git a/sysmoOCTSIM/atmel_start_config.atstart b/sysmoOCTSIM/atmel_start_config.atstart index a301385..4590623 100644 --- a/sysmoOCTSIM/atmel_start_config.atstart +++ b/sysmoOCTSIM/atmel_start_config.atstart @@ -1274,9 +1274,9 @@ configuration: core_gclk_selection: Generic clock generator 2 slow_gclk_selection: Generic clock generator 3 - UART_debug: - user_label: UART_debug - definition: Atmel:SAME54_Drivers:0.0.1::SAME54N19A-AF::SERCOM7::driver_config_definition::UART::HAL:Driver:USART.Async + SIM7: + user_label: SIM7 + definition: Atmel:SAME54_Drivers:0.0.1::SAME54N19A-AF::SERCOM7::driver_config_definition::USART.with.ISO7816::HAL:Driver:USART.Async functionality: USART api: HAL:Driver:USART_Async configuration: @@ -1285,30 +1285,28 @@ usart_arch_cloden: false usart_arch_dbgstop: Keep running usart_arch_dord: LSB is transmitted first - usart_arch_enc: No encoding - usart_arch_fractional: 0 usart_arch_ibon: false - usart_arch_lin_slave_enable: Disable usart_arch_runstdby: false - usart_arch_sampa: 7-8-9 (3-4-5 8-bit over-sampling) - usart_arch_sampr: 16x arithmetic usart_arch_sfde: false - usart_baud_rate: 921600 + usart_baud_rate: 9600 usart_character_size: 8 bits - usart_parity: No parity + usart_dsnack: The successive receive NACK is disable. + usart_gtime: 2-bit times + usart_inack: NACK is transmitted when a parity error is received. + usart_inverse_enabled: false + usart_iso7816_type: T=0 + usart_maxiter: 7 + usart_parity: Even parity usart_rx_enable: true usart_stop_bit: One stop bit usart_tx_enable: true optional_signals: [] variant: - specification: TXPO=0, RXPO=1, CMODE=0 + specification: TXPO=2, RXPO=0 required_signals: - name: SERCOM7/PAD/0 - pad: PB30 - label: TX - - name: SERCOM7/PAD/1 - pad: PB31 - label: RX + pad: PB21 + label: RX/TX clocks: domain_group: nodes: @@ -1503,6 +1501,12 @@ mode: Peripheral IO user_label: SIM3_IO configuration: null + SIM7_IO: + name: PB21 + definition: Atmel:SAME54_Drivers:0.0.1::SAME54N19A-AF::pad::PB21 + mode: Peripheral IO + user_label: SIM7_IO + configuration: null VB0: name: PA20 definition: Atmel:SAME54_Drivers:0.0.1::SAME54N19A-AF::pad::PA20 @@ -1557,18 +1561,6 @@ mode: Digital output user_label: SDA4 configuration: null - UART_TX: - name: PB30 - definition: Atmel:SAME54_Drivers:0.0.1::SAME54N19A-AF::pad::PB30 - mode: Peripheral IO - user_label: UART_TX - configuration: null - UART_RX: - name: PB31 - definition: Atmel:SAME54_Drivers:0.0.1::SAME54N19A-AF::pad::PB31 - mode: Peripheral IO - user_label: UART_RX - configuration: null SCL2: name: PB02 definition: Atmel:SAME54_Drivers:0.0.1::SAME54N19A-AF::pad::PB02 diff --git a/sysmoOCTSIM/atmel_start_pins.h b/sysmoOCTSIM/atmel_start_pins.h index 60b70bb..c877d5e 100644 --- a/sysmoOCTSIM/atmel_start_pins.h +++ b/sysmoOCTSIM/atmel_start_pins.h @@ -50,8 +50,7 @@ #define SDA1 GPIO(GPIO_PORTB, 15) #define SIM5_IO GPIO(GPIO_PORTB, 16) #define SIM3_IO GPIO(GPIO_PORTB, 20) -#define UART_TX GPIO(GPIO_PORTB, 30) -#define UART_RX GPIO(GPIO_PORTB, 31) +#define SIM7_IO GPIO(GPIO_PORTB, 21) #define SIM0_INT GPIO(GPIO_PORTC, 0) #define SIM1_INT GPIO(GPIO_PORTC, 1) #define SIM2_INT GPIO(GPIO_PORTC, 2) diff --git a/sysmoOCTSIM/config/hpl_sercom_config.h b/sysmoOCTSIM/config/hpl_sercom_config.h index 735fdc2..64607bb 100644 --- a/sysmoOCTSIM/config/hpl_sercom_config.h +++ b/sysmoOCTSIM/config/hpl_sercom_config.h @@ -1931,13 +1931,11 @@ #endif // <o> Frame parity -// <0x0=>No parity // <0x1=>Even parity -// <0x2=>Odd parity // <i> Parity bit mode for USART frame // <id> usart_parity #ifndef CONF_SERCOM_7_USART_PARITY -#define CONF_SERCOM_7_USART_PARITY 0x0 +#define CONF_SERCOM_7_USART_PARITY 1 #endif // <o> Character Size @@ -1961,11 +1959,75 @@ #define CONF_SERCOM_7_USART_SBMODE 0 #endif -// <o> Baud rate <1-6250000> +// <o> Baud rate <1-3000000> // <i> USART baud rate setting // <id> usart_baud_rate #ifndef CONF_SERCOM_7_USART_BAUD -#define CONF_SERCOM_7_USART_BAUD 921600 +#define CONF_SERCOM_7_USART_BAUD 9600 +#endif +// </h> + +// <h> ISO7816 configuration +// <o> ISO7816 Protocol Type +// <0x1=> T=0 +// <0x0=> T=1 +// <i> Define ISO7816 protocol type as 0. +// <id> usart_iso7816_type +#ifndef CONF_SERCOM_7_USART_ISO7816_PROTOCOL_T +#define CONF_SERCOM_7_USART_ISO7816_PROTOCOL_T 0x1 +#endif + +// <o> ISO7816 Inhibit Not Acknowledge +// <0x0=> NACK is transmitted when a parity error is received. +// <0x1=> NACK is not transmitted when a parity error is received. +// <i> Define whether a NACK is transmitted when a parity error is received. +// <id> usart_inack +#ifndef CONF_SERCOM_7_USART_INACK +#define CONF_SERCOM_7_USART_INACK 0x0 +#endif + +// <o> ISO7816 Disable Successive Not Acknowledge +// <0x0=> The successive receive NACK is disable. +// <0x1=> The successive receive NACK is enable. +// <i> Define whether NACK will be sent on parity error reception. +// <id> usart_dsnack +#ifndef CONF_SERCOM_7_USART_DSNACK +#define CONF_SERCOM_7_USART_DSNACK 0x0 +#endif + +// <o> ISO7816 Maximum Iterations<0-7> +// <i> Define the maximum number of retransmit iterations. +// <id> usart_maxiter +#ifndef CONF_SERCOM_7_USART_MAXITER +#define CONF_SERCOM_7_USART_MAXITER 0x7 +#endif + +// <o> ISO7816 Guard Time +// <0x2=> 2-bit times +// <0x3=> 3-bit times +// <0x4=> 4-bit times +// <0x5=> 5-bit times +// <0x6=> 6-bit times +// <0x7=> 7-bit times +// <i> Define the guard time. +// <id> usart_gtime +#ifndef CONF_SERCOM_7_USART_GTIME +#define CONF_SERCOM_7_USART_GTIME 0x2 +#endif + +// <q> Inverse transmission and reception enabled +// <i> Define inverse transmission and reception enabled. +// <id> usart_inverse_enabled +#ifndef CONF_SERCOM_7_USART_INVERSE_ENABLED +#define CONF_SERCOM_7_USART_INVERSE_ENABLED 0x0 +#endif + +#if (CONF_SERCOM_7_USART_INVERSE_ENABLED == 1) +#define CONF_SERCOM_7_USART_RXINV 0x1 +#define CONF_SERCOM_7_USART_TXINV 0x1 +#else +#define CONF_SERCOM_7_USART_RXINV 0x0 +#define CONF_SERCOM_7_USART_TXINV 0x0 #endif // </h> @@ -2005,44 +2067,13 @@ #endif // <o> Operating Mode -// <0x0=>USART with external clock // <0x1=>USART with internal clock -// <i> Drive the shift register by an internal clock generated by the baud rate generator or an external clock supplied on the XCK pin. +// <i> Drive the shift register by an internal clock generated by the baud rate generator. // <id> usart_arch_clock_mode #ifndef CONF_SERCOM_7_USART_MODE #define CONF_SERCOM_7_USART_MODE 0x1 #endif -// <o> Sample Rate -// <0x0=>16x arithmetic -// <0x1=>16x fractional -// <0x2=>8x arithmetic -// <0x3=>8x fractional -// <0x4=>3x arithmetic -// <i> How many over-sampling bits used when sampling data state -// <id> usart_arch_sampr -#ifndef CONF_SERCOM_7_USART_SAMPR -#define CONF_SERCOM_7_USART_SAMPR 0x0 -#endif - -// <o> Sample Adjustment -// <0x0=>7-8-9 (3-4-5 8-bit over-sampling) -// <0x1=>9-10-11 (4-5-6 8-bit over-sampling) -// <0x2=>11-12-13 (5-6-7 8-bit over-sampling) -// <0x3=>13-14-15 (6-7-8 8-bit over-sampling) -// <i> Adjust which samples to use for data sampling in asynchronous mode -// <id> usart_arch_sampa -#ifndef CONF_SERCOM_7_USART_SAMPA -#define CONF_SERCOM_7_USART_SAMPA 0x0 -#endif - -// <o> Fractional Part <0-7> -// <i> Fractional part of the baud rate if baud rate generator is in fractional mode -// <id> usart_arch_fractional -#ifndef CONF_SERCOM_7_USART_FRACTIONAL -#define CONF_SERCOM_7_USART_FRACTIONAL 0x0 -#endif - // <o> Data Order // <0=>MSB is transmitted first // <1=>LSB is transmitted first @@ -2052,27 +2083,6 @@ #define CONF_SERCOM_7_USART_DORD 1 #endif -// Does not do anything in UART mode -#define CONF_SERCOM_7_USART_CPOL 0 - -// <o> Encoding Format -// <0=>No encoding -// <1=>IrDA encoded -// <id> usart_arch_enc -#ifndef CONF_SERCOM_7_USART_ENC -#define CONF_SERCOM_7_USART_ENC 0 -#endif - -// <o> LIN Slave Enable -// <i> Break Character Detection and Auto-Baud/LIN Slave Enable. -// <i> Additional setting needed: 16x sample rate using fractional baud rate generation (CTRLA.SAMPR = 1). -// <0=>Disable -// <1=>Enable -// <id> usart_arch_lin_slave_enable -#ifndef CONF_SERCOM_7_USART_LIN_SLAVE_ENABLE -#define CONF_SERCOM_7_USART_LIN_SLAVE_ENABLE 0 -#endif - // <o> Debug Stop Mode // <i> Behavior of the baud-rate generator when CPU is halted by external debugger. // <0=>Keep running @@ -2082,58 +2092,38 @@ #define CONF_SERCOM_7_USART_DEBUG_STOP_MODE 0 #endif +// Does not do anything in USRT mode +#define CONF_SERCOM_7_USART_SAMPR 0x0 +#define CONF_SERCOM_7_USART_SAMPA 0x0 +#define CONF_SERCOM_7_USART_FRACTIONAL 0x0 + +// Does not do anything in UART mode +#define CONF_SERCOM_7_USART_CPOL 0 + +// Does not do anything in USRT mode +#define CONF_SERCOM_7_USART_ENC 0 + // </e> -#ifndef CONF_SERCOM_7_USART_INACK -#define CONF_SERCOM_7_USART_INACK 0x0 -#endif - -#ifndef CONF_SERCOM_7_USART_DSNACK -#define CONF_SERCOM_7_USART_DSNACK 0x0 -#endif - -#ifndef CONF_SERCOM_7_USART_MAXITER -#define CONF_SERCOM_7_USART_MAXITER 0x7 -#endif - -#ifndef CONF_SERCOM_7_USART_GTIME -#define CONF_SERCOM_7_USART_GTIME 0x2 -#endif - -#define CONF_SERCOM_7_USART_RXINV 0x0 -#define CONF_SERCOM_7_USART_TXINV 0x0 - #ifndef CONF_SERCOM_7_USART_CMODE -#define CONF_SERCOM_7_USART_CMODE 0 +#define CONF_SERCOM_7_USART_CMODE CONF_SERCOM_7_USART_ISO7816_PROTOCOL_T #endif +/* RX is on PIN_PB21 */ #ifndef CONF_SERCOM_7_USART_RXPO -#define CONF_SERCOM_7_USART_RXPO 1 /* RX is on PIN_PB31 */ +#define CONF_SERCOM_7_USART_RXPO 0 #endif +/* TX uses the same pin with RX */ #ifndef CONF_SERCOM_7_USART_TXPO -#define CONF_SERCOM_7_USART_TXPO 0 /* TX is on PIN_PB30 */ +#define CONF_SERCOM_7_USART_TXPO 2 #endif -/* Set correct parity settings in register interface based on PARITY setting */ -#if CONF_SERCOM_7_USART_LIN_SLAVE_ENABLE == 1 -#if CONF_SERCOM_7_USART_PARITY == 0 -#define CONF_SERCOM_7_USART_PMODE 0 -#define CONF_SERCOM_7_USART_FORM 4 -#else -#define CONF_SERCOM_7_USART_PMODE CONF_SERCOM_7_USART_PARITY - 1 -#define CONF_SERCOM_7_USART_FORM 5 -#endif -#else /* #if CONF_SERCOM_7_USART_LIN_SLAVE_ENABLE == 0 */ -#if CONF_SERCOM_7_USART_PARITY == 0 -#define CONF_SERCOM_7_USART_PMODE 0 -#define CONF_SERCOM_7_USART_FORM 0 -#else -#define CONF_SERCOM_7_USART_PMODE CONF_SERCOM_7_USART_PARITY - 1 -#define CONF_SERCOM_7_USART_FORM 1 -#endif -#endif +/* Set iso7816 mode */ +#define CONF_SERCOM_7_USART_PMODE (CONF_SERCOM_7_USART_PARITY - 1) +#define CONF_SERCOM_7_USART_FORM 7 +#if CONF_SERCOM_7_USART_CMODE == 0 // Calculate BAUD register value in UART mode #if CONF_SERCOM_7_USART_SAMPR == 0 #ifndef CONF_SERCOM_7_USART_BAUD_RATE @@ -2177,6 +2167,19 @@ #endif #endif +#elif CONF_SERCOM_7_USART_CMODE == 1 +#ifndef CONF_SERCOM_7_USART_BAUD_RATE +// Calculate BAUD register value in USRT mode +#define CONF_SERCOM_7_USART_BAUD_RATE (CONF_GCLK_SERCOM7_CORE_FREQUENCY) / (2 * CONF_SERCOM_7_USART_BAUD) - 1 +#endif + +#ifndef CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH +#define CONF_SERCOM_7_USART_RECEIVE_PULSE_LENGTH 0 +#endif +#else +#error CMODE value for SERCOM 7 in USART mode not known +#endif + // <<< end of configuration section >>> #endif // HPL_SERCOM_CONFIG_H diff --git a/sysmoOCTSIM/driver_init.c b/sysmoOCTSIM/driver_init.c index 1a58ad9..e56ba0d 100644 --- a/sysmoOCTSIM/driver_init.c +++ b/sysmoOCTSIM/driver_init.c @@ -33,7 +33,7 @@ #define SIM6_BUFFER_SIZE 16 /*! The buffer size for USART */ -#define UART_DEBUG_BUFFER_SIZE 16 +#define SIM7_BUFFER_SIZE 16 struct usart_async_descriptor SIM0; struct usart_async_descriptor SIM1; @@ -42,7 +42,7 @@ struct usart_async_descriptor SIM4; struct usart_async_descriptor SIM5; struct usart_async_descriptor SIM6; -struct usart_async_descriptor UART_debug; +struct usart_async_descriptor SIM7; static uint8_t SIM0_buffer[SIM0_BUFFER_SIZE]; static uint8_t SIM1_buffer[SIM1_BUFFER_SIZE]; @@ -51,7 +51,7 @@ static uint8_t SIM4_buffer[SIM4_BUFFER_SIZE]; static uint8_t SIM5_buffer[SIM5_BUFFER_SIZE]; static uint8_t SIM6_buffer[SIM6_BUFFER_SIZE]; -static uint8_t UART_debug_buffer[UART_DEBUG_BUFFER_SIZE]; +static uint8_t SIM7_buffer[SIM7_BUFFER_SIZE]; /** * \brief USART Clock initialization function @@ -317,7 +317,7 @@ * * Enables register interface and peripheral clock */ -void UART_debug_CLOCK_init() +void SIM7_CLOCK_init() { hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM7_GCLK_ID_CORE, CONF_GCLK_SERCOM7_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos)); @@ -331,12 +331,10 @@ * * Set each required pin to USART functionality */ -void UART_debug_PORT_init() +void SIM7_PORT_init() { - gpio_set_pin_function(UART_TX, PINMUX_PB30C_SERCOM7_PAD0); - - gpio_set_pin_function(UART_RX, PINMUX_PB31C_SERCOM7_PAD1); + gpio_set_pin_function(SIM7_IO, PINMUX_PB21D_SERCOM7_PAD0); } /** @@ -344,11 +342,11 @@ * * Enables USART peripheral, clocks and initializes USART driver */ -void UART_debug_init(void) +void SIM7_init(void) { - UART_debug_CLOCK_init(); - usart_async_init(&UART_debug, SERCOM7, UART_debug_buffer, UART_DEBUG_BUFFER_SIZE, (void *)NULL); - UART_debug_PORT_init(); + SIM7_CLOCK_init(); + usart_async_init(&SIM7, SERCOM7, SIM7_buffer, SIM7_BUFFER_SIZE, (void *)NULL); + SIM7_PORT_init(); } void USB_DEVICE_INSTANCE_PORT_init(void) @@ -860,7 +858,7 @@ SIM4_init(); SIM5_init(); SIM6_init(); - UART_debug_init(); + SIM7_init(); USB_DEVICE_INSTANCE_init(); } diff --git a/sysmoOCTSIM/driver_init.h b/sysmoOCTSIM/driver_init.h index a0fbb88..a38ccef 100644 --- a/sysmoOCTSIM/driver_init.h +++ b/sysmoOCTSIM/driver_init.h @@ -39,7 +39,7 @@ extern struct usart_async_descriptor SIM4; extern struct usart_async_descriptor SIM5; extern struct usart_async_descriptor SIM6; -extern struct usart_async_descriptor UART_debug; +extern struct usart_async_descriptor SIM7; void SIM0_PORT_init(void); void SIM0_CLOCK_init(void); @@ -69,9 +69,9 @@ void SIM6_CLOCK_init(void); void SIM6_init(void); -void UART_debug_PORT_init(void); -void UART_debug_CLOCK_init(void); -void UART_debug_init(void); +void SIM7_PORT_init(void); +void SIM7_CLOCK_init(void); +void SIM7_init(void); void USB_DEVICE_INSTANCE_CLOCK_init(void); void USB_DEVICE_INSTANCE_init(void); diff --git a/sysmoOCTSIM/examples/driver_examples.c b/sysmoOCTSIM/examples/driver_examples.c index 14f1ae5..a8747bc 100644 --- a/sysmoOCTSIM/examples/driver_examples.c +++ b/sysmoOCTSIM/examples/driver_examples.c @@ -214,7 +214,7 @@ } /** - * Example of using UART_debug to write "Hello World" using the IO abstraction. + * Example of using SIM7 to write "Hello World" using the IO abstraction. * * Since the driver is asynchronous we need to use statically allocated memory for string * because driver initiates transfer and then returns before the transmission is completed. @@ -222,22 +222,22 @@ * Once transfer has been completed the tx_cb function will be called. */ -static uint8_t example_UART_debug[12] = "Hello World!"; +static uint8_t example_SIM7[12] = "Hello World!"; -static void tx_cb_UART_debug(const struct usart_async_descriptor *const io_descr) +static void tx_cb_SIM7(const struct usart_async_descriptor *const io_descr) { /* Transfer completed */ } -void UART_debug_example(void) +void SIM7_example(void) { struct io_descriptor *io; - usart_async_register_callback(&UART_debug, USART_ASYNC_TXC_CB, tx_cb_UART_debug); - /*usart_async_register_callback(&UART_debug, USART_ASYNC_RXC_CB, rx_cb); - usart_async_register_callback(&UART_debug, USART_ASYNC_ERROR_CB, err_cb);*/ - usart_async_get_io_descriptor(&UART_debug, &io); - usart_async_enable(&UART_debug); + usart_async_register_callback(&SIM7, USART_ASYNC_TXC_CB, tx_cb_SIM7); + /*usart_async_register_callback(&SIM7, USART_ASYNC_RXC_CB, rx_cb); + usart_async_register_callback(&SIM7, USART_ASYNC_ERROR_CB, err_cb);*/ + usart_async_get_io_descriptor(&SIM7, &io); + usart_async_enable(&SIM7); - io_write(io, example_UART_debug, 12); + io_write(io, example_SIM7, 12); } diff --git a/sysmoOCTSIM/examples/driver_examples.h b/sysmoOCTSIM/examples/driver_examples.h index 4f2ce98..76856f0 100644 --- a/sysmoOCTSIM/examples/driver_examples.h +++ b/sysmoOCTSIM/examples/driver_examples.h @@ -26,7 +26,7 @@ void SIM6_example(void); -void UART_debug_example(void); +void SIM7_example(void); #ifdef __cplusplus } diff --git a/sysmoOCTSIM/main.c b/sysmoOCTSIM/main.c index 50e82c6..9500e08 100644 --- a/sysmoOCTSIM/main.c +++ b/sysmoOCTSIM/main.c @@ -27,21 +27,6 @@ #include "octsim_i2c.h" #include "ncn8025.h" -volatile static bool data_arrived = false; - -static void tx_cb_UART_debug(const struct usart_async_descriptor *const io_descr) -{ - /* Transfer completed */ - //gpio_toggle_pin_level(LED_system); -} - -static void rx_cb_UART_debug(const struct usart_async_descriptor *const io_descr) -{ - /* Receive completed */ - gpio_toggle_pin_level(USER_LED); - data_arrived = true; -} - static void board_init() { int i; @@ -64,24 +49,6 @@ int main(void) { atmel_start_init(); - - usart_async_register_callback(&UART_debug, USART_ASYNC_TXC_CB, tx_cb_UART_debug); - usart_async_register_callback(&UART_debug, USART_ASYNC_RXC_CB, rx_cb_UART_debug); - usart_async_enable(&UART_debug); - - usb_start(); - board_init(); - - const char* welcome = "\r\n\r\nsysmocom sysmoOCTSIM\r\n"; - while (io_write(&UART_debug.io, (const uint8_t*)welcome, strlen(welcome)) != strlen(welcome)); // print welcome message - while (true) { // main loop - if (data_arrived) { // input on UART debug - data_arrived = false; // clear flag - uint8_t recv_char; // to store the input - while (io_read(&UART_debug.io, &recv_char, 1) == 1) { // read input - while (io_write(&UART_debug.io, &recv_char, 1) != 1); // echo back to output - } - } - } + usb_start(); } -- To view, visit https://gerrit.osmocom.org/13053 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmo-ccid-firmware Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Idfbd067b4b0e2034337732da2ff5b7cfef8fe4ae Gerrit-Change-Number: 13053 Gerrit-PatchSet: 1 Gerrit-Owner: Kévin Redon <kre...@sysmocom.de>