pespin has submitted this change and it was merged. (
https://gerrit.osmocom.org/c/osmocom-bb/+/15051 )
Change subject: trx_toolkit: Fixes in TRXD documentation
......................................................................
trx_toolkit: Fixes in TRXD documentation
Change-Id: I126a8aed6b2bac7a620e95f06ecb98642a63b5f0
---
M src/target/trx_toolkit/data_msg.py
1 file changed, 5 insertions(+), 5 deletions(-)
Approvals:
Jenkins Builder: Verified
laforge: Looks good to me, but someone else must approve
fixeria: Looks good to me, approved
diff --git a/src/target/trx_toolkit/data_msg.py
b/src/target/trx_toolkit/data_msg.py
index ebb7a0f..de5f908 100644
--- a/src/target/trx_toolkit/data_msg.py
+++ b/src/target/trx_toolkit/data_msg.py
@@ -477,17 +477,17 @@
+-----------------+---------------------------------------+
| 7 6 5 4 3 2 1 0 | bit numbers (value range) |
+-----------------+---------------------------------------+
- | . . . . . X X X | Training Sequence Code (0..7) |
+ | X . . . . . . . | IDLE / nope frame indication (0 or 1) |
+-----------------+---------------------------------------+
| . X X X X . . . | Modulation, TS set number (see below) |
+-----------------+---------------------------------------+
- | X . . . . . . . | IDLE / nope frame indication (0 or 1) |
+ | . . . . . X X X | Training Sequence Code (0..7) |
+-----------------+---------------------------------------+
The bit number 7 (MSB) is set to high when either nothing has been
detected, or during IDLE frames, so we can deliver noise levels,
and avoid clock gaps on the L1 side. Other bits are ignored,
- and should be set to low (0) in this case. L16 shall be set to 0x00.
+ and should be set to low (0) in this case.
== Coding of modulation and TS set number
@@ -520,14 +520,14 @@
== Coding of the burst bits
- Unlike to be transmitted bursts, the received bursts are designated
+ Unlike the transmitted bursts, the received bursts are designated
using the soft-bits notation, so the receiver can indicate its
assurance from 0 to -127 that a given bit is 1, and from 0 to +127
that a given bit is 0. The Viterbi algorithm allows to approximate
the original sequence of hard-bits (1 or 0) using these values.
Each soft-bit (-127..127) of the burst is encoded as an unsigned
- value in range (254..0) respectively using the constant shift.
+ value in range (0..255) respectively using the constant shift.
"""
--
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Gerrit-Project: osmocom-bb
Gerrit-Branch: master
Gerrit-Change-Id: I126a8aed6b2bac7a620e95f06ecb98642a63b5f0
Gerrit-Change-Number: 15051
Gerrit-PatchSet: 1
Gerrit-Owner: pespin <pes...@sysmocom.de>
Gerrit-Reviewer: Jenkins Builder
Gerrit-Reviewer: fixeria <axilira...@gmail.com>
Gerrit-Reviewer: laforge <lafo...@gnumonks.org>
Gerrit-Reviewer: pespin <pes...@sysmocom.de>
Gerrit-MessageType: merged
