Hi,
My (windows) GHDL compiler doesn't like the following piece of VHDL (a
simple and not very useful example):
LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY caseproblem IS
GENERIC (
SIZE : POSITIVE := 64
);
PORT
(
clk : IN STD_LOGIC;
rst_n : IN STD_LOGIC;
outputa : OUT STD_LOGIC;
outputb : OUT STD_LOGIC
);
END caseproblem;
ARCHITECTURE rtl OF caseproblem IS
SIGNAL state : INTEGER RANGE 0 TO SIZE+1;
BEGIN
PROCESS (clk, rst_n)
BEGIN
IF rst_n = '0' THEN
outputa <= '0';
outputb <= '0';
ELSIF clk'EVENT AND clk = '1' THEN
CASE state IS
WHEN 0 =>
outputa <= '0';
outputb <= '0';
WHEN 1 TO SIZE - 2 => -- <= This usage of SIZE makes
GHDL fail
outputa <= '1';
outputb <= '0';
state <= state + 1;
WHEN OTHERS =>
outputa <= '1';
outputb <= '1';
state <= 0;
END CASE;
END IF;
END PROCESS;
END rtl;
GHDL has a problem with the case statement (because one of the when clauses
is using a generic?).
The error message is "not static choice exclude others choice"
I think the syntax is correct, my altera tool for instance doesn't prevent
me from using it.
Is this a bug in GHDL, or a mistake in my code?
Can I help to fix it?
Best regards,
Hans Keppens
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