I attached a small and obvious reproducer Unconstrained array in entity port is origin of the problem.
library ieee; use ieee.std_logic_1164.all; entity reproducer is port(a:std_logic_vector); end entity; architecture test of reproducer is begin end architecture;
library ieee; use ieee.std_logic_1164.all; entity tb is end entity; architecture test of tb is signal sig: std_logic_vector(13 downto 0); begin T:entity work.reproducer port map (a=>sig); end architecture;
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