On Fri, Oct 10, 2008 at 10:26:20PM +0200, [EMAIL PROTECTED] wrote:
> >> On Thu, Oct 09, 2008 at 08:28:43PM +0200, [EMAIL PROTECTED] wrote:

> >> type myTypeVector std_logic_vector( param_size - 1 downto 0 )
> >> type myTypeVector( numberofitems - 1 downto 0 )
> >> signal instanceMyTypeMatrix : myTypeMatrix

> >> component
> >> generic .....
> >> port ( ... theOuput : out std_logic_vector( param_size - 1 downto 0 )
> >> ... )
> >>
> >> If I try to call the component while passing
> >>   instanceMyTypeMatrix( 2 )
> >> there is a compilation error.
> >> If I try to call the component while passing
> >>   std_logic_vector( instanceMyTypeMatrix( 2 ) ) it compiles but the
> >> vector
> >> is left totally uninitiallized.

> Sorry to not have read again before sending. The second line was
>  type myTypeMatrix array( numberofitems - 1 downto 0 ) myTypeVector
> 
> I always try to strip irrelevant part of the code. Also when we post on
> the mailining list, the code may not compile if not all the code is sent.
> 
> The issue was : does a cast should copy the signal into a temporary signal
> and then no update is done backwards ( it is what happened )

Hi,

there are no copies in signals association of components instantiation.

You should really write a small reproducer as it will make things much
clearer.  For example, I still don't know if the first declaration is
a type declaration or a subtype declaration as the line is not valid VHDL.
(And don't forget that the notion of 'cast' doesn't exist in VHDL.  I suppose
you mean type conversion.  You don't call a component but instantiate it).

If myTypeVector is a subtype you can associate it with theOuput.

Tristan.

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