On Sun, 2014-01-12 at 01:15 -0500, Adam Jensen wrote:
> On Sun, 12 Jan 2014 05:03:13 +0100 (CET)
> [email protected] wrote:
> 
> > > If the generated binaries do inherit the GNU license, could the
> > > author(s) be persuaded to change the license slightly?
> > > 
> > > pragma License (Modified_GPL);
> > 
> > I need good arguments.  Is there any need to distribute generated
> > binaries ?
> > 
> 
> VHDL can be used for much more than just hardware description. Through
> the foreign function interface, much additional sophistication can be
> linked into the discrete-event core. Complex application software can
> be created. It's just another programming paradigm.

There's a problem with this, as frequently pointed out by David Koontz :
other languages don't share the discrete-event model. Thus the VHPI only
really works in one direction : outwards from VHDL.

That means you can call external functions from VHDL which will (from
VHDL's POV) return within the same delta cycle, allowing VHDL to control
the timing model. This mode of operation can be completely successful,
as long as you can design the interactions around that constraint (which
implies the calling process - and thus the entire sim time model) is
blocked until the external function returns)

Calling VHDL from external code, all I have managed to do is to run a
top level design (which can then call back and dictate timings to
external code).

Now those external subprograms (called from VHDL, returning immediately)
may control parallel software activities such as a GUI. But to do so
they must be something like critical sections - an obvious model would
be accessor methods to an Ada protected object.

Thus for example if you're selling a UART chip, (but don't want it
copied) you might provide a VHDL model callable from a software
component representing the UART driver : that component would start the
UART testbench and interact with it via protected objects representing
the UART ports, and interact with the user app via the UART driver
calls.

In which case you might want to supply the VHDL component (testbench and
UART, or possibly just the UART itself) as a binary.

Too far fetched?

- Brian


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