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On Thu, 27 Feb 2014 09:02:18 +0100
Svenn Are Bjerkem <[email protected]> wrote:

> Currently I use Tcl to have the serial port in an event loop
> to be able to react asynchronously to the results coming from
> the FPGA. Writing the state-machine is a bit awkward, and it
> frustrates me that I can write a hardware FSM fairly easy in
> VHDL, but not in any programming language that I know (c, tcl,
> python)
> 

http://pyserial.sourceforge.net/
http://pyasn1.sourceforge.net/
https://code.google.com/p/python-fsm/

> I guess it is not easy to bind a serial port to ghdl and rely
> on the concurrency in VHDL to read, interpret and send
> commands the way I do in FPGA hardware, 

http://ygdes.com/GHDL/ "Thanks whygee!"
http://stackoverflow.com/questions/1647631/c-state-machine-design
http://en.wikibooks.org/wiki/Serial_Programming/Serial_Linux

If you were to write a pure C implementation, a Python
implementation, and a VHDL-VHPI-C implementation, it would be
very interesting to hear about the results: binary size,
start-up time, CPU/memory use, etc.

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