On 26/11/15 08:08, KIMURA Masaru wrote:
FYI, and you may know, but i've not tested actually,
some closed source VHDL simulators (such as Aldec Riviera-PRO) have
relax
options (e.g. integer range), IIRC.
Never heard about that. Any pointer or detail about this feature
would be useful.
e.g. Riviera-PRO has -relax option for acom/asim (these are Aldec-favor
commands for well-known vcom/vsim) and their detailed description and
examples are documented in its manual, are titled like "Relaxing LRM
requirements" or so.
unfortunately, reading this manual required to install it and use its
manual viewer, or sign-in to Aldec site.
so i'm not sure it is fair-use/legal to share this detail info in
public ML, sorry.
Ok, but can you briefly describe how it affects integer ranges ?
for integer range w/ -relax, IIUC, the manual said,
* 32-bit literal are treated as two's complement,
e.g. ":= 16#FFFFFFFF#" is treated as ":= -1".
Hum, this could be implemented but I am not sure this is really
a good idea.
Tristan.
* conv_integer() accepts 32-bit argument.
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