cyb70289 commented on a change in pull request #12358:
URL: https://github.com/apache/arrow/pull/12358#discussion_r804354277
##########
File path: cpp/src/arrow/util/thread_pool.h
##########
@@ -373,7 +377,7 @@ class ARROW_EXPORT ThreadPool : public Executor {
State* state_;
bool shutdown_on_destroy_;
#ifndef _WIN32
- pid_t pid_;
+ std::atomic<pid_t> pid_;
Review comment:
Just to make this discussion more complete.
If we only care about atomicity, to satisfy TSAN without introducing
unnecessary memory barriers, we can use relaxed memory ordering when accessing
the atomic variable, not the default sequential consistent memory ordering.
The assembly code will probably be the same as a normal variable on most
architectures.
```
if (g_i.load(std::memory_order_relaxed) == 0) {
std::lock_guard<std::mutex> lk(g_mtx);
if (g_i.load(std::memory_order_relaxed) == 0) {
g_i.store(1, std::memory_order_relaxed);
}
}
```
This might help performance on cpus with more relaxed memory models than x86
(e.g., arm, ppc) in some cases, but the improvement is often negligible in a
real world application.
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: [email protected]
For queries about this service, please contact Infrastructure at:
[email protected]
