> Wolfgang Thaller wrote: > > > [...] Can anyone with sparc experience think of a reason > why cache flushing > > > should _not_ be necessary here? > > > Synchronizing the data/instruction caches *and* the caches of > different > processors (most people forget the latter) is necessary for > both PowerPC and SPARC.
I'm not a sparc expert, would anyone like to suggest a patch? Cheers, Simon _______________________________________________ Glasgow-haskell-bugs mailing list [EMAIL PROTECTED] http://www.haskell.org/mailman/listinfo/glasgow-haskell-bugs