#5824: ARM StgRun register clobber list is broken
-------------------------------+--------------------------------------------
    Reporter:  bgamari         |       Owner:  simonmar        
        Type:  bug             |      Status:  patch           
    Priority:  high            |   Milestone:  7.4.2           
   Component:  Runtime System  |     Version:  7.4.1-rc2       
    Keywords:                  |          Os:  Unknown/Multiple
Architecture:  arm             |     Failure:  None/Unknown    
  Difficulty:  Unknown         |    Testcase:                  
   Blockedby:                  |    Blocking:                  
     Related:                  |  
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Comment(by dterei):

 So Simon seems to be handling this. I'm not that familiar with the code in
 question but here are some questions / comments.

 1. I assume r7 isn't being saved as it stores R1 which is the return
 register?
 2. Why isn't r11 (storing SpLim) being saved?

 What is up with ARM's register names? If I look in the code you wrote in
 MachRegs.h it seems as if the registers have two names? e.g r11 also known
 as v8? r12 also as ip?

 I think the patch looks fine.

-- 
Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/5824#comment:3>
GHC <http://www.haskell.org/ghc/>
The Glasgow Haskell Compiler

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