Marc Glisse <marc.gli...@inria.fr> writes: > /usr/bin/gcc -c -DHAVE_CONFIG_H -I. -I.. -D__GMP_WITHIN_GMP -I.. -DOPERATION_lshift \ > -I/usr/uumath/include -I/usr/uumath/include -Wa,--noexecstack tmp-lshift.s -fPIC \ > -DPIC -o .libs/lshift.o Do you have CFLAGS set or something? I find your list of flags surprisingly short. Indeed.
> tmp-lshift.s: Assembler messages: > tmp-lshift.s:106: Error: selected processor does not support `vdup.32 d6,r3' in ARM mode What selected processor is that? Maybe adding -v to a gcc invocation would give information. The /proc/cpuinfo suggest Cortex C9. It has Neon, and we do attempt to put the compiler/assembler into a mode where Neon insn are accepted. Yet... > tmp-lshift.s:108: Error: selected processor does not support `vdup.32 d7,r3' in ARM mode > tmp-lshift.s:114: Error: selected processor does not support `vshl.u64 d18,d19,d7' in ARM mode > tmp-lshift.s:120: Error: selected processor does not support `vshl.u64 d4,d19,d6' in ARM mode ... indicates that Neon insn are not accepted. -- Torbjörn Please encrypt, key id 0xC8601622 _______________________________________________ gmp-bugs mailing list gmp-bugs@gmplib.org https://gmplib.org/mailman/listinfo/gmp-bugs
