Sad Clouds <cryintotheblue...@gmail.com> writes: https://gmplib.org/list-archives/gmp-commit/2013-May/001723.html + [ultrasparct[12]]) + gcc_cflags_cpu="-mcpu=niagara -mcpu=v9" + gcc_32_cflags_asm="-Wa,-Av8plusc -Wa,-xarch=v8plusc" + gcc_64_cflags_asm="-Wa,-Av9c -Wa,-xarch=v9c";; Using -xarch=v8plusc is wrong for UltraSPARC T1 and T2 processors, since they don't support VIS3 instructions set. This results in the following ld.so errors when using Sun assembler hardware capability (CA_SUNW_HW_1) unsupported: 0x400 GNU assembler states that: ?-Av8plusc? and ?-Av9c? enable the UltraSPARC Niagara instructions, as well as the instructions enabled by ?-Av8plusb? and ?-Av9b?. However this is wrong, since with Sun/Oracle compilers this option is used for SPARC64 VI processor.
Clearly, the GNU compiler/assembler and the Solaris compiler/assembler do not agree about the meaning of what v8plusc means. I suppose it is a mistake in the GNU camp. What do you suggest that we do for GMP? Perhaps just pass v8plusb for T1/T2? I mean, these CPUs are so horrendously slow anyway that nobody in his right mind would perform any computation on them anyway. -- Torbjörn Please encrypt, key id 0xC8601622 _______________________________________________ gmp-bugs mailing list gmp-bugs@gmplib.org https://gmplib.org/mailman/listinfo/gmp-bugs