On 10/30/05, Bill McGonigle <[EMAIL PROTECTED]> wrote:
> Someone will correct me if I'm mistaken, but as I understand it x86-64
> is an instruction set addition to IA32.  So it's not a 64-bit chip like
> an Alpha, it's a 64-bit chip like a PowerPC. A fundamentally 32-bit
> chip with provisions for 64-bit operations and memory addressing.

  From what I've read, I'm not sure how accurate that is.  AMD64 (and
Intel's clone of it, EM64T) enable CPU modes which support a native
address space larger then 32 bits.  Not the "32 bit window into a
larger space" that Intel PAE provided, but true native addressing. 
You also get 64 bit registers and ops, but you had those already with
various ISA extensions.

  I say "larger address space" because I don't actually know how large
the possible address space of AMD64 is.  Current implementations may
not support a full 64 bits of address space.  But as I recall from my
machine architecture course at UNH, the Alpha chips of the day didn't
really implement a full 64 bits of address space all the time, either.
 It's inefficient to process 64 bits of address math when you only
need 40 bits or so.  Or so I recall.  My memory is really dusty here.

  So for the sake of simplicity, for the rest of this discussion, I'll
use the term "64 bit" with the understanding that things are more
complicated then that.

  I'm not sure how useful the phrase "a fundamentally 32-bit chip with
provisions for 64-bit operations and memory addressing" is.  If the
chip does 64 bit math, supports a 64 bit address space, has 64 bit
registers, and in all other ways isn't limited by 32 bits, doesn't
that make it a 64 bit chip?  We're happy to call i386 a "32 bit" chip,
when it starts natively in a 16 bit, segmented memory mode that dates
back to the 1970s.  What's the hold up?

  In terms of actual performance improvements, again from what I've
read, a lot depends on the compiler/optimizer toolchain.  Most
applications don't benefit from a larger memory space (although those
that do *really* do).  Gaining additional general purpose registers,
and doing away special register semantics, however, can have a real
benefit across the board.  So can the cleanup of the FP side of
things.  None of that really *needed* a 64 bit address word, but given
that AMD was already ripping apart x86, that was the time to do it.

  Keep in mind that the above is a summary of what I've read on
manufacturer websites, pop industry trade rags, and forums like this
one, so it may be only slightly more useful then "strings
/dev/random".  :)

-- Ben "But it sounds good" Scott
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