Version 2022.12.17.249810658 of package Verilog-Mode has just been released in GNU ELPA. You can now find it in M-x list-packages RET.
Verilog-Mode describes itself as: ============================================== major mode for editing verilog source in Emacs ============================================== More at https://elpa.gnu.org/packages/verilog-mode.html ## Summary: USAGE ===== A major mode for editing Verilog and SystemVerilog HDL source code (IEEE 1364-2005 and IEEE 1800-2012 standards). When you have entered Verilog mode, you may get more info by pressing C-h m. You may also get online help describing various functions by: C-h f <Name of function you want described> KNOWN BUGS / BUG REPORTS ======================= SystemVerilog is a rapidly evolving language, and hence this mode is under continuous development. Please report any issues to the issue tracker at https://www.veripool.org/verilog-mode Please use verilog-submit-bug-report to submit a report; type C-c C-b to invoke this and as a result we will have a much easier time of reproducing the bug you find, and hence fixing it. INSTALLING THE MODE =================== ## Recent NEWS: [Not available 🙁]
