On Tue, Nov 06, 2012 at 08:21:24AM +0100, Felix Salfelder wrote:
> 3) add a node_t to MODEL_LOGIC (_m=_ttt=0, _lv="something that
> interprets gnd according to logic"), use it as "0" during
> DEV_LOGIC::map_nodes.
since the logicvalue is stored in _sim, it doesnt make sense to
put nodes into MODEL_LOGIC. i have now implemented this by adding two
more LOGIC_NODEs to _nstat in u_sim_data:
- _nstat = new LOGIC_NODE[_total_nodes+1];
+ _nstat = new LOGIC_NODE[_total_nodes+3];
for (uint_t ii=0; ii <= _total_nodes; ++ii) {
_nstat[_nm[ii]].set_user_number(ii);
}
+ _nstat[_total_nodes+1].set_lv(lvSTABLE0);
+ _nstat[_total_nodes+2].set_lv(lvSTABLE1);
+ _nstat[_total_nodes+1].store_old_lv();
+ _nstat[_total_nodes+2].store_old_lv();
which are mapped to in
+void DEV_LOGIC::map_nodes() {
+ ELEMENT::map_nodes();
+
+ const COMMON_LOGIC* c = prechecked_cast<const COMMON_LOGIC*>(common());
+ assert(c);
+ const MODEL_LOGIC* m = prechecked_cast<const MODEL_LOGIC*>(c->model());
+ assert(m);
+
+ for (uint_t i = 3; i < ext_nodes()+int_nodes(); ++i) {
+ if(!_n[i].m_()){
+ assert(m->th0 < m->th1); //for now
+ if(m->th0 > 0.){
+ _n[i].map_to_logic(lvSTABLE0);
+ } else if(m->th1 < 0.) {
+ _n[i].map_to_logic(lvSTABLE1);
+ } else {
+ // some sort of warning?
+ }
+ }
+ }
+}
+/*--------------------------------------------------------------------------*/
node_t::map_to_logic just sets _m correspondingly. since reading _lv via
data() is all the logic devices do, i doubt there are any negative side
effects.
i will merge this into -uf some time. any warnings or better ideas are welcome.
regards
felix
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