>sam. 17 janv. 2026 at 23:07, Noé Lopez <[email protected]> wrote:
> I don’t have any specific information to include, its mostly an > opportunity to show off what’s happening on your side to a wider > audience. > > So just keep it understandable to non-electronics people, otherwise you > can just write whatever you want. Also its in Markdown format. Here you have an overview of what’s going on. Feel free to modify / reduce / improve / cherry pick, whatever you need. ____________________ Free Software based, Electronic Design Automation (EDA) support in Guix has observed a considerable impulse thanks to an increasing number of contributors across a broad range of domains. Covering the needs of both hobbyst and professionals, tools such as Kicad 9.0.6, LibrePcb 1.3.0, XSchem 3.4.7, Qucs-s 25.2.0 and Ringdove EDA cover symbol and schematic edition and capture, PCB layout, simulation and routing. With Guix 1.5.0 all necessary tooling for efficient VLSI digital design is available. Concerning hardware digital language (HDL) support, Verilog and SystemVerilog compilers and simulators —Icarus Verilog (Iverilog)12.0 and Verilator 5.042— are included, along with the VHDL compiler Nvc 1.18.2. Complementing the main distribution, the Guix-Science channel adds Ghdl 5.1.1 —a VHDL compiler, LSP server and synthesis plugin for Yosys. The Vhdl-ls 0.86.0, rust based LSP VHDL server is also included. Non-traditional HDL design entry is supported via Amaranth 0.5.8, MyHDL 0.11, and Migen 0.92. System modelling is enhanced through UHDM 1.86 and SystemC 3.02, while code style enforcement is provided by Vsg 3.35.0 and HDL parsing capabilities are enabled by HdlConvertor 2.3. Simulation and verification of VLSI designs are supported through Cocotb 2.0.1, Osvvm 2025.06a, and OpenLogic 4.2.0. Unit testing with Vunit 5.0.0, layout editing using Magic 8.3.581 and KLayout 0.30.5, as well as advanced techniques such as equivalence checking via formal verification (Eqy 0.61), testbench coverage analysis (Mcy 0.61), formal hardware verification (Sby 0.61), and static timing analysis (OpenSta 2.7.0) are also available. Additionally, waveform viewing and logic analysis are enabled by PulseView 0.4.2 and GtkWave 3.4.0. The fully free software toolchain for programmable designs on GateMate FPGAs is now available in Guix 1.5.0, thanks to the inclusion of Yosys 0.61, Nextpnr 0.9, and OpenFPGALoader 1.0.0. Support for selected Gowin, Lattice, Ng-Ultra, and ECP5 devices is also provided. Additionally, project creation and management are enabled through HdlMake 4.0 and Edalize 0.6.3. As always with Guix, new EDA components are regularly added, and updates to existing packages can be easily obtained by running ‘guix pull && guix upgrade’. _______________________ Hope that helps, C.
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