OWP wrote: > Ironically, you made an interesting point on how Moore's Law created > the on chip "real estate" that made specialized machines possible. As > transistor sizing shrinks and die sizes increase, more and more real > estate should now be available for usage. Oddly, what destroyed > specialized machines in the past seemed to be the same cause in > reviving it from the dead. > > The ARM Jazelle interface - I'm not familiar with it's but it's got me > curious. Has there been any though (even in the most lighthearted > discussions) on what a physical "Haskell Machine" could look like? > Mainly, what could be left to compile to the stock architecture and > what could be sent out to more specialized areas? > You might be interested in looking at the Reduceron - http://www.cs.york.ac.uk/fp/reduceron/ - it was an FPGA-based effort to design a CPU explicitly for a Haskell-like language.
-- Simon Farnsworth _______________________________________________ Haskell-Cafe mailing list Haskell-Cafe@haskell.org http://www.haskell.org/mailman/listinfo/haskell-cafe