Alastair wrote:
>> This might form a very nice inter-process communication mechanism,
>> which may be recognised by people who have written interrupt driven
>> multi-process systems.
> I sort of see how this might work - but I've only _read about_ such systems
> - not actually implemented them. Where could I find out more?
Many years ago, (why do people say "many moons ago" when a "moon" is
much finer grain than "year"...?) I was involved in building a multi-process
system for the real-time analysis of blood via radioimmunoassay through
a machine with streams of test tubes passing from analysis station to
analysis station, with photo detectors and electro-mechanical actuators
- I won't bore you with all the details. It consisted of around 30
external events which could trigger hard interrupts. Associated with each
event was a state machine. The Intel 8080 hardware provided interrupt control
so that each interrupt halted the current activity, saved all registers on
the stack and caused a forced jump to a unique code address at the start of the
corresponding event's state machine. At that address the state machine would
jump locally to the address for the code corresponding to the current state.
At the end of each state the state machine would change state and return from
interrupt, thuswise restarting the interrupted state machine by reloading the
registers from the stack again. For critical events, interrupts were
disabled during each state transition. States could also cause transitions
by generating soft interrupts which were handled automatically by the
same mechanism. The whole thing was written in assembly language, lived in
an 8K PROM and ran like the proverbial clappers. I suppose this would be
called reactive programming now? Anyway, the point of this rigmorole is that,
as my EE colleagues tell me, this technique is still very much in use for
building embeded systems, for example with PIC chips. It would be very
interesting to see how, if at all, an exception mechanism could be used
in prototyping and then generating code for such multi-process
use.
Greg Michaelson
PS 4004 < 8008 < 8080 < 8086 < 80286 < 80386 < 80486 < Pentium ...
