Folks

For several years now, GHC has had a native code generator (NCG),
capable of emitting assembly code directly, for the Sparc and Alpha
architectures.  The motivation for this was to avoid the expense of
generating C, stuffing it through GCC and then mangling the assembly
output with a perl script.  Measurements show that directly generating
assembly code almost doubles the speed of non-optimised compilation.

Following various rounds of hacking earlier this year, x86 support was
added.  Considerable cleaning up and restructuring happened too, and
some bugs in the register allocator were fixed.  So the x86 native
code route now works fairly well, and will be on by default for
non-optimised compilation in the upcoming 4.08 release.  The code it
generates is surprisingly good: integer programs on x86s now run only
about 1% slower than the code generated by GCC.

Unfortunately, the sparc and alpha instruction selectors are now
substantially broken, because they did not track the aforementioned
infrastructure updates.

Is anyone out there interested in fixing the sparc route?  (and/or the
alpha route?)  This would probably be a couple of weeks work, by the
time you'd figured out what you need to know.  All the code is already
there -- you wouldn't be writing it from scratch -- but it all needs
to be re-jigged to fit in the revised infrastructure.

We would of course supply as much support as we can.  That includes
informal documentation about the structure and assumptions underlying
the instruction selectors.  We also have a helper program which makes
it easy to identify bugs in the NCG, by doing a fancy diff between the
NCG's code and that created by the via-C route.  This proved
invaluable in debugging the x86 route.  It means you can debug the NCG
without having a clue what the rest of the compiler is doing.

You'd need to have a reasonable understanding of sparc code,
architecture and use of registers, to do this.  You *don't* need to
know anything about register allocation; we handle all that with a
generic register allocator.  You only need to understand instruction
selection.  Familiarity with building GHC would also be helpful.

If you want to get some idea of what you'd be hacking on, get hold of
a GHC source tree, and look at fptools/ghc/compiler/MachCode.lhs.
or go here:
 
http://cvs.haskell.org/cgi-bin/cvsweb.cgi/fptools/ghc/compiler/nativeGen/Mac
hCode.lhs

If you feel you'd like to have a go at this, please get in contact.
We'd be very pleased if someone pushed it along.

J



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