"Paul D. Smith" wrote:
> %% "Eric Lilja" <[EMAIL PROTECTED]> writes:
>
>  el> CXX = g++
>  el> CXXFLAGS = -Wall -W -ansi -pedantic -g -c -o
>  el> LD = g++
>  el> LDFLAGS = -o $(EXEC)
>  el> OBJECTS = my_recipes_database.o read_recipe_file.o
>  el> EXEC = add_recipes
>  el> SRC = src/
>
> A "standard" GNU make makefile would look something like this:
>
>    CXX = g++
>    CXXFLAGS = -Wall -W -ansi -pedantic -g
>    OBJECTS = my_recipes_database.o read_recipe_file.o
>    EXEC = add_recipes
>    SRC = src/
>    BLD = build/
>
>    all: $(EXEC)
>
>    $(EXEC): $(addprefix $(BLD),$(OBJECTS))
>            $(CXX) $^ -o $@
>
>    $(BLD)%.o: $(SRC)%.cpp
>            $(COMPILE.cc) -o $@ $<
>
>    clean:
>            rm -f $(BLD)*.o $(EXEC) *~
>
>
> (COMPILE.cc is a builtin variable)
>
> -- 
> -------------------------------------------------------------------------------
> Paul D. Smith <[EMAIL PROTECTED]>          Find some GNU make tips at:
> http://www.gnu.org                      http://make.paulandlesley.org
> "Please remain calm...I may be mad, but I am a professional." --Mad 
> Scientist

Thanks Paul, you solved my Makefile problems!

/ Eric 


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