Hello,
again replying to myself :-)
>>SUBDIRS = foo bar baz
ALL = $(addsuffix -all,$(SUBDIRS))
all: $(ALL)
$(ALL):
$(MAKE) -C $(@:-all=) all
Creating targets using variables is a good idea but I don't see how I
can declare dependencies (e.g. say "bar" has to be compiled before
"foo"). Well, I can list the SUBDIRS in a certain order but that does
not work when "make" runs jobs concurrently (using option -j).
I finally solved this by using the variable MAKECMDGOALS to propagate
the target specified on the command line to the sub-makefiles.
all clean install: $(SUBDIRS)
.PHONY: $(SUBDIRS)
$(SUBDIRS):
$(MAKE) -C $@ $(MAKECMDGOALS)
This way you can run multiple make jobs simultaneously (using -j) and
set dependencies, e.g. "bar" depends on "baz", write
bar: baz
Cheers
Daniel Kabs
Germany
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