Hello,
I have makefile abbreviated as
all:
do a bunch of stuff
...
next_target:
$(MAKE)
do a bunch of stuff
...
nth_target: target_specific_var1 = ...
nth_target: target_specific_var2 = ...
nth_target: target_specific_var3 = $(shell my-shell-command...)
nth_target:
$(MAKE)
do a bunch of other stuff
What I observe is, although I explicitly make 'next_target' the shell
command of the nth_target is always called. Is that to be expected?
I would have assumed that the target-specific variables would not even
be evaluated unless I explicitly made them. BTW, there are no cross-
dependencies here. These targets really have no dependencies as
shown.
I'm using gnu make 3.81.
Thanks, Tom
