On Aug 26, 5:02 pm, Jim <james.ro...@yahoo.com> wrote: > Hi, > > I'm using a make program similar to gnu make. I'd like to always > recompile a file whenever ANY file is compiled (or assembled). > Preferably (but not absolutely necessary), I'd like the file to > recompile if the linker runs as well, but this sounds really tough. > In case you're wondering, this file contains a global array that has > time and date stamp information in it so we can tell when the project > was last built. > > Some engineers don't like a simple "delete the object file always when > make runs" approach because if you inadvertently run make a second > time, you get a recompile even if no sources changed. > > Any ideas on how to do this? > > Thanks much, > > Jim
I'd like to thank everyone for you input! Now, for the sake of discussion, I'd like to change the requirements a bit. I really don't need this, but it may come in handy: I'd like to have a variable, say COMPILE_ALWAYS, set to a file that needs to be compiled/assembled always. This file may be a .c, .cpp or an assembler file. So, the methods I've seen here that involve writing the ruleset for that file just won't do because now you don't know what file you'll be building. How would you go about doing it? My current thought is to place a line where the linking is done (before the link itself) that recursively calls make--it's target would be $(COMPILE_ALWAYS).o. Comments? Thanks again, Jim
