On Sat, Mar 26, 2022 at 10:47:31AM +0100, [email protected] wrote: > You wrote earlier that: > > Connections in gEDA schematics are implicit, and port positions are > > needed to infer them. For this, the symbol database is required. The gEDA > > library has been used to look up the symbols. > > By running the lepton/geda netlister you get the connections. > You don't need to have your own code for it.
Gnucap is not a netlister. The "code" is just a parser, and the intention is not to flatten the netlist, but to read in the schematic as a whole. This is not only required for lepton/geda, but wherever circuits are represented as a schematic. > lepton/geda has some code to produce verilog. > If verilog is the if. you want, why spend time on the geda plugin when > it might be more fruitful to get help from e.g. the lepton people to > shape up their verilog handling ? Al has proposed a data interchange system quite some time ago [1]. Nobody has done this, nor did the lepton people. I wasn't standing in their way. Note that gnucap-geda dates back to 2012, and is pushing in this direction since. Regardless. In order to make sense of the Symbols in Gnucap, electrically, we need a library with component models. I have started one in gnucap-geda/include/*.v. This is meant to resolve the default values for the component text attribute in the gEDA symbol library, by section. Such a library will give us something to play and explore, until we will be able to do Verilog/AMS. > The drawback with that would be back annotation if I understand you: The real problem is data interchange between eda tools, particularly in FOSS tools. Netlists, schematics, pcbs, floorplans... cheers felix [1] https://archive.fosdem.org/2016/schedule/event/eda_data_interchange/
